Hi Joakim and York,
I apologize for the delayed response and thanks for your catch up, Joakim
In order to get a higher transfer speed, the eSPI controller was designed to
transfer multiple bytes at one transaction which is not comply with the SPI
framework and the CS can't be inactive until one
Hi York,
We were also considering to improve the eSPI driver and we will look into this.
Thanks,
Mingkai
-Original Message-
From: Sun York-R58495
Sent: Thursday, April 17, 2014 5:09 AM
Cc: u-boot@lists.denx.de; Hu Mingkai-B21284
Subject: Re: [U-Boot] FSL eSPI driver is a mess, hack attach
Hi all,
Please ignore this email. Sorry for spam email
Thanks,
Mingkai
-Original Message-
From: Mingkai Hu [mailto:mingkai...@freescale.com]
Sent: Tuesday, November 25, 2014 5:40 PM
To: u-boot@lists.denx.de
Cc: Sun York-R58495; Liu Po-B43644; Hu Mingkai-B21284
Subject: [PATCH] powerpc/c
> -Original Message-
> From: York Sun [mailto:york...@freescale.com]
> Sent: Wednesday, November 26, 2014 12:22 AM
> To: Hu Mingkai-B21284; u-boot@lists.denx.de
> Cc: Sun York-R58495; Liu Po-B43644
> Subject: Re: [PATCH] powerpc/c29xpcie: Add secure boot support
>
> On 11/25/2014 01:42 A
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