From: Linus Walleij
Squashfs wasn't compiling because the lldiv() directives
turn into __udivdi3 and we are using private libgcc.
After this squashfs compiles for MIPS.
Signed-off-by: Linus Walleij
Signed-off-by: Daniel Schwierzeck
---
Linus, this is the updated and optimized versi
value of the $t0 register.
Fix the MIPS32 R1 code path to also store the updated value in $t0.
Reported by user ddqxy138 on Github.
https://github.com/u-boot/u-boot/commit/b838586086af3278bcaead3720c7a18813cf4619
Signed-off-by: Daniel Schwierzeck
---
arch/mips/lib/cache_init.S | 4 ++--
1 file
On 9/29/22 05:45, Majid B. wrote:
Hello,
I've tried to build U-Boot 2022.07 with the following series of
instructions:
export CROSS_COMPILE=mipsel-linux-gnu-
make mrproper
make O=build maltael_defconfig
make V=1 O=build -j$(nproc)
Unfortunately, I seem to always run into this error:
In fil
ashfs compiles for MIPS.
Cc: Daniel Schwierzeck
Cc: Mauro Condarelli
Cc: Ralf Baechle
Signed-off-by: Linus Walleij
---
I can't test this because it didn't work for MTD devices
as I had expected, but I saw Mauro had this problem
before so I think I might have fixed it. I better put
the
On 9/20/23 20:55, Tom Rini wrote:
On Wed, Sep 20, 2023 at 08:51:07PM +0200, Linus Walleij wrote:
On Wed, Sep 20, 2023 at 4:22 PM Tom Rini wrote:
+ * This is a diet version of the device tree from Linux,
+ * suitable for U-Boot.
+ */
We shouldn't need a diet version of the tree. If it's
On 9/20/23 09:42, Linus Walleij wrote:
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.
The default boot will read a uImage from flash and boot it.
Cc: Daniel Schwierzeck
Signed-off-by: Linus Walleij
---
arch/mips/dts/Makefile | 1 +
arch
Update description to use the MIPS Malta board for Qemu.
Signed-off-by: Daniel Schwierzeck
---
doc/board/emulation/qemu-mips.rst | 273 +-
1 file changed, 78 insertions(+), 195 deletions(-)
diff --git a/doc/board/emulation/qemu-mips.rst
b/doc/board/emulation/qemu
lta U-Boot
image can be used with Qemu and on physical hardware.
All combinations of Big Endian and Little Endian as well as 32 bit
and 64 bit are supported.
Signed-off-by: Daniel Schwierzeck
---
.azure-pipelines.yml| 12 -
.gitlab-ci.yml | 24 -
arch
Am Mittwoch, den 10.03.2021, 09:31 +0100 schrieb Horatiu Vultur:
> This patch series contains two patches. The first patch resets the
> switch at probe time while the second one fixes an issue with the
> serdes6g configuration which is used on jr2_pcb111 board
>
> Horatiu Vultur (2):
> net: jr2:
Am Dienstag, den 23.02.2021, 15:12 +0800 schrieb Weijie Gao:
> The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR
> type
> from bootstrap register must be ignored, and always be assumed as
> DDR1.
>
> This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be
> passed
> wit
Am Freitag, den 05.03.2021, 11:13 +0800 schrieb Weijie Gao:
> The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR
> type
> from bootstrap register must be ignored, and always be assumed as
> DDR1.
>
> This patch fixes the displayed DDR type of mt7628.
>
> Signed-off-by: Weijie Gao
Am Freitag, den 19.02.2021, 14:02 +0100 schrieb Stefan Roese:
> This patch enables USB storage support with the necessary partition
> support on the MIPS Octeon EBB7304.
>
> Signed-off-by: Stefan Roese
> Cc: Aaron Williams
> Cc: Chandrakala Chavva
> ---
> configs/octeon_ebb7304_defconfig | 5 +
Hi Tom,
please pull some updates and fixes for MIPS.
Gitlab CI:
https://source.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/7255
Azure:
https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildId=22&view=results
The following changes since commit 842d049be23976ebcbb2522fa8d752d3
Hi Tom,
please pull some major updates and minor fixes for MIPS Octeon III.
The changeset is quite large because all support for PCI-E, SGMII,
SATA etc. depends on the Octeon QLM (Quad Lane Modules) controller
which needs to be configured and tuned for each mode and that
configuration is quite co
Am Freitag, den 11.12.2020, 17:05 +0100 schrieb Stefan Roese:
> This patchset adds the serdes and (mostly networking) device helper
> macros and functions, needed to support the still missing Octeon II /
> III devices in mainline U-Boot.
>
> Please excuse the massive amount of files in this patch
Am Mittwoch, den 07.04.2021, 09:12 +0200 schrieb Stefan Roese:
> This patchset adds the following updates / fixes for Marvell MIPS
> Octeon:
> - MIPS Octeon NIC23 base support
> - Add serial_octeon_pcie_console to support the Marvell remote tool
> "oct-remote-console"
> - Add serial_octeon_bootcm
Am Montag, den 26.04.2021, 16:43 +0200 schrieb Stefan Roese:
> This patch makes the necessary adjustments in the defconfig to fully
> support the CFI flash on the Octeon EBB7304.
>
> Signed-off-by: Stefan Roese
> Cc: Aaron Williams
> Cc: Chandrakala Chavva
> C
:66: first
defined here
mscc_pinctrl_ops and mscc_gpio_ops are instantiated in mscc-common.c and
just referenced by SoC specific pinctrl drivers. Annotate the exports
in mscc-common.h with `extern` to avoid creating new instances
when including mscc-common.h.
Signed-off-by: Daniel Schwierzeck
---
Am Dienstag, den 04.05.2021, 14:45 -0400 schrieb Tom Rini:
> On Tue, May 04, 2021 at 08:40:40PM +0200, Daniel Schwierzeck wrote:
>
> > gcc-11 complains about multiple definitions:
> >
> > /opt/gcc-11.0.20210426-nolibc/mips-linux/bin/mips-linux-ld.bfd:
> >
ini
> ---
> drivers/pinctrl/mscc/mscc-common.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Daniel Schwierzeck
-- Daniel
Yang
---
drivers/pci/pcie_xilinx.c | 53 +++
1 file changed, 40 insertions(+), 13 deletions(-)
Reviewed-by: Daniel Schwierzeck
s/pci/Kconfig| 9 +
drivers/pci/pci_auto.c | 16
2 files changed, 17 insertions(+), 8 deletions(-)
Reviewed-by: Daniel Schwierzeck
1 file changed, 1 insertion(+)
Reviewed-by: Daniel Schwierzeck
On 5/17/24 20:14, Jiaxun Yang wrote:
Some drivers need this header.
Provide this dummy header as riscv did.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/acpi_table.h | 10 ++
1 file changed, 10 insertions(+)
Reviewed-by: Daniel Schwierzeck
On 5/17/24 20:14, Jiaxun Yang wrote:
This is a PC-like platform board.
Enable drivers for most on-board devices to make it useful.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig | 27 +++
1 file changed, 27 insertions(+)
Reviewed-by: Daniel Schwierzeck
(+)
Reviewed-by: Daniel Schwierzeck
ove syscon detection code to probe to ensure
parent is probbed before syscon_get_regmap.
---
drivers/clk/clk_boston.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
Reviewed-by: Daniel Schwierzeck
On 5/17/24 20:14, Jiaxun Yang wrote:
It is required to make OF_UPSTREAM work.
Reviewed-by: Sumit Garg
Signed-off-by: Jiaxun Yang
---
dts/upstream/src/mips/Makefile | 14 ++
1 file changed, 14 insertions(+)
Reviewed-by: Daniel Schwierzeck
/boston64r2_defconfig | 2 +-
configs/boston64r2el_defconfig | 2 +-
configs/boston64r6_defconfig | 2 +-
configs/boston64r6el_defconfig | 2 +-
13 files changed, 20 insertions(+), 231 deletions(-)
Reviewed-by: Daniel Schwierzeck
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index
| 3 ++-
board/imgtec/boston/MAINTAINERS | 2 +-
board/imgtec/malta/MAINTAINERS | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
Reviewed-by: Daniel Schwierzeck
Am Montag, den 18.01.2021, 15:54 +0800 schrieb Weijie Gao:
> On Fri, 2020-11-27 at 21:19 +0100, Daniel Schwierzeck wrote:
> > Am Donnerstag, den 12.11.2020, 16:35 +0800 schrieb Weijie Gao:
> > > Previous the dts files for gardena-smart-gateway-mt7688 and
> > > linkit-sma
Hi Weijie,
Am Dienstag, den 19.01.2021, 08:58 +0800 schrieb Weijie Gao:
> > >
> > > Hi Daniel,
> > >
> > > Gentle ping
> > >
> > > I'm just curious when can the patch series be merged into u-boot/master?
> > >
> >
> > Hi Weijie,
> >
> > thanks for the reminder, I missed the opening of the me
Am Montag, den 17.08.2020, 15:06 +0200 schrieb Stefan Roese:
> Import platform specific mangle-port.h header, allowing a area specific
> swapping, which is needed on Octeon for USB & PCI areas.
>
> Imported from Linux v5.7.
>
> Signed-off-by: Stefan Roese
> ---
>
> arch/mips/mach-octeon/includ
Am Montag, den 17.08.2020, 15:06 +0200 schrieb Stefan Roese:
> Octeon uses mapped addresses for virtual and physical memory. Its not
> that easy to calculate the resulting addresses here. So lets remove
> this BUG_ON() for Octeon in xhci_bulk_tx().
>
> Signed-off-by: Stefan Roese
> Cc: Bin Meng
Am Montag, den 17.08.2020, 15:06 +0200 schrieb Stefan Roese:
> This patch enables USB support with some helpful commands, like fs
> support.
>
> Signed-off-by: Stefan Roese
>
> ---
>
> configs/octeon_ebb7304_defconfig | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a
Am Montag, den 17.08.2020, 14:12 +0200 schrieb Stefan Roese:
> From: Aaron Williams
>
> This header is used by the upcoming DDR driver and potentially by other
> drivers ported from the 2013 Cavium / Marvell U-Boot repository.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Stefan Roese
>
Am Montag, den 17.08.2020, 14:12 +0200 schrieb Stefan Roese:
> From: Aaron Williams
>
> This header will be used by the DDR driver (lmc). Its ported from the
> 2013 Cavium / Marvell U-Boot repository.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Stefan Roese
>
> ---
>
> Changes in v2:
Am Montag, den 17.08.2020, 14:12 +0200 schrieb Stefan Roese:
> From: Aaron Williams
>
> This header will be used by the DDR driver (lmc). Its ported from the
> 2013 Cavium / Marvell U-Boot repository.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Stefan Roese
>
> ---
>
> Changes in v2:
Am Montag, den 17.08.2020, 14:12 +0200 schrieb Stefan Roese:
> From: Aaron Williams
>
> This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
> repository. It currently supports DDR4 on Octeon 3. It can be later
> extended to support also DDR3 and Octeon 2 platforms.
>
> Part
Am Montag, den 17.08.2020, 14:12 +0200 schrieb Stefan Roese:
> From: Aaron Williams
>
> This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
> repository. It currently supports DDR4 on Octeon 3. It can be later
> extended to support also DDR3 and Octeon 2 platforms.
>
> Part
Am Samstag, den 22.08.2020, 02:37 + schrieb John Robertson:
> Refresh driver code, remove obsolete DT props and set the max clock
> rate from the source clock 'base_clk'.
>
> Card detect is also broken. The fix implemented for erratum #15
> documented in Microchip ref. DS8736D only needs t
Am Samstag, den 22.08.2020, 16:36 + schrieb John Robertson:
> Currently GPIO operations (e.g. gpio status -a) don't work at all.
>
> Signed-off-by: John Robertson
> ---
>
> arch/mips/dts/pic32mzda.dtsi | 58 +---
> 1 file changed, 34 insertions(+), 24 deletio
Am Montag, den 31.08.2020, 18:04 + schrieb John Robertson:
> The existing driver is not compatible with the Driver Model.
>
> This patch makes the necessary changes while also removing obsolescent
> calls/properties as follows:
>
> - fdtdec_* calls replaced with dev_read_* equivalents;
> - 'c
Am Montag, den 31.08.2020, 18:04 + schrieb John Robertson:
> CONFIG_BLK needs to be enabled by default to allow U-Boot to
> compile after a 'make pic32mzdask_defconfig'.
>
> Signed-off-by: John Robertson
> ---
>
> configs/pic32mzdask_defconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 del
Hi Mauro,
Am Montag, den 31.08.2020, 21:57 +0200 schrieb Mauro Condarelli:
> Sorry to disturb :(
>
> I am trying to switch from
> https://gitlab.denx.de/u-boot/custodians/u-boot-mips commit
> f3d8c7f8d3c02ff1de172aff7e6392a9ddd1f5b2 to master.
> In both case I'm using plain "vocore2_defconfig"
Am Montag, den 31.08.2020, 23:53 +0200 schrieb Mauro Condarelli:
> Thanks Daniel.
>
> On 8/31/20 10:36 PM, Daniel Schwierzeck wrote:
> > Hi Mauro,
> >
> > Am Montag, den 31.08.2020, 21:57 +0200 schrieb Mauro Condarelli:
> > > Sorry to disturb :(
>
Am Dienstag, den 01.09.2020, 15:09 +0200 schrieb Mauro Condarelli:
> Hi Daniel,
> Hi Stefan,
> comments inline below.
>
> Many Thanks
> Mauro
>
> On 9/1/20 1:41 AM, Daniel Schwierzeck wrote:
> > Am Montag, den 31.08.2020, 23:53 +0200 schrieb Mauro Condarelli:
> &
Am Montag, den 15.03.2021, 21:24 + schrieb Aleksandar Gerasimovski:
> Hi Folks,
>
> Hope you are all well!
>
> I guess you have verry busy times, but I have to ask about the state
> of my last two patches on patchwork:
>
> https://patchwork.ozlabs.org/project/uboot/patch/vi1pr06mb402989c0efe
Hi Marek,
Am 18.04.20 um 05:15 schrieb Marek Vasut:
> Replace the PCI IO access with PCI memory access, the card
> supports both, but the former does not work with QEMU SH4.
>
> Signed-off-by: Marek Vasut
> Cc: Daniel Schwierzeck
> Cc: Joe Hershberger
> ---
> Note:
Am 02.05.20 um 17:00 schrieb Daniel Schwierzeck:
> Hi Marek,
>
> Am 18.04.20 um 05:15 schrieb Marek Vasut:
>> Replace the PCI IO access with PCI memory access, the card
>> supports both, but the former does not work with QEMU SH4.
>>
>> Signed-off-by: Marek
ves breaks the driver on
MIPS Malta board.
Signed-off-by: Daniel Schwierzeck
---
Needs to be applied after
[PULL] u-boot-sh/next network cleanup part 1
https://patchwork.ozlabs.org/project/uboot/patch/270da1a6-aa7a-16c6-6642-76a9ea8a7...@denx.de/
drivers/net/pc
nged, 4 insertions(+), 9 deletions(-)
Reviewed-by: Daniel Schwierzeck
>
> diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
> index 9247180a29..6ccbd2f50f 100644
> --- a/cmd/bdinfo.c
> +++ b/cmd/bdinfo.c
> @@ -299,15 +299,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char
> * c
Am 05.05.20 um 01:17 schrieb Simon Glass:
> Microblaze prints out ethernet and FDT information. This is useful to
> most archs, so move it into the generic code and move microblaze over to
> use it.
>
> Signed-off-by: Simon Glass
> ---
>
> cmd/bdinfo.c | 30 +++---
>
Am 05.05.20 um 01:17 schrieb Simon Glass:
> We don't really want to have ARM-specific code in a generic file. Create
> a new arch-specific function to hold it, and move it into that.
>
> Make the function weak so that any arch can implement it.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/
sorry for the delay ;)
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> From: Aaron Williams
>
> This patch adds very basic support for the Octeon III SoCs. Only
> CFI parallel NOR flash and UART is supported for now.
>
> Please note that the basic Octeon port does not include the DDR3/4
> initiali
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> This patch enables the usage of CONFIG_MIPS_L2_CACHE without
> CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
> platform.
>
> Signed-off-by: Stefan Roese
> ---
>
> arch/mips/lib/cache.c | 13 -
> 1 file changed, 12
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> The Octeon platform is cache coherent and cache flushes and invalidates
> are not needed. This patch makes use of the newly introduced Kconfig
> option CONFIG_MIPS_CACHE_COHERENT to effectively disable all the cache
> operations.
I don't like this ex
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
> the exception base register.
>
> Signed-off-by: Stefan Roese
> ---
>
> arch/mips/lib/traps.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/mips/lib/traps.
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> With the introduction of the MIPS Octeon support, lets use the newly
> added Kconfig symbol CONFIG_CPU_MIPS64_OCTEON instead of the old Linux
> CONFIG_CPU_CAVIUM_OCTEON one (which was never set). Remove these
> references completely with this patch.
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> This patch adds very basic minimal support for the Marvell Octeon 3
> CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
> not support DDR3/4 initialization yet. To still use U-Boot on with this
> port, the L2 cache (4MiB) is used a
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
> family.
>
> Signed-off-by: Stefan Roese
> ---
>
> drivers/sysreset/Kconfig | 7
> drivers/sysreset/Makefile | 1 +
> drivers/sysreset/sysreset_octeon.
Am 02.05.20 um 10:59 schrieb Stefan Roese:
> From: Aaron Williams
>
> This patch adds very basic support for the Octeon III SoCs. Only
> CFI parallel NOR flash and UART is supported for now.
>
> Please note that the basic Octeon port does not include the DDR3/4
> initialization yet. This will
Am 14.05.20 um 14:11 schrieb Jagan Teki:
> Use IS_ENABLED to prevent ifdef in sf_probe.c
>
> Cc: Simon Glass
> Cc: Vignesh R
> Cc: Daniel Schwierzeck
> Signed-off-by: Jagan Teki
> ---
> drivers/mtd/spi/sf_internal.h | 10 ++
> drivers
Hi Alex,
you should always CC the maintainers of the affected sub-systems or
architecture. Otherwise it's random if a maintainer reads through the
list and discovers your patches ;)
You can find out with get_maintainers.pl like this:
$ ./scripts/get_maintainer.pl drivers/i2c/
Heiko Schocher (ma
Hi Michal,
Am 26.03.20 um 14:54 schrieb Michal Simek:
> Commit f4dc714aaa2d ("arm64: Turn u-boot.bin back into an ELF file after
> relocate-rela")
> introduce REMAKE_ELF option to recreate u-boot.elf from u-boot ->
> u-boot.bin + DT -> u-boot.elf.
>
> The best is to ilustrate it from make V=1 out
Hi Tom,
Am 27.03.20 um 14:52 schrieb Tom Rini:
> To prepare to update our Kbuild logic, start switching some of our cases
> of adding different bit/endian linker flags via ldflags-y
>
> Cc: Daniel Schwierzeck
> Signed-off-by: Tom Rini
> ---
> arch/mips/config.mk | 12 +
gt; ---
> drivers/mtd/nand/raw/brcmnand/brcmnand.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
Reviewed-by: Daniel Schwierzeck
--
- Daniel
By purpose u-boot-elf.lds doesn't contain OUTPUT_FORMAT/OUTPUT_ARCH to be
> able to use by all archs.
>
> Signed-off-by: Michal Simek
> ---
>
> Changes in v2:
> - Use preprocessor and Kconfig entry for passing different PLATFORM_ENTRY
> Suggested-by: Daniel Schwierzeck
omplete area is flushed as we don't know at this point, how big the
>> area of the "application" really is.
>>
>> Signed-off-by: Stefan Roese
>> Reviewed-by: Daniel Schwierzeck
>> Tested-by: Mauro Condarelli
>> Cc: Daniel Schwierzeck
>> C
Hi Tom,
Am Freitag, den 14.05.2021, 21:34 -0400 schrieb Tom Rini:
> These boards have not been converted to CONFIG_DM_PCI by the
> deadline.
> Remove them.
>
> Cc: Paul Burton
> Cc: Daniel Schwierzeck
> Signed-off-by: Tom Rini
> ---
> As I hope these boards will get
4974:
doc: update and fix Qemu MIPS documentation (2021-05-25 15:35:06 +0200)
- MIPS: octeon: fix CFI flash setup
- MIPS: remove qemu_mips boards
----
Daniel Schwierzec
44 doc/README.ne2000
> delete mode 100644 drivers/net/8390.h
> delete mode 100644 drivers/net/ne2000.c
> delete mode 100644 drivers/net/ne2000.h
> delete mode 100644 drivers/net/ne2000_base.c
> delete mode 100644 drivers/net/ne2000_base.h
Reviewed-by: Daniel Schwierzeck
There
passed-in rw_fdt_blob pointer
will point to a read-only NOR flash address. I'll send a separate
RFC patch for this.
I'll send a cleanup series for removing non-DM code after the merge
windows has closed and the PCI DM conversion deadline has been
enforced.
Daniel Schwierzeck (6):
dm
This driver is currently only used on MIPS Malta boards.
Signed-off-by: Daniel Schwierzeck
---
drivers/pci/pci_gt64120.c | 72 ++-
1 file changed, 71 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci_gt64120.c b/drivers/pci/pci_gt64120.c
index
workaround is required for MIPS boards with
PCI support until the CONFIG_SYS_SDRAM_BASE issue could be solved.
Add a compile-time option to let the PCI uclass core optionally map
the DRAM address to a physical address when adding the PCI region
of type PCI_REGION_SYS_MEMORY.
Signed-off-by: Daniel
This driver is currently only used on MIPS Malta boards.
Signed-off-by: Daniel Schwierzeck
---
drivers/pci/pci_msc01.c | 70 -
1 file changed, 69 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index
Add DT binding for GT64120 and MSC01 PCI controllers. Only
GT64120 is enabled by default to support Qemu. The MSC01 node
will be dynamically enabled by Malta board code dependent
on the plugged core card.
Signed-off-by: Daniel Schwierzeck
---
arch/mips/dts/mti,malta.dts | 28
: Daniel Schwierzeck
---
board/imgtec/malta/malta.c | 84 +-
1 file changed, 83 insertions(+), 1 deletion(-)
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index c04f727961..e78d5a7fbc 100644
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec
Enable DM_PCI and DM_ETH on MIPS Malta.
Signed-off-by: Daniel Schwierzeck
---
arch/mips/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e54801673b..6b1f10d9a0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -14,8 +14,11
Hi Tom,
please pull updates for MIPS. This adds support for Mediatek MT7620 SoCs.
Gitlab CI:
https://gitlab.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/6039
Azure:
https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildId=15&view=results
The following changes since commit 69d
Am Sonntag, den 14.02.2021, 09:52 -0500 schrieb Tom Rini:
...
> > > > > >
> > > > > > > Tom, do you know the situation here?
> > > > >
> > > > > So, I made a lack of DM_PCI migration be fatal and got a
> > > > > build done
> > > > > here:
> > > > > https://gitlab.denx.de/u-boot/u-boot/-/pipelin
Hi Simon,
Am Samstag, den 10.07.2021, 18:00 -0600 schrieb Simon Glass:
> () Hi Daniel,
>
> On Tue, 6 Jul 2021 at 08:22, Daniel Schwierzeck
> wrote:
> > As almost all peripherals are connected via PCI dependent on the
> > used core card, PCI setup is always req
Am Donnerstag, den 17.06.2021, 18:09 +0200 schrieb Reto Schneider:
> From: Reto Schneider
>
> This commit updates the default config with the values that will
> be used soon on the MediaTek MT7688 based GARDENA smart gateway.
>
> CONFIG_SPL_SYS_MALLOC_F_LEN had to be increased due to the more
>
ine before return statements
- add empty line before return statements
- use dm_pci_clrset_config32() where possible
Daniel Schwierzeck (6):
dm: pci: add option to map virtual system memory base address
pci: gt64120: convert to driver model
pci: msc01: convert to driver model
MIPS: malta: add D
workaround is required for MIPS boards with
PCI support until the CONFIG_SYS_SDRAM_BASE issue could be solved.
Add a compile-time option to let the PCI uclass core optionally map
the DRAM address to a physical address when adding the PCI region
of type PCI_REGION_SYS_MEMORY.
Signed-off-by: Daniel
This driver is currently only used on MIPS Malta boards.
Signed-off-by: Daniel Schwierzeck
Reviewed-by: Simon Glass
---
Changes in v2:
- add empty line before return statements
drivers/pci/pci_gt64120.c | 74 ++-
1 file changed, 73 insertions(+), 1
This driver is currently only used on MIPS Malta boards.
Signed-off-by: Daniel Schwierzeck
Reviewed-by: Simon Glass
---
Changes in v2:
- add empty line before return statements
drivers/pci/pci_msc01.c | 72 -
1 file changed, 71 insertions(+), 1
Add DT binding for GT64120 and MSC01 PCI controllers. Only
GT64120 is enabled by default to support Qemu. The MSC01 node
will be dynamically enabled by Malta board code dependent
on the plugged core card.
Signed-off-by: Daniel Schwierzeck
---
(no changes since v1)
arch/mips/dts/mti,malta.dts
: Daniel Schwierzeck
---
Changes in v2:
- use dm_pci_clrset_config32() where possible
board/imgtec/malta/malta.c | 80 +-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index c04f727961
Enable DM_PCI and DM_ETH on MIPS Malta.
Signed-off-by: Daniel Schwierzeck
---
(no changes since v1)
arch/mips/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e54801673b..6b1f10d9a0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips
Am Donnerstag, den 15.07.2021, 20:53 +0200 schrieb Daniel Schwierzeck:
> This series converts the PCI host controller drivers used by MIPS
> Malta and the board-specific PCI setup code to PCI driver model.
> Because the AMD PCNET driver is already converted to ETH driver
> model, s
07-18 20:37:39 +0200)
- mips: gardena-smart-gateway: adjust config to new production values
- mips: malta: convert to PCI DM and ETH DM
--------
Daniel Schwierzeck (6):
Hi Daniel,
Am Montag, den 19.07.2021, 18:34 +0100 schrieb Daniel Golle:
> Hi,
>
> I writing in the hope that someone has a good idea about why U-boot
> is
> handing over a broken memory address for a loaded ramdisk which
> results
> in Linux crashing very early on boot on MediaTek's MT7623N SoC
>
> 1 file changed, 67 deletions(-)
>
>
commit subject should be "mips: malta: ..." and not "ppc: malta: ..."
;)
Reviewed-by: Daniel Schwierzeck
--
- Daniel
> 1 file changed, 64 deletions(-)
>
>
Reviewed-by: Daniel Schwierzeck
--
- Daniel
> 1 file changed, 64 deletions(-)
>
>
Reviewed-by: Daniel Schwierzeck
--
- Daniel
Am Montag, den 22.02.2021, 18:05 +0100 schrieb Reinoud Zandijk:
> Patch 0001 re-enables FDT inclusion into the u-boot binary to make
> them boot
> again. The code might not have adjusted well enough in the past to
> handle the
> separate one.
what exactly is the issue? Do you see it just on real h
Am Montag, den 22.02.2021, 20:56 +0100 schrieb Reinoud Zandijk:
> Hi Daniel,
>
> On Mon, Feb 22, 2021 at 07:23:26PM +0100, Daniel Schwierzeck wrote:
> > Am Montag, den 22.02.2021, 18:05 +0100 schrieb Reinoud Zandijk:
> > > Patch 0001 re-enables FDT inclusion into the u-b
Am Dienstag, den 23.02.2021, 15:19 +0100 schrieb Reinoud Zandijk:
> Hi Daniel,
>
> On Tue, Feb 23, 2021 at 01:03:05AM +0100, Daniel Schwierzeck wrote:
> > Am Montag, den 22.02.2021, 20:56 +0100 schrieb Reinoud Zandijk:
> > > If I remove it, the machine just spins in Qemu,
ng
> address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
> this call.
>
> It will be used by thje Octeon platform.
>
> Signed-off-by: Stefan Roese
> ---
>
> arch/mips/Kconfig | 9 +
> arch/mips/cpu/start.S | 5 +
> 2 files changed
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