From: Maksim Kiselev
Add support for VBUS supply regulator.
When our type-c port acts as a host(SRC), this regulator
used for control VBUS supply.
Signed-off-by: Maksim Kiselev
---
drivers/usb/tcpm/fusb302.c | 44 +-
1 file changed, 43 insertions(+), 1 dele
From: Maksim Kiselev
Add newline character in dev_dbg end.
Signed-off-by: Maksim Kiselev
---
drivers/usb/tcpm/fusb302.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/tcpm/fusb302.c b/drivers/usb/tcpm/fusb302.c
index fe93ff3d339..ee283782792 100644
--- a/
From: Maksim Kiselev
PU\PD resistors on CC lines must be configured before running the TCPM
state machine.
Also, when the Type-C port acts as a host (SRC), the VBUS sould be enabled
only after the toggling has been completed. And we have to wait for
the corresponding IRQ to finish the toggling p
From: Maksim Kiselev
Hello,
First of all I want to thank Sebastian for the work he has done
to add TPCM support.
This series contains some improvements for issues I encountered when
Type-C port acts as a host (source).
The first issue is that the Type-C state machine gets stuck
in TOGGLING sta
From: Maksim Kiselev
This series adds GPIO support for the LicheePi4A board.
It's based on Alibaba TH1520 SoC that has DesignWare APB GPIO controller.
Best regards,
Maksim
Maksim Kiselev (2):
gpio: dw: Add ngpios DT-property support
configs: th1520_lpi4a: Enable CMD_GPIO, DM_GPIO and DWAPB_
From: Maksim Kiselev
Starting with Linux commit 7569486d79ae ("gpio: dwapb: Add ngpios
DT-property support") the "snps,nr-gpios" property was marked
as deprecated.
And since all newly added dw-apb-gpio nodes are described using generic
"ngpios" property, it's time to add support for it.
Signed-
From: Maksim Kiselev
Enable GPIO command and DWAPB_GPIO driver for LicheePi4A board.
Signed-off-by: Maksim Kiselev
---
configs/th1520_lpi4a_defconfig | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configs/th1520_lpi4a_defconfig b/configs/th1520_lpi4a_defconfig
index db8
From: Maksim Kiselev
Some USB-ETH adapters based on the AX88179 (ex. D-link DUB-2312)
has link issue if ADVERTISE_NPAGE flag is set.
Also Linux drivers for ASIX chips doesn't use these flags.
Signed-off-by: Maksim Kiselev
---
drivers/usb/eth/asix88179.c | 4 ++--
1 file changed, 2 insertions(
From: Maksim Kiselev
Add support for the following Maxim chips using the existing PCA954x
driver:
- MAX7356
- MAX7357
- MAX7358
- MAX7367
- MAX7368
- MAX7369
All added Maxim chips behave like the PCA954x, where a single SMBUS byte
write selects up to 8 channels to be bridged to the primary bus.
From: Maksim Kiselev
According to Xilinx AXI DMA Spec:
"There can be a lag of time between when DMACR.RS = 0 and when
DMASR.Halted = 1"
So to ensure that DMA transfer is really terminated we need to wait
for DMASR.Halted status, which was missed in the Xilinx AXI EMAC driver.
This issue resulte
From: Maksim Kiselev
Since GCC 14 -Werror=implicit-function-declaration is enabled by default.
This leads to following compilation error:
drivers/gpio/mcp230xx_gpio.c:57:9: error:
implicit declaration of function ‘udelay’
[-Wimplicit-function-declaration]
57 | udelay(1);
From: Maksim Kiselev
Add support for DesignWare SDHCI host controller on Alibaba TH1520 SoC
Signed-off-by: Maksim Kiselev
Tested-by: Heinrich Schuchardt
---
Changes since RFC:
- fixed HS400ES mode
- added ADMA support
drivers/mmc/Kconfig | 12 +
drivers/mmc/Makefile | 1 +
drive
From: Maksim Kiselev
Hi friends,
This patchset is a continuation of RFC
https://lore.kernel.org/u-boot/20240330175948.80931-1-biguncle...@gmail.com/
It extends the previous version by adding sd and emmc nodes to lpi4a DT.
And enables required options in th1520_lpi4a_defconfig.
Also I did some
From: Maksim Kiselev
Add SDHCI and EMMC controlles nodes on TH-1520 SoC. And enable them for
Lichee module 4A.
Signed-off-by: Maksim Kiselev
---
arch/riscv/dts/th1520-lichee-module-4a.dtsi | 18 +++
arch/riscv/dts/th1520.dtsi | 34 +
2 files changed
From: Maksim Kiselev
Enable driver for DesignWare MSHC. TH1520 supports all
speed modes up to HS400ES and UHS SDR105.
Also enable ADMA and mmc command.
Signed-off-by: Maksim Kiselev
---
configs/th1520_lpi4a_defconfig | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --gi
From: Maksim Kiselev
Add support for DesignWare SDHCI host controller on Alibaba TH1520 SoC
Signed-off-by: Maksim Kiselev
Tested-by: Heinrich Schuchardt
---
Changes for v2:
- re-use phy init code
- drop CONFIG_ prefix from CONFIG_MMC_SDHCI_ADMA_HELPERS
- rework clock handling
drivers/mmc/Kco
From: Maksim Kiselev
Add SDHCI and EMMC controlles nodes on TH-1520 SoC. And enable them for
Lichee module 4A.
Reviewed-by: Jaehoon Chung
Signed-off-by: Maksim Kiselev
---
arch/riscv/dts/th1520-lichee-module-4a.dtsi | 18 +++
arch/riscv/dts/th1520.dtsi | 34 ++
From: Maksim Kiselev
Enable driver for DesignWare MSHC. TH1520 supports all
speed modes up to HS400ES and UHS SDR105.
Also enable ADMA and mmc command.
Reviewed-by: Jaehoon Chung
Signed-off-by: Maksim Kiselev
---
configs/th1520_lpi4a_defconfig | 11 ++-
1 file changed, 10 insertions(
From: Maksim Kiselev
Hello everyone!
I've encountered an issue where the actual length of received data is
calculated incorrectly in the case of a multiple TRB request.
Below, I'll try to describe the essence of the problem:
A USB-ethernet adapter ASIX ax88179 is connected to my board Li4pi,
a
From: Maksim Kiselev
In the case when the transfer buffer spans 64KB boundary, one trb is
divided into several. In this case, the size of the first trb buffer
sets equal to the size of truncated to 64K boundary.
However, this is not taken into account when calculating the actual
length.
To fix
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