From: Tang Yuantian
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.
The features list:
- Supports 1-lane 2.5 Gbit/s PCI Express
From: Tang Yuantian
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.
The features list:
- Supports 1-lane 2.5 Gbit/s PCI Express
- Supports one/two/four independent S
From: Tang Yuantian
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.
The features list:
- Supports 1-lane 2.5 Gbit/s PCI Express
From: Tang Yuantian
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.
The features list:
- Supports 1-lane 2.5 Gbit/s PCI Express
- Supports one/two/four independent S
From: Tang Yuantian
Freescale ARM-based Layerscape LS102xA contain a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds SATA feature on ls1021aqds and ls1021atwr boards.
Signed-off-by: Tang Yuantian
---
arch/arm/include/asm/arch-l
From: Tang Yuantian
Freescale ARM-based Layerscape LS2085A contain a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds SATA feature on ls2085aqds and ls2085ardb boards.
Signed-off-by: Tang Yuantian
---
arch/arm/cpu/armv8/fsl-lsch
From: Tang Yuantian
Cache needs to be flushed after restoring DDR data.
Signed-off-by: Tang Yuantian
---
board/freescale/t102xrdb/t102xrdb.c | 2 ++
board/freescale/t104xrdb/t104xrdb.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/board/freescale/t102xrdb/t102xrdb.c
b/board/freescale
On 2014/2/18 星期二 3:18, Scott Wood wrote:
On Sun, 2014-02-16 at 21:35 -0600, Tang Yuantian-B29983 wrote:
-Original Message-
From: Wood Scott-B07421
To: Tang Yuantian-B29983
Cc: Sun York-R58495; Li Yang-Leo-R58472; u-boot@lists.denx.de; Kushwaha
Prabhakar-B32579; Jin Zhengxiong-R64188
On 2014/2/15 星期六 6:21, Scott Wood wrote:
On Thu, 2014-02-13 at 01:05 -0600, Tang Yuantian-B29983 wrote:
Thanks for your review. Please see the reply inline.
Thanks,
Yuantian
-Original Message-
From: Wood Scott-B07421
Sent: 2014年2月13日 星期四 8:44
To: Tang Yuantian-B29983
Cc: Sun York
On 2014/2/25 星期二 3:11, Scott Wood wrote:
On Mon, 2014-02-24 at 14:44 +0800, Tang Yuantian-B29983 wrote:
On 2014/2/18 星期二 3:18, Scott Wood wrote:
On Sun, 2014-02-16 at 21:35 -0600, Tang Yuantian-B29983 wrote:
-Original Message-
From: Wood Scott-B07421
To: Tang Yuantian-B29983
Cc: Sun
On 2014/2/25 星期二 3:11, Scott Wood wrote:
On Mon, 2014-02-24 at 15:47 +0800, Tang Yuantian-B29983 wrote:
On 2014/2/15 星期六 6:21, Scott Wood wrote:
On Thu, 2014-02-13 at 01:05 -0600, Tang Yuantian-B29983 wrote:
Thanks for your review. Please see the reply inline.
Thanks,
Yuantian
On 2014/2/25 星期二 3:11, Scott Wood wrote:
Why what? Why we need it?
It is a help function and used by ASM code in which
we can't determine whether it is a warm reset boot.
Why don't you just open code it?
I can't check the warmboot status in ASM code.
In order to get the warmboot status in ASM
> > diff --git a/arch/powerpc/include/asm/mpc85xx_gpio.h
> > b/arch/powerpc/include/asm/mpc85xx_gpio.h
> > index 3d11884..87bb4a0 100644
> > --- a/arch/powerpc/include/asm/mpc85xx_gpio.h
> > +++ b/arch/powerpc/include/asm/mpc85xx_gpio.h
> > @@ -20,7 +20,7 @@
> > static inline void mpc85xx_gpio_set
> >
> > Hi York,
> > I double checked the offset address of GPIO, I found that the offset
> > addresses of GPIO on the boards you mentioned above are all changed to
> > 0x0, not 0xc00 according to the newest RM.
> > I do found that the offset address is 0xc00 in some old RMs.
> > You can find the n
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