Nano with SPI Flash support
sunxi: add support for UART at PF for suniv
sunxi: do not set PF MMC0 pinmux when PF uart is used
sunxi: allow to enable MMC driver when using PF UART0
Yifan Gu (9):
arm: dts: sunxi: do not renumber if mmc2 does not exist
board: licheepi_nano: set CONFIG_MMC_SUN
From: Icenowy Zheng
Lichee Pi Nano is a board based on F1C100s.
Add support for it.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/dts/Makefile| 2 +
arch/arm/dts/suniv-f1c100s-licheepi-nano.dts | 43
configs
From: Icenowy Zheng
The BROM of suniv do not pass the info of boot media to SPL.
Add boot sequence for SPL to try again for the available boot media.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/mach-sunxi/board.c | 22 ++
1 file changed, 22
From: Icenowy Zheng
The suniv SoC has two SPI controllers, in which SPI0 is bootable.
Add device tree node of the controller and its bootable pinmux node.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/dts/suniv.dtsi | 18 ++
1 file changed, 18 insertions
From: Icenowy Zheng
The Lichee Pi Nano board has a Winbond W25Q128 SPI flash on it.
Enable it.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/dts/suniv-f1c100s-licheepi-nano.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/dts/suniv
From: Icenowy Zheng
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/mach-sunxi/board.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index e84687973a..b471933ec8 100644
--- a/arch/arm/mach
From: Icenowy Zheng
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
configs/licheepi_nano_spiflash_defconfig | 25
1 file changed, 25 insertions(+)
create mode 100644 configs/licheepi_nano_spiflash_defconfig
diff --git a/configs
From: Icenowy Zheng
The ARMv7 start code has support for saving some boot params at the
entry point, which is used by some SoCs to return to BROM.
Port this to ARM926EJ-S start code.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/cpu/arm926ejs/start.S | 19
From: Icenowy Zheng
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
board/sunxi/board.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 27ab44b67c..748c1a8673 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi
From: Icenowy Zheng
Add support for the suniv architecture, which is newer ARM9 SoCs by
Allwinner. The design of it seems to be a mixture of sun3i, sun4i and
sun6i.
Signed-off-by: Icenowy Zheng
Rebased-by: George Hilliard
Signed-off-by: Yifan Gu
---
arch/arm/dts/suniv-f1c100s.dtsi
From: Icenowy Zheng
As the pinmux setup of MMC0 at PF is masked, the sunxi MMC driver is now
harmless for PF uart setup, and it may be used for the extra MMC port.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
drivers/mmc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion
suniv ddr memory starts at 0x800. Set SYS_TEXT_BASE accordingly so
SPL can copy U-Boot proper to DRAM.
Signed-off-by: Yifan Gu
---
common/Kconfig.boot | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 642dd9bcfb..23c6db286a
Signed-off-by: Yifan Gu
---
arch/arm/dts/suniv.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/suniv.dtsi b/arch/arm/dts/suniv.dtsi
index bea7c08e7d..5d84f1e1af 100644
--- a/arch/arm/dts/suniv.dtsi
+++ b/arch/arm/dts/suniv.dtsi
@@ -126,6 +126,11
Signed-off-by: Yifan Gu
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c| 4
2 files changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 26c900fb11..2b03325adf 100644
--- a
From: Icenowy Zheng
The suniv SoC come with a sun6i-style SPI controller at the base address
of sun4i SPI controller. The module clock of the SPI controller is also
missing.
Add support for it.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/include/asm/arch-sunxi/gpio.h
From: Icenowy Zheng
Some Allwinner SoCs use ARM926EJ-S core.
Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory.
Signed-off-by: Icenowy Zheng
Signed-off-by: Yifan Gu
---
arch/arm/cpu/arm926ejs/Makefile | 1 +
arch/arm/cpu/arm926ejs/sunxi/Makefile| 16
From: George Hilliard
The arm926 code provides this function. Disable it here.
Signed-off-by: George Hilliard
Signed-off-by: Yifan Gu
---
arch/arm/mach-sunxi/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
suniv cannot boot with this mmc optimization, as suniv fifo level
register is only 4 bits.
Disable this optimization for suniv for now.
Signed-off-by: Yifan Gu
---
drivers/mmc/sunxi_mmc.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers
Signed-off-by: Yifan Gu
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/suniv-f1c100s-pocketgo.dts | 48 +
configs/pocketgo_defconfig | 12 +++
3 files changed, 62 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/suniv
The BROM of suniv does not pass info to SPL, and it should always boot
from the 8KB offset.
Signed-off-by: Yifan Gu
---
arch/arm/mach-sunxi/board.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 7fa44b6f3a
From: George Hilliard
suniv needs slightly different register settings to enable the SPI
peripheral. The magic numbers are already provided by the architecture
support; we just have to check for them here.
Signed-off-by: George Hilliard
Signed-off-by: Yifan Gu
---
drivers/spi/spi-sunxi.c
---
configs/licheepi_nano_defconfig | 1 +
configs/licheepi_nano_spiflash_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig
index 6e455baadf..6ea73c6408 100644
--- a/configs/licheepi_nano_defconfig
+++ b/confi
Signed-off-by: Yifan Gu
---
arch/arm/mach-sunxi/dram_suniv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-sunxi/dram_suniv.c b/arch/arm/mach-sunxi/dram_suniv.c
index 40aebf6eba..e7460ec3c3 100644
--- a/arch/arm/mach-sunxi/dram_suniv.c
+++ b/arch/arm/mach-sunxi/dram_suniv.c
.
Restore these settings when resetting the peripheral.
Signed-off-by: George Hilliard
Signed-off-by: Yifan Gu
---
drivers/spi/spi-sunxi.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index 4ca5d3a93a..aa392502b7
From: George Hilliard
The f1c100s has a controller pretty similar to that of most sunxi parts,
but there are only 6 banks. Add a new compatible entry for this
peripheral.
Signed-off-by: George Hilliard
Signed-off-by: Yifan Gu
---
drivers/gpio/sunxi_gpio.c | 6 ++
1 file changed, 6
From: George Hilliard
The f1c100s has a simple clock tree similar to those of other sunxi
parts. Add support for it.
Signed-off-by: George Hilliard
Signed-off-by: Yifan Gu
---
drivers/clk/sunxi/Kconfig | 7
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_f1c100s.c
From: George Hilliard
The f1c100s has two MMC controllers. Add device tree nodes for them.
Signed-off-by: George Hilliard
Signed-off-by: Yifan Gu
---
arch/arm/dts/suniv.dtsi | 47 +
1 file changed, 47 insertions(+)
diff --git a/arch/arm/dts
We renumber mmc2 to mmc1 for sunxi devices, but if mmc2 does not exist
dts will not build.
This patch prevents that by checking CONFIG_MMC_SUNXI_SLOT_EXTRA.
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi
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