On 9/5/2023 6:09 PM, Fei Wu wrote:
> In order to enable PCIe passthrough on qemu riscv, the physical memory
> range between 3GB and 4GB is reserved. Therefore if guest has 4GB ram,
> two ranges are created as [2G, 3G) and [4G, 7G), currently u-boot sets
> ram_top to 4G - 1 if the gd->ram_top is abo
On 9/13/2023 1:05 PM, Heinrich Schuchardt wrote:
>
>
> Am 13. September 2023 04:23:14 MESZ schrieb "Wu, Fei" :
>> On 9/5/2023 6:09 PM, Fei Wu wrote:
>>> In order to enable PCIe passthrough on qemu riscv, the physical memory
>>> range between 3GB and
On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
>
>
> Am 14. September 2023 07:30:55 MESZ schrieb Fei Wu :
>> In order to enable PCIe passthrough on qemu riscv, the physical memory
>> range between 3GB and 4GB is reserved. Therefore if guest has 4GB ram,
>> two ranges are created as [2G, 3G) and
On 9/14/2023 2:48 PM, Wu, Fei wrote:
> On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
>>
>>
>> Am 14. September 2023 07:30:55 MESZ schrieb Fei Wu :
>>> In order to enable PCIe passthrough on qemu riscv, the physical memory
>>> range between 3GB and 4GB is r
On 9/14/2023 3:20 PM, Heinrich Schuchardt wrote:
> On 9/14/23 08:48, Wu, Fei wrote:
>> On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
>>>
>>>
>>> Am 14. September 2023 07:30:55 MESZ schrieb Fei Wu :
>>>> In order to enable PCIe passthrough on qe
On 9/14/2023 6:21 PM, Heinrich Schuchardt wrote:
> On 9/14/23 09:42, Wu, Fei wrote:
>> On 9/14/2023 3:20 PM, Heinrich Schuchardt wrote:
>>> On 9/14/23 08:48, Wu, Fei wrote:
>>>> On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
>>>>>
>>>>&
On 9/14/2023 6:21 PM, Heinrich Schuchardt wrote:
> On 9/14/23 09:42, Wu, Fei wrote:
>> On 9/14/2023 3:20 PM, Heinrich Schuchardt wrote:
>>> On 9/14/23 08:48, Wu, Fei wrote:
>>>> On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
>>>>>
>>>>&
On 9/26/2023 3:16 PM, Heinrich Schuchardt wrote:
> Remove dram_init_banksize() on the architecture level.
>
> Limiting used RAM to under 4 GiB is only necessary for CPUs which have a
> DMA issue. SoC specific code already exists for FU540, FU740, JH7110.
>
> Not all RISC-V boards will have memory
On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
>
>
> Am 14. September 2023 07:30:55 MESZ schrieb Fei Wu :
>> In order to enable PCIe passthrough on qemu riscv, the physical memory
>> range between 3GB and 4GB is reserved. Therefore if guest has 4GB ram,
>> two ranges are created as [2G, 3G) and
On 10/9/2023 6:04 PM, Wu, Fei wrote:
> On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
>>
>>
>> Am 14. September 2023 07:30:55 MESZ schrieb Fei Wu :
>>> In order to enable PCIe passthrough on qemu riscv, the physical memory
>>> range between 3GB and 4GB is r
Hi All,
I am working on enabling PCIe passthrough on qemu risc-v, in order for
the guest to access the host x86 pci resource directly, ram on guest
won't cover this range, so if guest has 4GB ram, two ranges are created:
1. 2G-3G
2. 4G-7G
u-boot is not able to handle this but reports:
Reserv
On 8/7/2023 3:50 PM, Wu, Fei wrote:
> Hi All,
>
> I am working on enabling PCIe passthrough on qemu risc-v, in order for
> the guest to access the host x86 pci resource directly, ram on guest
> won't cover this range, so if guest has 4GB ram, two ranges are created:
>
12 matches
Mail list logo