[v4 03/17] arm: socfpga: soc64: Override 'lowlevel_init' to support ATF

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang Override 'lowlevel_init' to make sure secondary CPUs trapped in ATF instead of SPL. After ATF is initialized, it will signal the secondary CPUs to jump from SPL to ATF waiting to be 'activated' by Linux OS via PSCI call. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpg

[v4 05/17] arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits)

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang invoke_smc() allow U-Boot proper running in non-secure mode (EL2) to invoke SMC call to ATF's PSCI runtime services such as System Manager's registers access, 2nd phase bitstream FPGA reconfiguration, Remote System Update (RSU) and etc. smc_send_mailbox() is a send mailbox co

[v4 06/17] arm: socfpga: soc64: Define SMC function identifiers for PSCI SiP services

2020-12-17 Thread Siew Chin Lim
sters access, 2nd phase bitstream FPGA reconfiguration, Remote System Update (RSU) and etc. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- include/linux/intel-smc.h | 573 ++ 1 file changed, 573 insertions(+) create mode 100644 include/

[v4 07/17] arm: socfpga: Add secure register access helper functions for SoC 64bits

2020-12-17 Thread Siew Chin Lim
These secure register access functions allow U-Boot proper running at EL2 (non-secure) to access System Manager's secure registers by calling the ATF's PSCI runtime services (EL3/secure). Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Makefile | 1 +

[v4 08/17] mmc: dwmmc: socfpga: Add ATF support for MMC driver

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), MMC driver calls the SMC/PSCI services provided by ATF to set SDMMC's DRVSEL and SMPLSEL. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- v2 --- Call secure register access helper function to write the secure register --- dr

[v4 09/17] net: designware: socfpga: Add ATF support for MAC driver

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), MAC driver calls the SMC/PSCI services provided by ATF to setup the PHY interface. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- v2 --- Call secure register access helper function to write the secure register --- drivers/net

[v4 10/17] arm: socfpga: soc64: Add ATF support for Reset Manager driver

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), Reset Manager driver calls the SMC/PSCI service provided by ATF to enable/disable the SOCFPGA bridges. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/reset_manager_s10.c | 13 + 1 file changed, 13

[v4 11/17] arm: socfpga: soc64: Add ATF support for FPGA reconfig driver

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), FPGA reconfiguration driver calls the SMC/PSCI services provided by ATF to configure the FPGA. Signed-off-by: Chee Hong Ang --- drivers/fpga/intel_sdm_mb.c | 139 1 file changed, 139 insertions(+) diff

[v4 12/17] arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold()

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang mbox_reset_cold() will invoke ATF's PSCI service when running in non-secure mode (EL2). Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/mailbox_s10.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-socfpga

[v4 13/17] arm: socfpga: soc64: SSBL shall not setup stack on OCRAM

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang Since SSBL is running in DRAM, it shall setup the stack in DRAM instead of OCRAM which is occupied by SPL and handoff data. Signed-off-by: Chee Hong Ang --- include/configs/socfpga_soc64_common.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/configs/socfp

[v4 14/17] arm: socfpga: soc64: Skip handoff data access in SSBL

2020-12-17 Thread Siew Chin Lim
From: Chee Hong Ang SPL already setup the Clock Manager with the handoff data from OCRAM. When the Clock Manager's driver get probed again in SSBL, it shall skip the handoff data access in OCRAM. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 3 ++- 1 file chang

[v4 15/17] arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support

2020-12-17 Thread Siew Chin Lim
Add binman node to device tree to generate the FIT image for u-boot (u-boot.itb) and OS kernel (kernel.itb). u-boot.itb contains arm trusted firmware (ATF), u-boot proper and u-boot device tree for ATF u-boot flow. kernel.itb contains Linux Image and Linux device tree. Signed-off-by: Siew Chin

[v4 16/17] arm: socfpga: soc64: Enable FIT image generation using binman

2020-12-17 Thread Siew Chin Lim
boot with and without VAB feature, we skip binman for ARCH_SOCFPGA in default Makefile flow. User always use 'make fit-itb' to generate FIT image after successfully compile u-boot. Signed-off-by: Siew Chin Lim --- v2 --- Adjust BINMAN sequence in code, sorted by alphabetical

[v4 17/17] configs: socfpga: Add defconfig for Agilex and Stratix 10 with ATF support

2020-12-17 Thread Siew Chin Lim
TEXT_BASE). ATF will occupy the address range starting from 0x1000. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- ...ilex_defconfig => socfpga_agilex_atf_defconfig} | 22 ...0_defconfig => socfpga_stratix10_atf_defconfig} | 24 +- 2 fi

[v2 01/22] odroid-c2: Use devicetree for SMBIOS settings

2020-11-09 Thread Siew Chin Lim
From: Simon Glass Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 23 +++ configs/odroid-c2_defconfig | 4 +

[v2 00/22] Add Intel Diamond Mesa SoC support

2020-11-09 Thread Siew Chin Lim
rt Pali Rohár (1): Makefile: Fix calling make with V=1 Siew Chin Lim (2): arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support arm: socfpga: soc64: Enable FIT image generation using binman Simon Glass (5): odroid-c2: Use devicetree for SMBIOS settings arm64: mvebu:

[v2 02/22] arm64: mvebu: Use devicetree for SMBIOS settings on uDPU

2020-11-09 Thread Siew Chin Lim
From: Simon Glass Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/dts/armada-3720-uDPU-u-boot.dtsi | 20 configs/uDPU_defconfig| 3 ++- 2 fil

[v2 06/22] Makefile: Fix calling make with V=1

2020-11-09 Thread Siew Chin Lim
From: Pali Rohár Calling 'make V=1 all' on Ubuntu 18.04 with gcc version 9.2.1 and GNU Make version 4.1 fails on error: scripts/Kbuild.include:220: *** Recursive variable 'echo-cmd' references itself (eventually). Stop. As a workaround expand 'echo-cmd' variable via 'call' construction in

[v2 03/22] x86: galileo: Use devicetree for SMBIOS settings

2020-11-09 Thread Siew Chin Lim
From: Simon Glass Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/dts/galileo.dts| 28 board/intel/galileo/Kconfig | 11 --- 2 files changed,

[v2 05/22] smbios: Drop the unused Kconfig options

2020-11-09 Thread Siew Chin Lim
From: Simon Glass Now that we can use devicetree to specify this information, drop the old CONFIG options. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- configs/clearfog_gt_8k_defconfig| 2 -- configs/mt7622_rfb_defconfig| 1 - configs/mvebu_db_armada8k_defconfig | 2 --

[v2 04/22] x86: Provide default SMBIOS manufacturer/product

2020-11-09 Thread Siew Chin Lim
From: Simon Glass Add a file containing defaults for these, using the existing CONFIG options. This file must be included with #include since it needs to be passed through the C preprocessor. Enable the driver for all x86 boards that generate SMBIOS tables. Disable it for coral since it has its

[v2 09/22] arm: socfpga: soc64: Override 'lowlevel_init' to support ATF

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang Override 'lowlevel_init' to make sure secondary CPUs trapped in ATF instead of SPL. After ATF is initialized, it will signal the secondary CPUs to jump from SPL to ATF waiting to be 'activated' by Linux OS via PSCI call. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpg

[v2 08/22] arm: socfpga: soc64: Load FIT image with ATF support

2020-11-09 Thread Siew Chin Lim
e Hong Ang Signed-off-by: Siew Chin Lim --- include/configs/socfpga_soc64_common.h | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index fb5e2e8aaf..990f879b07 100644 --- a/inclu

[v2 10/22] arm: socfpga: Disable "spin-table" method for booting Linux

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang Standard PSCI function "CPU_ON" provided by ATF is now used by Linux kernel to bring up the secondary CPUs to enable SMP booting in Linux on SoC 64bits platform. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --gi

[v2 07/22] arm: socfpga: Add function for checking description from FIT image

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang Add board_fit_config_name_match() for matching board name with device tree files in FIT image. This will ensure correct DTB file is loaded for different board type. Currently, we are not supporting multiple device tree files in FIT image therefore this function basically do no

[v2 11/22] arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits)

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang invoke_smc() allow U-Boot proper running in non-secure mode (EL2) to invoke SMC call to ATF's PSCI runtime services such as System Manager's registers access, 2nd phase bitstream FPGA reconfiguration, Remote System Update (RSU) and etc. smc_send_mailbox() is a send mailbox co

[v2 14/22] net: designware: socfpga: Add ATF support for MAC driver

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), MAC driver calls the SMC/PSCI services provided by ATF to setup the PHY interface. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- drivers/net/dwmac_socfpga.c | 30 ++ 1 file changed, 26 insertions(+), 4

[v2 13/22] mmc: dwmmc: socfpga: Add ATF support for MMC driver

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), MMC driver calls the SMC/PSCI services provided by ATF to set SDMMC's DRVSEL and SMPLSEL. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- drivers/mmc/socfpga_dw_mmc.c | 17 + 1 file changed, 17 insertions(+)

[v2 15/22] arm: socfpga: soc64: Add ATF support for Reset Manager driver

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), Reset Manager driver calls the SMC/PSCI service provided by ATF to enable/disable the SOCFPGA bridges. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/reset_manager_s10.c | 13 + 1 file changed, 13

[v2 12/22] arm: socfpga: soc64: Define SMC function identifiers for PSCI SiP services

2020-11-09 Thread Siew Chin Lim
sters access, 2nd phase bitstream FPGA reconfiguration, Remote System Update (RSU) and etc. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- include/linux/intel-smc.h | 573 ++ 1 file changed, 573 insertions(+) create mode 100644 include/

[v2 19/22] arm: socfpga: soc64: Skip handoff data access in SSBL

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang SPL already setup the Clock Manager with the handoff data from OCRAM. When the Clock Manager's driver get probed again in SSBL, it shall skip the handoff data access in OCRAM. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 3 ++- 1 file chang

[v2 18/22] arm: socfpga: soc64: SSBL shall not setup stack on OCRAM

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang Since SSBL is running in DRAM, it shall setup the stack in DRAM instead of OCRAM which is occupied by SPL and handoff data. Signed-off-by: Chee Hong Ang --- include/configs/socfpga_soc64_common.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/configs/socfp

[v2 16/22] arm: socfpga: soc64: Add ATF support for FPGA reconfig driver

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang In non-secure mode (EL2), FPGA reconfiguration driver calls the SMC/PSCI services provided by ATF to configure the FPGA. Signed-off-by: Chee Hong Ang --- drivers/fpga/intel_sdm_mb.c | 139 1 file changed, 139 insertions(+) diff

[v2 21/22] arm: socfpga: soc64: Enable FIT image generation using binman

2020-11-09 Thread Siew Chin Lim
boot with and without VAB feature, we skip binman for ARCH_SOCFPGA in default Makefile flow. User always use 'make fit-itb' to generate FIT image after successfully compile u-boot. Signed-off-by: Siew Chin Lim --- Makefile | 7 +++ arch/arm/mach-socfpga/Kco

[v2 17/22] arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold()

2020-11-09 Thread Siew Chin Lim
From: Chee Hong Ang mbox_reset_cold() will invoke ATF's PSCI service when running in non-secure mode (EL2). Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/mailbox_s10.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-socfpga

[v2 22/22] configs: socfpga: Add defconfig for Agilex and Stratix 10 with ATF support

2020-11-09 Thread Siew Chin Lim
TEXT_BASE). ATF will occupy the address range starting from 0x1000. Signed-off-by: Chee Hong Ang Signed-off-by: Siew Chin Lim --- configs/socfpga_agilex_atf_defconfig| 72 configs/socfpga_stratix10_atf_defconfig | 74 + 2 files cha

[v2 20/22] arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support

2020-11-09 Thread Siew Chin Lim
Add binman node to device tree to generate the FIT image for u-boot (u-boot.itb) and OS kernel (kernel.itb). u-boot.itb contains arm trusted firmware (ATF), u-boot proper and u-boot device tree for ATF u-boot flow. kernel.itb contains Linux Image and Linux device tree. Signed-off-by: Siew Chin

[RESEND v2 01/22] arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

2020-11-09 Thread Siew Chin Lim
Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex. Signed-off-by: Siew Chin Lim --- arch/arm/Kconfig| 6 +++--- arch/arm/mach-socfpga/Kconfig | 5 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 3 +-- arch

[RESEND v2 00/22] Add Intel Diamond Mesa SoC support

2020-11-09 Thread Siew Chin Lim
U-Boot https://patchwork.ozlabs.org/project/uboot/cover/20201015122955.10259-1-elly.siew.chin@intel.com/ Note: [1]: https://www.intel.com/content/www/us/en/products/programmable/asic/easic-devices/diamond-mesa-soc-devices.html Siew Chin Lim (22): arm: socfpga: Move Stratix10 and

[RESEND v2 06/22] arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c

2020-11-09 Thread Siew Chin Lim
Rename to common file name to used by all SOC64 devices. No functionality change. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Makefile | 5 +++-- .../mach-socfpga/{system_manager_s10.c => system_manager_soc64.c}| 0 2 files changed

[RESEND v2 02/22] arm: socfpga: dm: Add base address for Intel Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Reuse base_addr_s10.h for Diamond Mesa, the address is the same as Agilex. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach

[RESEND v2 04/22] arm: socfpga: Rename Stratix10 and Agilex handoff common macros

2020-11-09 Thread Siew Chin Lim
Rename handoff_s10.h to handoff_soc64.h. Changed macros prefix from S10_HANDOFF to SOC64_HANDOFF. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/clock_manager_s10.c | 2 +- arch/arm/mach-socfpga/include/mach/handoff_s10.h | 39 -- arch/arm/mach-socfpga

[RESEND v2 03/22] arm: socfpga: dm: Add firewall support for Agilex and Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Disable the MPFE firewall for SMMU and HMC adapter for Agilex and Diamond Mesa. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/firewall.c | 10 ++ arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 1 + arch/arm/mach-socfpga/include/mach/firewall.h | 6

[RESEND v2 11/22] arm: socfpga: dm: Get clock manager base address for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Add Diamond Mesa clock manager to socfpga_get_managers_addr function. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/misc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index ac2b891fad..b63eec779a 100644 --- a/arch

[RESEND v2 08/22] arm: socfpga: Restructure Stratix10 and Agilex handoff code

2020-11-09 Thread Siew Chin Lim
handoff function in wrap_handoff_soc64.c. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Makefile | 4 +- arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 21 +++ .../include/mach/system_manager_soc64.h| 4 -- arch/arm/mach-socfpga

[RESEND v2 07/22] arm: socfpga: Rearrange sequence of macros in handoff_soc64.h

2020-11-09 Thread Siew Chin Lim
No functionality change. In preparation for Stratix10 and Agilex handoff function restructuring. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 46 +++--- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-socfpga

[RESEND v2 10/22] drivers: clk: dm: Add clock driver for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Add clock manager driver for Diamond Mesa. Provides clock initialization and get_rate functions. Signed-off-by: Siew Chin Lim --- drivers/clk/altera/Makefile | 3 +- drivers/clk/altera/clk-dm.c | 504 +++ drivers/clk/altera/clk-dm.h

[RESEND v2 09/22] arm: socfpga: Add handoff data support for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Diamond Mesa support both HPS handoff data and DDR handoff data. HPS handoff data support re-use Straix10 and Agilex code. DDR handoff data is newly introduced in Diamond Mesa. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 19 ++ arch/arm/mach

[RESEND v2 14/22] arm: socfpga: Changed to store QSPI reference clock in kHz

2020-11-09 Thread Siew Chin Lim
limited bits, QSPI reference clock frequency is converted to kHz from Hz. Signed-off-by: Siew Chin Lim Signed-off-by: Tien Fong Chee --- arch/arm/mach-socfpga/clock_manager.c | 5 ++-- .../include/mach/system_manager_soc64.h| 12 +- arch/arm/mach-socfpga

[RESEND v2 12/22] drivers: clk: dm: Add memory clock driver for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Add memory clock manager driver for Diamond Mesa. Provides clock initialization and enable functions. Signed-off-by: Siew Chin Lim --- drivers/clk/altera/Makefile | 2 +- drivers/clk/altera/clk-mem-dm.c | 135 drivers/clk/altera/clk-mem-dm.h | 80

[RESEND v2 13/22] arm: socfpga: Move Stratix10 and Agilex clock manager common code

2020-11-09 Thread Siew Chin Lim
Move duplicated function cm_get_qspi_controller_clk_hz to clock_manager.c. Signed-off-by: Siew Chin Lim Signed-off-by: Tien Fong Chee --- arch/arm/mach-socfpga/clock_manager.c | 10 ++ arch/arm/mach-socfpga/clock_manager_agilex.c | 6 -- arch/arm/mach

[RESEND v2 19/22] board: intel: dm: Add socdk board support for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Add Diamond Mesa SoC devkit board. Signed-off-by: Siew Chin Lim --- board/intel/dm-socdk/MAINTAINERS | 7 +++ board/intel/dm-socdk/Makefile| 7 +++ board/intel/dm-socdk/socfpga.c | 7 +++ 3 files changed, 21 insertions(+) create mode 100644 board/intel/dm-socdk/MAINTAINERS

[RESEND v2 18/22] arm: socfpga: dm: Add SPL for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/spl_dm.c | 93 ++ 1 file changed, 93 insertions(+) create mode 100644 arch/arm/mach-socfpga/spl_dm.c diff --git a/arch/arm/mach-socfpga/spl_dm.c b/arch/arm/mach-socfpga/spl_dm.c new file mode 100644

[RESEND v2 15/22] arm: socfpga: dm: Add clock manager for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Add clock manager for Diamond Mesa. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/clock_manager_dm.c | 79 ++ arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 + .../mach-socfpga/include/mach/clock_manager_dm.h | 14 3 files changed, 95

[RESEND v2 17/22] arm: socfpga: Move Stratix10 and Agilex SPL common code

2020-11-09 Thread Siew Chin Lim
Move Stratix10 and Agilex SPL common code to spl_soc64.c Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Makefile | 2 ++ arch/arm/mach-socfpga/spl_agilex.c | 16 arch/arm/mach-socfpga/spl_s10.c| 17 - arch/arm/mach-socfpga/spl_soc64.c | 26

[RESEND v2 16/22] ddr: altera: dm: Add SDRAM driver for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
DMEM binaries are also part of bitstream, this bitstream would be loaded to OCRAM by SDM, and configured by DDR driver. Signed-off-by: Siew Chin Lim Signed-off-by: Tien Fong Chee --- arch/arm/mach-socfpga/include/mach/firewall.h |1 + .../include/mach/system_manager_soc64.h

[RESEND v2 21/22] configs: dm: Add Diamond Mesa CONFIGs

2020-11-09 Thread Siew Chin Lim
Add CONFIGs for Diamond Mesa. Signed-off-by: Siew Chin Lim --- include/configs/socfpga_dm_socdk.h | 46 ++ 1 file changed, 46 insertions(+) create mode 100644 include/configs/socfpga_dm_socdk.h diff --git a/include/configs/socfpga_dm_socdk.h b/include

[RESEND v2 05/22] arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c

2020-11-09 Thread Siew Chin Lim
Rename to common file name to used by all SOC64 devices. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Makefile| 4 ++-- .../mach-socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c} | 2 +- 2 files changed, 3 insertions(+), 3 deleti

[RESEND v2 22/22] arm: socfpga: dm: Enable Intel Diamond Mesa build

2020-11-09 Thread Siew Chin Lim
Add defconfig for Diamond Mesa to support both legacy boot flow and ATF boot flow. Legacy boot: SPL -> U-Boot proper -> OS (Linux) ATF boot flow: SPL -> ATF(BL31) -> U-Boot proper -> OS (Linux) Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Kconfig| 19 ++

[RESEND v2 20/22] arm: dts: dm: Add base dtsi and devkit dts for Diamond Mesa

2020-11-09 Thread Siew Chin Lim
Add device tree for Diamond Mesa. Signed-off-by: Siew Chin Lim Signed-off-by: Tien Fong Chee --- arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_dm-u-boot.dtsi | 102 + arch/arm/dts/socfpga_dm.dtsi | 640 ++ arch/arm

[v1 2/5] arm: socfpga: cmd: Support 'vab' command

2020-11-09 Thread Siew Chin Lim
Support 'vab' command to perform vendor authentication. Command format: vab addr len Authorize 'len' bytes starting at 'addr' via vendor public key Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Makefile | 2 ++ arch/

[v1 1/5] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

2020-11-09 Thread Siew Chin Lim
Secure Device Manager (SDM) for authentication. U-Boot will validate the SHA384 of the image against the SHA384 hash stored in the VAB certificate before sending the image to SDM for authentication. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Kconfig| 15 ++ arch/arm

[v1 0/5] Add Vendor Authorized Boot (VAB) support

2020-11-09 Thread Siew Chin Lim
-elly.siew.chin@intel.com/ Siew Chin Lim (5): arm: socfpga: soc64: Support Vendor Authorized Boot (VAB) arm: socfpga: cmd: Support 'vab' command arm: socfpga: dts: soc64: Update filename in binman node of FIT image with VAB support configs: socfpga: soc64: Remove 'run li

[v1 5/5] configs: socfpga: Add defconfig for Agilex and Diamond Mesa with VAB support

2020-11-09 Thread Siew Chin Lim
Booting Agilex and Diamond Mesa with Vendor Authorized Boot. Signed-off-by: Siew Chin Lim --- configs/{socfpga_agilex_atf_defconfig => socfpga_agilex_vab_defconfig} | 3 ++- configs/{socfpga_dm_atf_defconfig => socfpga_dm_vab_defconfig} | 3 ++- 2 files changed, 4 insertions

[v1 4/5] configs: socfpga: soc64: Remove 'run linux_qspi_enable' from bootcommand

2020-11-09 Thread Siew Chin Lim
Remove 'run linux_qspi_enable' from bootcommand. When using FIT for OS boot, 'run linux_qspi_enable' will be called 'board_prep_linux' function. Signed-off-by: Siew Chin Lim --- include/configs/socfpga_soc64_common.h | 3 +-- 1 file changed, 1 insertion(+), 2 dele

[v1 3/5] arm: socfpga: dts: soc64: Update filename in binman node of FIT image with VAB support

2020-11-09 Thread Siew Chin Lim
FIT image of Vendor Authentication Coot (VAB) contains signed images. Signed-off-by: Siew Chin Lim --- arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi b/arch/arm/dts

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