+0800, Bin Meng wrote:
> > > > Hi Rick,
> > > >
> > > > On Wed, Oct 30, 2019 at 10:50 AM Rick Chen wrote:
> > > > >
> > > > > Hi Bin
> > > > >
> > > > > >
> > > > > > Hi Rick,
> &
gt; > On Wed, Oct 30, 2019 at 06:38:00PM +0800, Bin Meng wrote:
> > > > > Hi Rick,
> > > > >
> > > > > On Wed, Oct 30, 2019 at 10:50 AM Rick Chen
> > > > > wrote:
> > > > > >
> > > > > &g
Hi Anup
>
> On Tue, Nov 5, 2019 at 7:19 AM Rick Chen wrote:
> >
> > Hi Anup
> >
> > > > On Thu, Oct 31, 2019 at 1:42 PM Anup Patel wrote:
> > > > >
> > > > > On Thu, Oct 31, 2019 at 6:30 AM Alan Kao
> > > > &
Hi Anup
>
> On Wed, Nov 6, 2019 at 2:18 PM Anup Patel wrote:
> >
> > On Wed, Nov 6, 2019 at 12:14 PM Rick Chen wrote:
> > >
> > > Hi Anup
> > >
> > > >
> > > > On Tue, Nov 5, 2019 at 7:19 AM Rick Chen wrote:
> > >
Hi Anup
> On Wed, Nov 6, 2019 at 2:51 PM Rick Chen wrote:
> >
> > Hi Anup
> >
> > >
> > > On Wed, Nov 6, 2019 at 2:18 PM Anup Patel wrote:
> > > >
> > > > On Wed, Nov 6, 2019 at 12:14 PM Rick Chen wrote:
> > > > >
&
Hi Anup
>
> On Thu, Nov 7, 2019 at 10:45 AM Anup Patel wrote:
> >
> > On Thu, Nov 7, 2019 at 7:04 AM Rick Chen wrote:
> > >
> > > Hi Anup
> > >
> > > > On Wed, Nov 6, 2019 at 2:51 PM Rick Chen wrote:
> > > > >
> >
Hi Anup & Lukas
Anup Patel 於 2019年11月7日 週四 下午6:44寫道：
>
> On Thu, Nov 7, 2019 at 3:11 PM Auer, Lukas
> wrote:
> >
> > On Thu, 2019-11-07 at 11:48 +0530, Anup Patel wrote:
> > > On Thu, Nov 7, 2019 at 11:40 AM Rick Chen wrote:
> > > > Hi Anup
>
Hi Atish
>
> On Thu, 2019-11-07 at 19:41 +0800, Rick Chen wrote:
> > Hi Anup & Lukas
> >
> > Anup Patel 於 2019年11月7日 週四 下午6:44寫道：
> > > On Thu, Nov 7, 2019 at 3:11 PM Auer, Lukas
> > > wrote:
> > > > On Thu, 2019-11-07 at 11:48 +0530, A
Hi Anup
>
> On Thu, Nov 7, 2019 at 5:11 PM Rick Chen wrote:
> >
> > Hi Anup & Lukas
> >
> > Anup Patel 於 2019年11月7日 週四 下午6:44寫道：
> > >
> > > On Thu, Nov 7, 2019 at 3:11 PM Auer, Lukas
> > > wrote:
> > > >
> > &
Hi Atish
>
> Hi Atish
>
> >
> > On Thu, 2019-11-07 at 19:41 +0800, Rick Chen wrote:
> > > Hi Anup & Lukas
> > >
> > > Anup Patel 於 2019年11月7日 週四 下午6:44寫道：
> > > > On Thu, Nov 7, 2019 at 3:11 PM Auer, Lukas
> > >
Hi Lukas
>
> Hi Rick,
>
> On Fri, 2019-11-08 at 15:27 +0800, Rick Chen wrote:
> > Hi Atish
> >
> > > Hi Atish
> > >
> > > > On Thu, 2019-11-07 at 19:41 +0800, Rick Chen wrote:
> > > > > Hi Anup & Lukas
> > > > &
Hi Lukas
>
> Hi Rick,
>
> On Mon, 2019-11-11 at 15:19 +0800, Rick Chen wrote:
> > Hi Lukas
> >
> > > Hi Rick,
> > >
> > > On Fri, 2019-11-08 at 15:27 +0800, Rick Chen wrote:
> > > > Hi Atish
> > > >
> > > &
t them locally.
>
> Signed-off-by: Vignesh Raghavendra
Reviewed-by: Rick Chen
> ---
> arch/arm/include/asm/dma-mapping.h | 22 --
> arch/nds32/include/asm/dma-mapping.h | 22 --
> arch/riscv/include/asm/dma-mapping.h | 22 +++
Hi Sean
> From: Sean Anderson [mailto:sean...@gmail.com]
> Sent: Wednesday, April 08, 2020 10:21 PM
> To: Bin Meng; Rick Jian-Zhi Chen(陳建志); Lukas Auer; Anup Patel; Atish Patra;
> Pragnesh Patel; U-Boot Mailing List
> Subject: Re: [PATCH 4/7] riscv: Add SMP Kconfig option dependency for U-Boot
>
於 2020年4月17日 週五 上午8:39寫道：
>
>
>
> -Original Message-
> From: Atish Patra [mailto:ati...@atishpatra.org]
> Sent: Wednesday, April 15, 2020 7:18 AM
> To: Bin Meng
> Cc: Ard Biesheuvel; Heinrich Schuchardt; U-Boot Mailing List; Anup Patel;
> Lukas Auer; Alexander Graf; Rick Jian-Zhi Chen(陳建志
Hi Bin
> Hi Rick,
>
> On Fri, Apr 17, 2020 at 8:51 AM Rick Chen wrote:
> >
> > 於 2020年4月17日 週五 上午8:39寫道：
> > >
> > >
> > >
> > > -Original Message-
> > > From: Atish Patra [mailto:ati...@atishpatra.org]
> > &g
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Saturday, April 18, 2020 10:44 PM
> To: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com; Paul
> Walmsley; Simon Glass; Trevor Woerner
> Subject: RE: [PATCH v2] ri
Hi Atish
> From: Atish Patra [mailto:atish.pa...@wdc.com]
> Sent: Sunday, April 19, 2020 3:32 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra; Bin Meng; Anup Patel; Lukas Auer; Heinrich Schuchardt;
> ag...@csgraf.de; ard.biesheu...@linaro.org; Marcus Comstedt; Paul Walmsley;
> Rick Jian-Zhi Chen
Hi Atish
> On Mon, Apr 20, 2020 at 1:41 AM Rick Chen wrote:
> >
> > Hi Atish
> >
> > > From: Atish Patra [mailto:atish.pa...@wdc.com]
> > > Sent: Sunday, April 19, 2020 3:32 AM
> > > To: u-boot@lists.denx.de
> > > Cc: Atish Patra; Bin Men
Hi Sean
> This patch series adds support for Sipeed Maix boards and the Kendryte
> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> models are similar.
>
> Known Bugs/Limitations:
> - Accessing the AI ram hangs, limiting available ram to 6M
> - Trying to boot an image with
Hi Sean
> Hi Sean
>
> > This patch series adds support for Sipeed Maix boards and the Kendryte
> > K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> > models are similar.
> >
> > Known Bugs/Limitations:
> > - Accessing the AI ram hangs, limiting available ram to 6M
> > - Tr
Hi Sean
> On 4/22/20 9:51 PM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
>
Hi Sean
>
> Hi Sean
>
> > On 4/22/20 9:51 PM, Rick Chen wrote:
> > > Hi Sean
> > >
> > >> Hi Sean
> > >>
> > >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> > >>> K210 CPU. C
Hi Sean
> On Wed, Apr 22, 2020 at 10:03:41PM -0400, Sean Anderson wrote:
> > On 4/22/20 9:51 PM, Rick Chen wrote:
> > > Hi Sean
> > >
> > >> Hi Sean
> > >>
> > >>> This patch series adds support for Sipeed Maix boards and t
five/fu540: Enable SPI-NOR support
>
> On Fri, Apr 24, 2020 at 11:48 PM Sagar Kadam wrote:
> >
> > Hello Jagan,
> >
> > > -Original Message-
> > > From: Jagan Teki
> > > Sent: Thursday, April 23, 2020 10:31 PM
> > > To: u-boot@l
> slaves.
>
> Signed-off-by: Jagan Teki
> Reviewed-by: Bin Meng
Acked-by: Rick Chen
> ---
> Changes for v4:
> - update licence
>
> arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
> create mode 100644
ive: fu540: Enable spi-nor flash support
>
> HiFive Unleashed A00 support is25wp256 spi-nor flash, So enable the same and
> add test result log for future reference.
>
> Tested on SiFive FU540 board.
>
> Signed-off-by: Jagan Teki
> Reviewed-by: Bin Meng
Acked-by: Ri
f the header */
> > + uint32_tres1; /* reserved */
> > uint64_tres2; /* reserved */
> > uint64_tres3; /* reserved */
> > - uint64_tmagic; /* Magic number */
> >
h/riscv/Kconfig b/arch/riscv/Kconfig index
> > 01975d7c60..85e15ebffa 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -224,7 +224,7 @@ config XIP
> >
> > config STACK_SIZE_SHIFT
> > int
> > - default 13
> > + default 14
> >
> > config SPL_LDSCRIPT
> > default "arch/riscv/cpu/u-boot-spl.lds"
> > --
> > 2.21.0
>
Reviewed-by: Rick Chen
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Jagan
Please check the following typos.
Or if you don't mind. I can fix it directly on the patches. :)
> From: Jagan Teki [mailto:ja...@amarulasolutions.com]
> Sent: Wednesday, October 16, 2019 10:58 PM
> To: Rick Jian-Zhi Chen(陳建志); Paul Walmsley; Palmer Dabbelt; Anup Patel;
> Atish Patra; Bi
Hi Bin
>
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:17 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > The U-Boot SPL will boot in M mode and load the
> > FIT image which include OpenSbi and U-Boot proper
>
> nits: OpenSBI
OK
>
> > im
Hi Bin
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:17 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > This patch provides four configurations
> > which can support U-Boot SPL to boot from
> > RAM or FLASH and then boot FIT image
> > includin
Hi Bin
Bin Meng 於 2019年10月29日 週二 下午10:42寫道：
>
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:17 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > To get memory size from device tree instead of
> > get_ram_size(). This can avoid memory access fault
>
>
Hi Bin
>
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:18 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > It will work fine due to hart 0 always will be main
> > hart coincidentally. When develop SPL flow, I try to
> > force other harts to be main ha
Hi Sagar
> From: Sagar Shrikant Kadam [mailto:sagar.ka...@sifive.com]
> Sent: Thursday, June 04, 2020 6:45 PM
> To: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志); lu...@denx.de
> Cc: bmeng...@gmail.com; ja...@amarulasolutions.com;
> pragnesh.pa...@sifive.com; anup.pa...@wdc.com; s...@chromium.org
Hi Sagar,
> From: Sagar Shrikant Kadam [mailto:sagar.ka...@sifive.com]
> Sent: Sunday, June 21, 2020 9:10 PM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); lu...@denx.de; bmeng...@gmail.com;
> ja...@amarulasolutions.com; pragnesh.pa...@sifive.com; anup.pa...@wdc.com;
> s...@chromium.o
Hi Tom
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Monday, May 25, 2020 11:40 PM
> To: Open Source Project uboot
> Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
>
> On Mon, May 25, 2020 at 04:01:08PM +0800, ub...@andestech.com
Hi Tom,
> On Mon, Jun 22, 2020 at 02:03:52PM +0800, Rick Chen wrote:
> > Hi Tom
> >
> > > From: Tom Rini [mailto:tr...@konsulko.com]
> > > Sent: Monday, May 25, 2020 11:40 PM
> > > To: Open Source Project uboot
> > > Cc: u-boot@lists.denx.de;
Hi Pragnesh
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Friday, May 29, 2020 2:45 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick
> Jian-Zhi C
Hi Sean
Tom Rini 於 2020年6月23日 週二 上午8:45寫道：
>
> On Mon, Jun 22, 2020 at 02:03:52PM +0800, Rick Chen wrote:
> > Hi Tom
> >
> > > From: Tom Rini [mailto:tr...@konsulko.com]
> > > Sent: Monday, May 25, 2020 11:40 PM
> > > To: Open Source Project uboot
Hi Sagar
>
> Hello Rick,
>
> > -Original Message-
> > From: Rick Chen
> > Sent: Monday, June 22, 2020 7:24 AM
> > To: Sagar Kadam
> > Cc: U-Boot Mailing List ; Lukasz Majewski
> > ; Bin Meng ; Jagan Teki
> > ; Pragnesh Patel
> &
Hi Bin
> Hi Rick,
>
> On Wed, Jun 24, 2020 at 9:36 AM Rick Chen wrote:
> >
> > Hi Sagar
> >
> > >
> > > Hello Rick,
> > >
> > > > -Original Message-
> > > > From: Rick Chen
> > > > Sent: Monda
Hi Tom
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Wednesday, June 24, 2020 10:58 AM
> To: Open Source Project uboot
> Cc: Tom Rini; U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
>
> Hi Rick,
>
> On Wed, Jun 24, 2020 at 10:41 AM wr
Hi Pragnesh
> Hi Rick,
>
> >-Original Message-----
> >From: Rick Chen
> >Sent: 24 June 2020 06:30
> >To: Pragnesh Patel
> >Cc: U-Boot Mailing List ; Atish Patra
> >; palmerdabb...@google.com; Bin Meng
> >; Paul Walmsley ( Sifive)
> >; A
Hi Bin
> Hi Rick,
>
> On Wed, Jun 24, 2020 at 1:24 PM Pragnesh Patel
> wrote:
> >
> > Hi Rick,
> >
> > >-----Original Message-
> > >From: Rick Chen
> > >Sent: 24 June 2020 10:44
> > >To: Pragnesh Patel
> > >Cc:
Hi Jagan
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, June 22, 2020 9:53 PM
> To: Jagan Teki
> Cc: Rick Jian-Zhi Chen(陳建志); Atish Patra; Palmer Dabbelt; Paul Walmsley; Anup
> Patel; Sagar Kadam; U-Boot Mailing List; linux-amarula
> Subject: Re: [PATCH v3 2/6] sifive: fu540: Add Bo
t;
> The FDT blob might not have sufficient space to hold a copy of reserved
> memory node. Expand it before the copy.
>
> Reported-by: Rick Chen
> Signed-off-by: Bin Meng
> Reviewed-by: Atish Patra
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Extend
v/Kconfig | 3 +++
> configs/sifive_fu540_defconfig | 1 -
> 2 files changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Rick Chen
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d9854f5..ff8a9f8
> 100644
> --- a/arch/riscv/Kconfig
> +++ b
Hi Jagan
> From: Jagan Teki [mailto:ja...@amarulasolutions.com]
> Sent: Tuesday, July 21, 2020 2:26 PM
> To: Rick Jian-Zhi Chen(陳建志); Atish Patra; Palmer Dabbelt; Bin Meng; Paul
> Walmsley; Anup Patel; Sagar Kadam
> Cc: U-Boot-Denx; linux-amarula
> Subject: Re: [PATCH v5 0/6] riscv: sifive/fu540:
Hi Sagar
> From: Sagar Shrikant Kadam [mailto:sagar.ka...@sifive.com]
> Sent: Friday, July 10, 2020 4:38 PM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); paul.walms...@sifive.com; pal...@dabbelt.com;
> anup.pa...@wdc.com; atish.pa...@wdc.com; lu...@denx.de;
> pragnesh.pa...@sifive.co
Hi Bin
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Friday, July 24, 2020 11:26 AM
> To: Leo Yu-Chi Liang(梁育齊); Rick Jian-Zhi Chen(陳建志)
> Cc: U-Boot Mailing List
> Subject: Re: [PATCH v4] riscv: Make SiFive HiFive Unleashed board boot again
>
> Hi Rick,
>
> On Tue, Jul 21, 2020 at 4:30 PM
df
riscv: dts: Add #address-cells and #size-cells in nor node
Those are required for cfi-flash driver to get correct address information.
Also modify size description correctly.
With this patch, there is unnecessary to re-declaration address-cells
and size-cells in nor node indeed.
Tested-by: Rick Chen
Thanks,
Rick
Hi Sean
> The riscv-timer driver currently serves as a shim for several riscv timer
> drivers. This is not too desirable because it bypasses the usual timer
> selection via the driver model. There is no easy way to specify an
> alternate timing driver, or have the tick rate depend on the cpu's
> c
Hi Sagar
> From: Sagar Kadam [mailto:sagar.ka...@sifive.com]
> Sent: Tuesday, July 28, 2020 11:19 PM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); Paul Walmsley ( Sifive); pal...@dabbelt.com;
> anup.pa...@wdc.com; atish.pa...@wdc.com; lu...@denx.de; Pragnesh Patel;
> bin.m...@windriv
於 2020年8月3日 週一 上午11:05寫道：
>
>
>
> -Original Message-
> From: Sagar Kadam [mailto:sagar.ka...@sifive.com]
> Sent: Friday, July 31, 2020 9:15 PM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); Paul Walmsley ( Sifive); pal...@dabbelt.com;
> anup.pa...@wdc.com; atish.pa...@wdc.com;
regs->a7, regs->s2, regs->s3);
> + printf("S4: " REG_FMT " S5: " REG_FMT " S6: " REG_FMT "\n",
> + regs->s4, regs->s5, regs->s6);
> + printf("S7: " REG_FMT " S8: " REG_FMT " S9: " REG_FMT "\n",
> + regs->s7, regs->s8, regs->s9);
> + printf("S10: " REG_FMT " S11: " REG_FMT " T3: " REG_FMT "\n",
> + regs->s10, regs->s11, regs->t3);
> + printf("T4: " REG_FMT " T5: " REG_FMT " T6: " REG_FMT "\n\n",
> + regs->t4, regs->t5, regs->t6);
> #endif
> }
>
> @@ -69,8 +76,14 @@ static void _exit_trap(ulong code, ulong epc, ulong tval,
> struct pt_regs *regs)
> else
> printf("Unhandled exception code: %ld\n", code);
>
> - printf("EPC: " REG_FMT " TVAL: " REG_FMT "\n", epc, tval);
> + printf("EPC: " REG_FMT " RA: " REG_FMT " TVAL: " REG_FMT "\n",
> + epc, regs->ra, tval);
> + if (gd->flags & GD_FLG_RELOC)
> + printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n\n",
> + epc - gd->reloc_off, regs->ra - gd->reloc_off);
> +
> show_regs(regs);
> + show_efi_loaded_images(epc);
> hang();
> }
>
> --
Reviewed-by: Rick Chen
eng
>
> The generic SPL version of board_init_f() should give a call to board
> specific codes to initialize board in the SPL phase.
>
> Signed-off-by: Bin Meng
> ---
Reviewed-by: Rick Chen
>
> arch/riscv/include/asm/spl.h | 7 +++
> arch/riscv/lib/spl.c
eng
>
> Use the generic board_init_f() provided by the RISC-V library codes.
>
> Signed-off-by: Bin Meng
> ---
Reviewed-by: Rick Chen
>
> board/sifive/fu540/spl.c | 19 +--
> 1 file changed, 1 insertion(+), 18 deletions(-)
>
> diff --git a/boa
;
> Define the variable ret as __maybe_unused.
>
> Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot
> SPL")
> Fixes: 8c59f2023cc8 ("riscv: add SPL support")
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/lib/spl.c | 2 +-
> 1
t;
> We should not initialize a variable if the value is overwritten before being
> read.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/cpu/fu540/cache.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Rick Chen
: remove redundant logical constraint.
>
> After
>
> if (ret) return ret;
>
> we know that ret is zero. Don't check it again.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/lib/andes_plic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Rick Chen
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Tuesday, August 04, 2020 7:10 PM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: u-boot@lists.denx.de; Heinrich Schuchardt
> Subject: [PATCH 1/1] cmd: exception: unaligned data access on RISC-V
>
> The command 'exception' can be used
Hi Heinrich
> >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> >> Sent: Tuesday, August 04, 2020 7:10 PM
> >> To: Rick Jian-Zhi Chen(陳建志)
> >> Cc: u-boot@lists.denx.de; Heinrich Schuchardt
> >> Subject: [PATCH 1/1] cmd: exception: unaligned data access on RISC-V
> >>
> >> The command 'ex
aybe you can add the fix tag if it is caused by this.
Fixes: a8492e25ac71 ("riscv: Expand the DT size before copy reserved
memory node")
Reviewed-by: Rick Chen
> diff --git a/common/board_f.c b/common/board_f.c index 88ff0424a7..7ae01e9fff
> 100644
> --- a/common/board_f.c
> +++
+-
> 3 files changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Rick Chen
>
> From: Bin Meng
>
> All FU540 driver related options should be in the SoC level Kconfig.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/fu540/Kconfig | 22 ++
> board/sifive/fu540/Kconfig | 22 --
> 2 files changed, 2
tion was enabled during the earlier U-Boot porting time. Now we
> already have the OTP driver in place and the unique MAC address is read from
> the OTP, there is no need to turn on this option.
>
> Signed-off-by: Bin Meng
> ---
>
> board/sifive/fu540/Kconfig | 1 -
> 1 file changed, 1 deletion(-)
Reviewed-by: Rick Chen
MC1\n",
> + boot_device);
> + return BOOT_DEVICE_MMC1;
> + }
> +}
> +
> +#ifdef CONFIG_SPL_LOAD_FIT
> +int board_fit_config_name_match(const char *name) {
> + /* boot using first FIT config */
> + return 0;
> +}
> +#endif
> --
WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef'
where possible
#216: FILE: board/sifive/fu540/spl.c:82:
+#ifdef CONFIG_SPL_LOAD_FIT
LGTM.
Other than that,
Reviewed-by: Rick Chen
ct: [PATCH 3/6] riscv: load addresses for Sipeed MAIX
>
> Define default load addresses and the device tree name for the Sipeed MAIX.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> include/configs/sipeed-maix.h | 9 +
> 1 file changed, 9 insertions(+)
Acked-by: Rick Chen
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Thursday, August 06, 2020 6:45 PM
> To: Bin Meng; Rick Jian-Zhi Chen(陳建志)
> Cc: U-Boot Mailing List
> Subject: RISC-V: crash in riscv_get_time()
>
> Hello Rick, hello Bin,
>
> when I run qemu-riscv64_defconfig using
>
> qe
tions(+), 1 deletion(-)
>
WARNING: Possible new command - make sure you add a test
#142: FILE: cmd/riscv/exception.c:11:
Other than that,
Reviewed-by: Rick Chen
> diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c index
> 3c8dbbec0e..9687cec812 100644
> --- a/cmd/riscv/exce
> On 07.08.20 10:33, Rick Chen wrote:
> >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> >> Sent: Thursday, August 06, 2020 6:35 PM
> >> To: Rick Jian-Zhi Chen(陳建志)
> >> Cc: u-boot@lists.denx.de; Leo Yu-Chi Liang(梁育齊); Heinrich Schuchardt
Hi Heinrich
> Am 9. August 2020 22:08:23 MESZ schrieb Atish Patra :
> >On Sat, Aug 8, 2020 at 9:17 AM Heinrich Schuchardt
> >wrote:
> >>
> >> On 8/8/20 5:32 PM, Sean Anderson wrote:
> >> > On 8/8/20 10:59 AM, Heinrich Schuchardt wrote:
> >> >> Hello Anup,
> >> >>
> >> >> I have looking at you Ope
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Tuesday, August 11, 2020 11:57 AM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Sean Anderson; Lukas Auer; Simon Glass; Anup Patel; Daniel Schwierzeck;
> u-boot@lists.denx.de; Heinrich Schuchardt
> Subject: [PATCH 1/1] riscv: don't
Hi Atish
> On Mon, Aug 10, 2020 at 10:30 PM Heinrich Schuchardt
> wrote:
> >
> > On 8/11/20 3:55 AM, Rick Chen wrote:
> > > Hi Heinrich
> > >
> > >> Am 9. August 2020 22:08:23 MESZ schrieb Atish Patra
> > >> :
> > >
> 2 files changed, 47 insertions(+), 1 deletion(-)
Acked-by: Rick Chen
I am OK that this patch can be pulled via SPI tree.
Thanks,
Rick
>
> diff --git a/arch/riscv/dts/k210-maix-bit.dts
> b/arch/riscv/dts/k210-maix-bit.dts
> index e840e04ada..73892c6450 100644
> --- a/arch/ri
v/dts/k210.dtsi | 1 -
> 1 file changed, 1 deletion(-)
>
Acked-by: Rick Chen
Hi Heinrich
> On 8/6/20 9:07 AM, Rick Chen wrote:
> >> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Heinrich
> >> Schuchardt
> >> Sent: Wednesday, July 29, 2020 11:43 PM
> >> To: Sean Anderson
> >> Cc: Michal Simek; Tom Rini; Sim
fix_fdt() will change the size of
> FDT blob so it's safe to call reserve_fdt() after fix_fdt() otherwise global
> data (gd) will overwrite with FDT blob values.
>
> Fixes: a8492e25ac71 ("riscv: Expand the DT size before copy reserved memory
> node")
>
> Signed-off-
Hi Heinrich
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Heinrich
> Schuchardt
> Sent: Thursday, July 30, 2020 1:24 AM
> To: Sean Anderson
> Cc: u-boot@lists.denx.de; Heinrich Schuchardt
> Subject: [PATCH 1/1] doc: riscv: debug UART for MAIX
>
> Provide the required settings
Hi Sean
> On 6/24/20 6:29 AM, Sean Anderson wrote:
> > This patch series adds support for pinmuxing, gpios, and leds on the Kendyte
> > K210.
> >
> > This patch series was previously part of
> > https://patchwork.ozlabs.org/project/uboot/list/?series=161576
> >
> > This patch series depends on
> >
Hi Sean
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Sean Anderson
> Sent: Thursday, January 16, 2020 6:48 AM
> To: U-Boot Mailing List
> Subject: [PATCH v2 01/11] clk: Always use the supplied struct clk
>
> CCF clocks should always use the struct clock passed to their methods
Hi Sean,
> From: Sean Anderson [mailto:sean...@gmail.com]
> Sent: Thursday, January 16, 2020 6:51 AM
> To: U-Boot Mailing List
> Cc: Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH v2 03/11] riscv: Add headers for asm/global_data.h
>
> This header depended on bd_t and ulong, but did not include the appr
Hi Sean,
> From: Sean Anderson [mailto:sean...@gmail.com]
> Sent: Thursday, January 16, 2020 6:52 AM
> To: U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH v2 04/11] riscv: Add an option to default to RV64I
>
> This allows 64-bit boards to default to the 64-bit instruction set withou
Hi Sean,
> > This patch is clock relative patch, if it is not a necessary patch for
> > Sipeed Maix support.
> > Please remove patch 1/11 and 2/11, and send them in another patch-sets.
>
> Patches 10 and 11 rely on these first two patches. Should I just
> reference the split off patches in the cov
Hi Sean,
> From: Sean Anderson [mailto:sean...@gmail.com]
> Sent: Thursday, January 16, 2020 7:18 AM
> To: U-Boot Mailing List
> Cc: Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH v2 08/11] riscv: Add device tree for K210
>
> The subject for this patch should be
>
> Subject: [PATCH v2 08/11] riscv: Add
-v can have any three sources and targets, so
> there is no need for an intermediate mov.
>
> Signed-off-by: Sean Anderson
Reviewed-by: Rick Chen
> ---
> arch/riscv/cpu/start.S | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/ris
Hi Sean
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Lukas Auer
> Sent: Monday, January 27, 2020 6:26 AM
> To: u-boot@lists.denx.de; sean...@gmail.com
> Subject: Re: [PATCH] riscv: Try to get cpu frequency from device tree
>
> On Sun, 2020-01-26 at 13:20 -0500, Sean Anderson w
H 2/9] dma-mapping: fix the prototype of dma_unmap_single()
>
> dma_unmap_single() takes the dma address, not virtual address.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Rick Chen
> ---
>
> arch/arm/include/asm/dma-mapping.h | 4 +---
> arch/nds32/include/asm/dma-map
ngle()
>
> Make dma_map_single() return the dma address, and remove the pointless
> volatile.
>
> Signed-off-by: Masahiro Yamada
Reviewed-by: Rick Chen
> ---
>
> arch/arm/include/asm/dma-mapping.h | 5 +++--
> arch/nds32/include/asm/dma-mapping.h | 5 +++--
> arch/riscv/in
at 1:43 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Add to print board and bit information message.
>
> nits: please remove the ending period in the commit title
>
> >
> > Signed-off-by: Rick Chen
> > Cc: Greentime Hu
> > ---
&g
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Saturday, February 08, 2020 5:38 AM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Bin Meng; Tom Rini; U-Boot Mailing List
> Subject: Re: [PATCH 1/1] doc: fix AX25-AE350 RISC-V documentation
>
> On 2/4/20 3:50 PM, Bin Meng wrote:
> >
Hi Lukasz
> From: Lukasz Majewski [mailto:lu...@denx.de]
> Sent: Friday, February 07, 2020 5:22 AM
> To: Sean Anderson
> Cc: U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志); Lukas Auer
> Subject: Re: [PATCH v3 01/12] clk: Always use the supplied struct clk
>
> Hi Sean,
>
> > CCF clocks should always
add option to wait for ack from secondary harts in
> smp functions")
> Signed-off-by: Sean Anderson
> Reviewed-by: Bin Meng
> ---
>
> (no changes since v1)
>
> arch/riscv/lib/smp.c | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rick Chen
> dif
PIs
>
> arch/riscv/include/asm/smp.h | 7 +++
> arch/riscv/lib/smp.c | 16 ++--
> 2 files changed, 21 insertions(+), 2 deletions(-)
Reviewed-by: Rick Chen
> Even though we no longer call smp_function if an IPI was not sent by
> U-Boot, we still need to clear any IPIs which were pending from the
> execution environment. Otherwise, secondary harts will busy-wait in
> secondary_hart_loop, instead of relaxing.
>
> Signed-off-by: Sean Anderson
> Reviewed
> On 9/15/20 5:15 AM, Rick Chen wrote:
> >> Even though we no longer call smp_function if an IPI was not sent by
> >> U-Boot, we still need to clear any IPIs which were pending from the
> >> execution environment. Otherwise, secondary harts will busy-wait in
> &
u/start.S | 9 +++--
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
Reviewed-by: Rick Chen
Hi Sean
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Sean Anderson
> Sent: Monday, September 14, 2020 10:23 PM
> To: u-boot@lists.denx.de
> Cc: Alan Quey-Liang Kao(高魁良); Leo Yu-Chi Liang(梁育齊); Heinrich Schuchardt; Bin
> Meng; Rick Chen; Sean Anderson
> Subj
ed, 17 insertions(+), 2 deletions(-)
>
Reviewed-by: Rick Chen
201 - 300 of 720 matches
Mail list logo
