Hi Heiko,
Thank you for reviewing.
On Fri, Oct 13, 2023 at 01:21:41PM +0200, Heiko Schocher wrote:
> [...]
>
> Hmm.. I find some boards in mainline which still use this driver:
>
> u-boot [master] $ grep -lr BOOTCOUNT_I2C .
> ./configs/sandbox_defconfig
> ./configs/mx53ppd_defconfig
> ./configs
Hello Heiko,
On Fri, Oct 13, 2023 at 01:28:47PM +0200, Heiko Schocher wrote:
> [...]
> >
> > bootcount {
> > compatible = "u-boot,bootcount-i2c";
> > i2c-bus = <&i2c1>;
> > address = <0x52>;
>
> Hmm.. do we really need this here with DTS. Why not using a p
-8142-66989-80 Email: p...@denx.de
=
On Fri, Oct 13, 2023 at 02:58:04PM +0200, Philip Oberfichtner wrote:
> Hello Heiko,
>
> On Fri, Oct 13, 2023 at 01:28:47PM +0200, Heiko Schocher wrote:
> > [...]
>
Hi Heiko,
On Wed, Oct 18, 2023 at 06:31:57AM +0200, Heiko Schocher wrote:
> [...]
>
> May Philip can use uclass_get_device_by_phandle and try a list of
> possible UCLASS candidates, like UCLASS_RTC, UCLASS_I2C_EEPROM,
> UCLASS_POWER,... and if found, check if parent is UCLASS_I2C...
>
> may not
On Mon, Oct 30, 2023 at 06:17:23AM +0100, Heiko Schocher wrote:
>
>
> Your patch drops an checkpatch error:
> """
> ERROR: Do not add common.h to files
> #164: FILE: drivers/bootcount/bootcount_dm_i2c.c:10:
> +#include
> """
>
> Could you please check and fix?
Oops sorry, V3 is on the way.
R
Fix a copy-paste error I did when inserting the comment.
Signed-off-by: Philip Oberfichtner
---
drivers/bootcount/Kconfig | 2 +-
drivers/bootcount/pmic_pfuze100.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount
able to flush it, too. Thus this
commit allows cache-pl310.c to be included in the SPL build.
[1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable()
Signed-off-by: Philip Oberfichtner
---
Changes in v3:
- Introduce CONFIG_SPL_SYS_L2_PL310
arch/arm/Kconfig | 5
From: Marek Vasut
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v3:
- Use newly introduced Kconfig symbol for
- Convert CONFIG_SYS_L2_PL310 to Kconfig
- Use newly introduced Kconfig symbol for dh_imx6_defconfig
Changes in v2:
- Add comment to explain the relevance of dcache_disable()
Marek Vasut (1):
ARM: imx6: dh-imx6: Enable d-cache early in SPL
Philip Oberfichtner (2):
Convert
This converts CONFIG_SYS_L2_PL310 to Kconfig.
Signed-off-by: Philip Oberfichtner
---
Changes in v3:
new
README| 2 --
arch/arm/Kconfig | 4
arch/arm/mach-mvebu/include/mach/config.h | 2 --
configs/am43xx_evm_defconfig
Hi,
following the whole discussion I figured using 'select SYS_l2_PL310 if
!SYS_L2CACHE_OFF' is the preferred solution.
Now the thing is, if I'd put this line under the ARCH_XXX Kconfig
entries, I would change behavior for many boards. Take, for example,
ARCH_MVEBU:
grep -lr ARCH_MVEBU configs |
Just for the record: I solved the problem using
./tools/moveconfig.py -i CONFIG_SYS_L2_PL310
Patch V4 coming soon.
On Thu, 2022-08-11 at 12:17 +0200, Philip Oberfichtner wrote:
> Hi,
>
> following the whole discussion I figured using 'select SYS_l2_PL310
> if
> !SYS
/tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF
0 matches
That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this
was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert
the 'select' statement under ARCH_MX6.
Signed-off-by: Phil
able to flush it, too. Thus this
commit allows cache-pl310.c to be included in the SPL build.
[1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable()
Signed-off-by: Philip Oberfichtner
---
(no changes since v3)
Changes in v3:
- Introduce CONFIG_SPL_SYS_L2_PL310
arch/arm
From: Marek Vasut
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v4:
- Elaborate on dcache_disable() comment
Changes in
Hi,
thanks for the feedback.
On Wed, 2022-08-17 at 11:24 +0200, Marek Vasut wrote:
> On 8/17/22 11:06, Philip Oberfichtner wrote:
>
> [...]
>
> > +void spl_board_prepare_for_boot(void)
> > +{
> > + /*
> > + * Flush dcache.
>
> The dcach
/tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF
0 matches
That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this
was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert
the 'select' statement under ARCH_MX6.
Signed-off-by: Phil
able to flush it, too. Thus this
commit allows cache-pl310.c to be included in the SPL build.
[1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable()
Signed-off-by: Philip Oberfichtner
---
(no changes since v3)
Changes in v3:
- Introduce CONFIG_SPL_SYS_L2_PL310
arch/arm
From: Marek Vasut
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v5:
- Clarify dcache_disable() comment
Changes in v4
- Add comment to explain the relevance of dcache_disable()
Marek Vasut (1):
ARM: imx6: dh-imx6: Enable d-cache early in SPL
Philip Oberfichtner (2):
Convert CONFIG_SYS_L2_PL310 to Kconfig
ARM: cache: Allow SPL to build cache-pl310.c
README| 2 --
ed Kconfig symbol for dh_imx6_defconfig
Changes in v2:
- Add comment to explain the relevance of dcache_disable()
Marek Vasut (1):
ARM: imx6: dh-imx6: Enable d-cache early in SPL
Philip Oberfichtner (2):
Convert CONFIG_SYS_L2_PL310 to Kconfig
ARM: cache: Allow SPL to build cache-pl310.
/tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF
0 matches
That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this
was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert
the 'select' statement under ARCH_MX6.
Signed-off-by: Phil
able to flush it, too. Thus this
commit allows cache-pl310.c to be included in the SPL build.
[1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable()
Signed-off-by: Philip Oberfichtner
---
(no changes since v3)
Changes in v3:
- Introduce CONFIG_SPL_SYS_L2_PL310
arch/arm
From: Marek Vasut
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v6:
- Once more improve the dcache_disable() comment
- Convert CONFIG_SYS_L2_PL310 to Kconfig
- Use newly introduced Kconfig symbol for dh_imx6_defconfig
Changes in v2:
- Add comment to explain the relevance of dcache_disable()
Marek Vasut (1):
ARM: imx6: dh-imx6: Enable d-cache early in SPL
Philip Oberfichtner (2):
Good point. See V2.
On Fri, May 17, 2024 at 11:16:19PM +0200, Marek Vasut wrote:
> On 5/17/24 11:18 AM, Philip Oberfichtner wrote:
> > Before this commit, usb_get_descriptor() failed for some flakey USB
> > devices. We hereby adopt the more robust linux implementation [1].
>
ng USB...
Bus xhci_pci: Register 1840 NbrPorts 16
Starting the controller
USB XHCI 1.20
scanning bus xhci_pci for devices... usb_new_device: Cannot read configuration,
skipping device 058f:6387
Signed-off-by: Philip Oberfichtner
[1] From a38297e3fb012 (Linux 6.9), see
https://git.kerne
o use when locating the filesystem to use for the
> boot counter.
>
> -config SYS_BOOTCOUNT_EXT_DEVPART
> +config SYS_BOOTCOUNT_FS_DEVPART
> string "Partition of the boot counter EXT filesystem"
And here.
> default "0:1"
> -
: "net: dwc_eth_qos: mdio: Implement clause 45":
https://patchwork.ozlabs.org/project/uboot/patch/20240507094237.168238-1-...@denx.de/
Changes in V2: Improve coding-style in PATCH 5/5
Philip Oberfichtner (5):
x86: provide mb() macro
net: dwc_eth_qos: Fix header to be self-conta
Implement memory barrier using mfence. Linux does it equivalently [1].
"The MFENCE instruction establishes a memory fence for both loads and
stores" [2].
[1] linux/arch/x86/include/asm/barrier.h
[2] Intel® 64 and IA-32 Architectures Software Developer’s Manual
Signed-off-by: Philip Ob
Before this commit, usage of this header relied on a specific include
order. Fix it by including all dependencies.
Signed-off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net
off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.c | 28 +---
drivers/net/dwc_eth_qos.h | 3 +++
drivers/net/dwc_eth_qos_imx.c | 1 +
drivers/net/dwc_eth_qos_qcom.c | 1 +
drivers/net/dwc_eth_qos_rockchip.c | 1 +
drive
PCI devices do not necessarily use a device tree. Implement a bind()
function to assign unique device names in that case.
Signed-off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers
Add dwc_eth_qos glue driver for the Intel Elkhart-Lake SOC.
Signed-off-by: Philip Oberfichtner
---
Notes:
Changes in V2:
- Remove 'struct eqos_intel_config' from dwc_eth_qos.h
- Improve some comments
- Remove duplicate MAC reset
drivers/n
: "net: dwc_eth_qos: mdio: Implement clause 45":
https://patchwork.ozlabs.org/project/uboot/patch/20240507094237.168238-1-...@denx.de/
Changes in V2: Improve coding-style in PATCH 5/5
Philip Oberfichtner (5):
x86: provide mb() macro
net: dwc_eth_qos: Fix header to be self-conta
Implement memory barrier using mfence. Linux does it equivalently [1].
"The MFENCE instruction establishes a memory fence for both loads and
stores" [2].
[1] linux/arch/x86/include/asm/barrier.h
[2] Intel® 64 and IA-32 Architectures Software Developer’s Manual
Signed-off-by: Philip Ob
Before this commit, usage of this header relied on a specific include
order. Fix it by including all dependencies.
Signed-off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net
off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.c | 28 +---
drivers/net/dwc_eth_qos.h | 3 +++
drivers/net/dwc_eth_qos_imx.c | 1 +
drivers/net/dwc_eth_qos_qcom.c | 1 +
drivers/net/dwc_eth_qos_rockchip.c | 1 +
drive
PCI devices do not necessarily use a device tree. Implement a bind()
function to assign unique device names in that case.
Signed-off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers
Add dwc_eth_qos glue driver for the Intel Elkhart-Lake SOC.
Signed-off-by: Philip Oberfichtner
---
Notes:
Changes in V2:
- Remove 'struct eqos_intel_config' from dwc_eth_qos.h
- Improve some comments
- Remove duplicate MAC reset
drivers/n
Hi Simon,
On Tue, Jun 25, 2024 at 01:30:18PM +0100, Simon Glass wrote:
> Hi Philip,
>
> On Mon, 24 Jun 2024 at 02:35, Philip Oberfichtner wrote:
> >
> > Implement memory barrier using mfence. Linux does it equivalently [1].
> >
> > "The MFENCE instructi
Hi Marek,
Thank you for the review!
On Sun, Jun 30, 2024 at 07:33:33AM +0200, Marek Vasut wrote:
> On 6/24/24 10:34 AM, Philip Oberfichtner wrote:
> > PCI devices do not necessarily use a device tree. In that case, the
> > driver currently fails to find eqos->con
Hi Marek,
On Sun, Jun 30, 2024 at 07:38:43AM +0200, Marek Vasut wrote:
> On 6/24/24 10:34 AM, Philip Oberfichtner wrote:
>
> > +++ b/drivers/net/dwc_eth_qos_intel.c
> > @@ -0,0 +1,446 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c)
: "net: dwc_eth_qos: mdio: Implement clause 45":
https://patchwork.ozlabs.org/project/uboot/patch/20240507094237.168238-1-...@denx.de/
Changes in V3:
- Replace mfence() with mb()
- Clean-up eqos_get_base_addr()
- Several style fixes for dwc_eth_qos_intel
Philip Ob
Implement a x86 memory barrier mb(). Furthermore, remove the previously
used mfence() function, which does the same thing.
The mb() macro is now equivalent to Linux (v6.9):
linux/arch/x86/include/asm/barrier.h
Signed-off-by: Philip Oberfichtner
---
Notes:
Changes in V3:
- Remove
Before this commit, usage of this header relied on a specific include
order. Fix it by including all dependencies.
Signed-off-by: Philip Oberfichtner
Reviewed-by: Marek Vasut
---
drivers/net/dwc_eth_qos.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net
off-by: Philip Oberfichtner
---
Notes:
Changes in V3:
Factor out eqos_get_base_addr_common() in order to avoid introducing a new
callback function.
drivers/net/dwc_eth_qos.c | 51 +-
drivers/net/dwc_eth_qos.h | 2 ++
drive
PCI devices do not necessarily use a device tree. Implement a bind()
function to assign unique device names in that case.
Signed-off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers
Add dwc_eth_qos glue driver for the Intel Elkhart-Lake SOC.
Signed-off-by: Philip Oberfichtner
---
Notes:
Changes in V3:
- update linux reference to current stable
- replace pr_err by dev_err
- drop __prefix from local function names
- use FIELD_PREP to simplify bitfield
Hi Ramon,
Any comments on this series?
On Wed, Jul 17, 2024 at 02:29:01PM +0200, Philip Oberfichtner wrote:
> This patch series implements the dwc_eth_qos glue driver for Intel SOCs.
> Before doing that, a few general adaptions to the dwc_eth_qos.c main
> driver are required. Most not
is enabled and
> + * the device advertises that it supports it.
> + */
This patch is also useful if the previous bootstage, e.g. coreboot,
allocated a 64-bit address. In fact I recently did something very
similar (downstream), so
Reviewed-by
The "i2cbcdev" sneaked in when implementing this function for the
bootcounter use case. Obviously the intention was to use prop_name
instead.
Fixes: b483552773 (i2c: Implement i2c_get_chip_by_phandle())
Signed-off-by: Philip Oberfichtner
---
drivers/i2c/i2c-uclass.c | 2 +-
1 file
: "net: dwc_eth_qos: mdio: Implement clause 45":
https://patchwork.ozlabs.org/project/uboot/patch/20240423085158.29246-1-...@denx.de/
Philip Oberfichtner (5):
x86: provide mb() macro
net: dwc_eth_qos: Fix header to be self-contained
net: dwc_eth_qos: Adapt probe() for PCI dev
Implement memory barrier using mfence. Linux does it equivalently [1].
"The MFENCE instruction establishes a memory fence for both loads and
stores" [2].
[1] linux/arch/x86/include/asm/barrier.h
[2] Intel® 64 and IA-32 Architectures Software Developer’s Manual
Signed-off-by: Philip Ob
Before this commit, usage of this header relied on a specific include
order. Fix it by including all dependencies.
Signed-off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net
off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.c | 28 +---
drivers/net/dwc_eth_qos.h | 3 +++
drivers/net/dwc_eth_qos_imx.c | 1 +
drivers/net/dwc_eth_qos_qcom.c | 1 +
drivers/net/dwc_eth_qos_rockchip.c | 1 +
drive
PCI devices do not necessarily use a device tree. Implement a bind()
function to assign unique device names in that case.
Signed-off-by: Philip Oberfichtner
---
drivers/net/dwc_eth_qos.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers
Add dwc_eth_qos glue driver for the Intel Elkhart-Lake SOC.
Signed-off-by: Philip Oberfichtner
---
drivers/net/Kconfig | 7 +
drivers/net/Makefile| 1 +
drivers/net/dwc_eth_qos.h | 1 +
drivers/net/dwc_eth_qos_intel.c | 446
, we adopt the common practice of
discerning C45 from C22 using the devad argument.
Signed-off-by: Philip Oberfichtner
---
Notes:
Attention: There is a slight change of behavior introduced by this
commit (see commit message). Please test and review if this works for
everybody
Before this commit, usb_get_descriptor() failed for some flakey USB
devices. We hereby adopt the more robust linux implementation [1].
Signed-off-by: Philip Oberfichtner
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/usb/core/message.c?h=v6.9#n781
---
common
, we adopt the common practice of
discerning C45 from C22 using the devad argument.
Signed-off-by: Philip Oberfichtner
---
Notes:
This patch is labeled RFC as there is a slight change of behavior (see
commit message). I'm not sure in fact if this solution works for
everybody - th
Hi,
I'm wondering if it is currently possible to have U-Boot run in 64-bit
mode as EFI payload.
TARGET_EFI_APP64 selects X86_64 to achieve this. TARGET_EFI_PAYLOAD does
currently always switch 32-bit mode. Any hints what would have to be
done to get it to run in 64-bit mode?
Thanks in advance,
P
This series unifies common mac address code for imx6, imx8 and stm32
based boards by DH. It is thought of as a starting point for more
deduplication in the future.
Philip Oberfichtner (4):
board: dhelectronics: Implement common mac address functions
ARM: imx6: DH: Use common mac address
-by: Philip Oberfichtner
---
board/dhelectronics/common/Makefile| 10
board/dhelectronics/common/dh_common.c | 64 ++
board/dhelectronics/common/dh_common.h | 28 +++
board/dhelectronics/common/dh_imx.c| 24 ++
board/dhelectronics/common
To reduce code duplication, let the imx6 based DH boards use the common
code for setting up their mac addresses.
Signed-off-by: Philip Oberfichtner
---
board/dhelectronics/dh_imx6/dh_imx6.c | 47 ---
1 file changed, 14 insertions(+), 33 deletions(-)
diff --git a/board
To reduce code duplication, let the imx8 based DH boards use the common
code for setting up their mac addresses.
Signed-off-by: Philip Oberfichtner
---
.../dh_imx8mp/imx8mp_dhcom_pdk2.c | 121 +++---
1 file changed, 48 insertions(+), 73 deletions(-)
diff --git a/board
To reduce code duplication, let the stm32 based DH boards use the common
code for setting up their mac addresses.
Signed-off-by: Philip Oberfichtner
---
board/dhelectronics/dh_stm32mp1/board.c | 104 +++-
1 file changed, 47 insertions(+), 57 deletions(-)
diff --git a
Hi Stefano,
On Mon, 2022-04-11 at 17:45 +0200, Stefano Babic wrote:
> Hi Philipp,
>
> On 02.03.22 10:39, Philip Oberfichtner wrote:
> > The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
>
> [snip]
>
> > diff --git a/include/configs/imx6q-acc.h b/in
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Adapt defconfig and device tree to new bootcount driver
- Clean up CONFIG_ENV_FLAGS_LIST_STATIC
- Fix style issues in device trees
- Migrate CONFIG options to Kconfig
This
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
Signed-off-by: Philip Oberfichtner
---
Changes in v3:
- Rename acc to bosch-acc
- Sync device tree with Linux
Changes in v2:
- Adapt defconfig and device tree to new bootcount driver
- Clean up CONFIG_ENV_FLAGS_LIST_STATIC
- Fix
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
Signed-off-by: Philip Oberfichtner
---
Changes in v4:
- Remove obsolete CONFIG_FEC #defines
- Sync device tree with Linux
Changes in v3:
- Rename acc to bosch-acc
- Sync device tree with Linux
Changes in v2:
- Adapt defconfig
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
Signed-off-by: Philip Oberfichtner
---
Changes in v5:
- Rebase on v2022.07-rc1
- Sync device tree with Linux
Changes in v4:
- Remove obsolete CONFIG_FEC #defines
- Sync device tree with Linux
Changes in v3:
- Rename acc to
EMMC moviNAND. Enter backdoor mode */
What is moviNAND? My research pointed me to Samsung products only. So
is changing the boot partition size vendor specific or can it be used
more generally?
To be specific, I use the Kioxia THGBMJG6C1LBAB7 eMMC chip.
Thanks and best regards,
Philip Oberfichtner
This patch series adds support for the DHCOM DRC02 and DH picoITX
baseboards by DH electronics.
The two boards can be equipped with different SoMs. The STM32MP15xx based
versions are already mainlined. This patch adds support for the iMX6QDL
based variants.
Philip Oberfichtner (8):
ARM
In the dhelectronics iMX6 board file fix the outdated eeprom path by
using a DT label instead.
The label has been newly created for all iMX6QDL DHCOM boards.
Signed-off-by: Philip Oberfichtner
---
arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi | 11 +++
board/dhelectronics/dh_imx6/dh_imx6.c
Migrate DH DRC02 device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
arch/arm/dts/Makefile | 1 +
arch
and DRC02, but on PDK2 it is untested.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
include/configs/dh_imx6.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 2b14464dff..178f5a6e7d 100644
--- a/include/configs
Migrate DH picoITX device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
arch/arm/dts/Makefile | 1
Firstly the fec can now use the regulator reg_eth_vio from
imx6qdl-dhcom-som.dtsi instead of defining its own.
Secondly the &fec node is moved to the more generic SoM device tree
file, because it can be used by multiple boards.
Signed-off-by: Philip Oberfichtner
---
arch/arm/dts/imx6qdl-d
Add a u-boot dtsi for configuring the fec node of the DH picoITX.
Signed-off-by: Philip Oberfichtner
---
arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi
diff --git a/arch/arm/dts
-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.
Signed-off-by: Philip Oberfichtner
---
board/dhelectronics/dh_imx6/dh_imx6.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git
Add a u-boot dtsi for configuring the fec node of the DH DRC02.
Signed-off-by: Philip Oberfichtner
---
arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi
diff --git a/arch/arm/dts/imx6s
6192cf8ac082 from
git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
Signed-off-by: Philip Oberfichtner
---
Changes in v6:
- Sync device tree with Linux (now accepted mainline)
- Update commit description
- Rebase on v2022.07-rc2
Changes in v5:
- Rebase on v2022.07-rc1
- Sync device
board_fit_config_name_match
- Return -EINVAL instead of -1
- Reviewed-by Marek
- Fix spelling
Philip Oberfichtner (8):
ARM: imx6: Fix broken DT path in DH board file
ARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux
ARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux
ARM: imx6: Remove
In the DH electronics iMX6 board file fix the outdated eeprom path by
using a DT label instead.
The label has been newly created for all iMX6QDL DHCOM boards.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Reviewed-by Marek
arch/arm/dts/imx6qdl-dhcom-u
Migrate DH DRC02 device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
(no changes since v1)
arch/arm/dts/Makefile
Migrate DH picoITX device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
(no changes since v1)
arch/arm/dts/Makefile
Firstly the FEC can now use the regulator reg_eth_vio from
imx6qdl-dhcom-som.dtsi instead of defining its own.
Secondly the &fec node is moved to the more generic SoM device tree
file, because it can be used by multiple boards.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfich
and DRC02, but on PDK2 it is untested.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
(no changes since v1)
include/configs/dh_imx6.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 2b14464dff..178f5a6e7d 10
Add a u-boot dtsi for configuring the FEC node of the DH DRC02.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Reviewed-by Marek
arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 arch/arm/dts
Add a u-boot dtsi for configuring the FEC node of the DH picoITX.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Reviewed-by Marek
arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 arch/arm
-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Rewrite board_fit_config_name_match
- Return -EINVAL instead of -1
board/dhelectronics/dh_imx6/dh_imx6.c | 31
Philip Oberfichtner (4):
board: dhelectronics: Implement common MAC address functions
ARM: imx6: DH: Use common MAC address functions
ARM: imx8: DH: Use common MAC address functions
ARM: stm32: DH: Use common MAC address functions
board/dhelectronics/common/Makefile | 10 ++
board
: Philip Oberfichtner
---
Changes in v2:
- convert to livetree (rebase on commit 5a605b7c86152)
board/dhelectronics/common/Makefile| 10
board/dhelectronics/common/dh_common.c | 65 ++
board/dhelectronics/common/dh_common.h | 28 +++
board
To reduce code duplication, let the imx6 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner
Tested-by: Marek Vasut
---
Changes in v2:
- Tested-by Marek
board/dhelectronics/dh_imx6/dh_imx6.c | 47 ---
1
To reduce code duplication, let the imx8 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner
Tested-by: Marek Vasut
---
Changes in v2:
- Tested-by Marek
.../dh_imx8mp/imx8mp_dhcom_pdk2.c | 121 +++---
1
To reduce code duplication, let the stm32 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner
Tested-by: Marek Vasut
---
Changes in v2:
- convert to livetree (rebase on commit 5a605b7c86152)
- Tested-by Marek
board
(rebase on commit 5a605b7c86152)
- Fix spelling
Philip Oberfichtner (4):
board: dhelectronics: Implement common MAC address functions
ARM: imx6: DH: Use common MAC address functions
ARM: imx8: DH: Use common MAC address functions
ARM: stm32: DH: Use common MAC address functions
To reduce code duplication, let the imx6 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner
Tested-by: Marek Vasut
Reviewed-by: Marek Vasut
---
Changes in v3:
- Reviewed by Marek
Changes in v2:
- Tested-by Marek
board
To reduce code duplication, let the imx8 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner
Tested-by: Marek Vasut
Reviewed-by: Marek Vasut
---
Changes in v3:
- Reviewed by Marek
Changes in v2:
- Tested-by Marek
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