What about the peripheral resets which are also handled by CAR? Peripheral
clock nodes also offer assert and deassert methods for the reset signal
associated with them. Those methods are used when powergating domains for
example. Should we model this in the same binding?
Thanks,
Peter.
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On Tue, Jan 24, 2012 at 11:59:40PM +0100, Colin Cross wrote:
> On Tue, Jan 24, 2012 at 2:43 PM, Stephen Warren wrote:
> > Colin Cross wrote at Tuesday, January 24, 2012 3:33 PM:
> >> On Tue, Jan 24, 2012 at 2:08 PM, Stephen Warren wrote:
> >> > Peter De Schrijve
Hi,
Currently uImages have the load address hardcoded. As we now try to support
as many ARM platforms as possible with a single binary, this becomes a
problem. On tegra20 SDRAM starts at physical address 0, but on tegra30 SDRAM
starts at 0x8000. It's possible to build a kernel image which can
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