Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/mailbox/stm32-ipcc.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pinctrl_stm32.c | 43 ++---
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/pinctrl
Cosmetics: Add header with SPDX licence
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pinctrl_stm32.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 24ed83dd46..dbea99532c 100644
--- a/drivers/pinctrl
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/gpio/gpio-uclass.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
Move the variables definition at the beggining of the function
gpio_stm32_probe().
Signed-off-by: Patrick Delaunay
---
drivers/gpio/stm32_gpio.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 5bff27f75b
112 16>;
Signed-off-by: Patrick Delaunay
---
drivers/gpio/stm32_gpio.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index aa70b1d2a9..473e364796 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -295,6
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/net/dwc_eth_qos.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index
Hi Alexandru,
> Sent: mercredi 9 septembre 2020 23:54
> To: uboot-st...@st-md-mailman.stormreply.com
> Cc: Alexandru Gagniuc ; Patrick DELAUNAY
> ; Patrice CHOTARD ; Peng
> Fan ; u-boot@lists.denx.de
> Subject: [PATCH] mmc: stm32_sdmmc2: Use mmc_of_parse() to read host
> capa
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/power/regulator/gpio-regulator.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/power/regulator
iable is limited by the third parameter of
fdtdec_get_int_array_count.
Signed-off-by: Patrick Delaunay
---
drivers/power/regulator/gpio-regulator.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/power/regulator/gpio-regulator.c
b/drivers/power/regulator/gpio-r
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/i2c/i2c-gpio.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index
cells_count parameter in dev_ and
of_node API to allow migration and support of live DT:
- of_parse_phandle_with_args
Signed-off-by: Patrick Delaunay
---
drivers/core/of_access.c | 7 ---
drivers/core/ofnode.c| 3 ++-
include/dm/of_access.h | 4 +++-
3 files changed, 9 insertions(+), 5 deletions
without cell name. This parameter
allow to force the size cell.
For example:
count = dev_count_phandle_with_args(dev, "array", NULL, 3);
Signed-off-by: Patrick Delaunay
---
I push today this RFC.
It is linked to previous serie [1] but it is not a blocking point today
as no user use thi
Hi Alex,
> From: Alex G.
> Sent: jeudi 10 septembre 2020 22:10
>
> On 9/10/20 11:04 AM, Patrick DELAUNAY wrote:
> > Hi Alexandru,
>
> Hi
>
> [snip]
>
> >> + cfg->f_max = 5200;
> >> + mmc_of_parse(dev, cfg);
> >
&
Hi Jaehoon
> From: Jaehoon Chung
> Sent: vendredi 11 septembre 2020 09:50
>
> On 9/10/20 6:54 AM, Alexandru Gagniuc wrote:
> > mmc_of_parse() can populate the 'f_max' and 'host_caps' fields of
> > struct mmc_config from devicetree.
> > The same logic is duplicated in stm32_sdmmc2_probe(). Use
>
, &sec_caps) ||
!(sec_caps & OPTEE_SMC_SEC_CAP_DYNAMIC_SHM)) {
- debug("%s: OP-TEE capabilities mismatch\n", __func__);
+ log_err("%s: OP-TEE capabilities mismatch\n", __func__);
return -ENOENT;
}
Reviewed-by: Patrick Delau
Hi Marek,
On 3/5/21 3:18 PM, Marek Vasut wrote:
Split up get_soc_name(), clean the decoding up a bit, and set up
environment variables which contain the SoC type, package, revision.
This is useful on SoMs, where multiple SoC options are populated.
Signed-off-by: Marek Vasut
Cc: Patrick
--
7 files changed, 10 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
--
board/st/stm32h743-eval/stm32h743-eval.c | 10 --
6 files changed, 40 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
;early_tlb;
| ^
Signed-off-by: Patrice Chotard
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/cpu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
need to be MMU_SECTION_SIZE
aligned.
Fixes: 240720e9052f ("firmware: scmi: mailbox/smt agent device")
Signed-off-by: Patrick Delaunay
---
drivers/firmware/scmi/smt.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/sm
lect Patrice r-b
- add linux dts commit
arch/arm/dts/stm32mp157a-icore-stm32mp1.dtsi | 196 +++
1 file changed, 196 insertions(+)
create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1.dtsi
Reviewed-by: Patrick Delaunay
Thanks
Patrick
in CubeMX for generation file.
Reviewed-by: Patrick Delaunay
Thanks
Patrick
imply SPL_LIBDISK_SUPPORT
+ imply SPL_SPI_LOAD
cosmetic: you can add dependency ?
imply SPL_SPI_LOAD if SPL_SPI_SUPPORT
config SYS_SOC
default "stm32mp"
Anyway
Reviewed-by: Patrick Delaunay
Thanks
Patrick
ngicam/stm32mp1/MAINTAINERS
create mode 100644 board/engicam/stm32mp1/Makefile
create mode 100644 board/engicam/stm32mp1/spl.c
create mode 100644 board/engicam/stm32mp1/stm32mp1.c
create mode 100644 configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
Reviewed-by: Patrick Delaunay
Thanks
Patrick
uch2-u-boot.dtsi
create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2.dts
create mode 100644 configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
Reviewed-by: Patrick Delaunay
Thanks
Patrick
NIT_F
.../dts/stm32mp157a-microgea-stm32mp1.dtsi| 148 ++
1 file changed, 148 insertions(+)
create mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1.dtsi
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi Jagan,
On 3/15/21 6:32 PM, Jagan Teki wrote:
Engicam MicroGEA STM32MP1 Micro SOM has mounted 1x4Gb DDR3
which has 16bits width 533Mhz frequency.
Add DDR configurations via dtsi.
Reviewed-by: Patrice Chotard
Signed-off-by: Jagan Teki
---
Changes for v2:
- collect Patrice r-b
...m32mp15-
ot;
#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" ?
Anyway:
Reviewed-by: Patrick Delaunay
Thanks
Patrick
v2_defconfig
+MicroGEA-STM32MP1-MICRODEV2.0-OF7
+M: Jagan Teki
+M: Matteo Lisi
+S: Maintained
+F: configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
+
minor: you can add the also added device tree in MAINTAINERS
+F: arch/arm/dts/stm32mp15*microgea*
Anyway
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Remove the define EQOS_DESCRIPTOR_ALIGN unused since the
commit 6f1e668d964e ("net: dwc_eth_qos: Pad descriptors to cacheline size")
Signed-off-by: Patrick Delaunay
---
drivers/net/dwc_eth_qos.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/d
dress translation
so when it is required when livetree is activated but this address
translation is already done by ofnode_read_resource().
Fixes: 240720e9052f ("firmware: scmi: mailbox/smt agent device")
Signed-off-by: Patrick Delaunay
---
Hi,
This patch is a short-term workaround for ofnod
Hi Igor,
On 3/30/21 11:16 PM, Igor Opaniuk wrote:
From: Igor Opaniuk
Adds support for:
* PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API
that allows discovering whether a specific PSCI function is implemented
and its features.
* SYSTEM_RESET2, which was introduced in PSCI 1.
Hi,
On 3/30/21 11:34 PM, Ravik Hasija wrote:
Removing printfs from do_gpt API as the messages are generic and does not
specify error codes for failure cases.
Signed-off-by: Ravik Hasija
---
cmd/gpt.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/cmd/gpt.c b/cmd/gpt.c
index 76a95ade6c
, which contains the secure OS
= OP-TEE and the non secure firmware and device tree = U-Boot.
Signed-off-by: Patrick Delaunay
---
.../cmd_stm32prog/cmd_stm32prog.c | 19 +++---
.../mach-stm32mp/cmd_stm32prog/stm32prog.c| 59 +--
.../mach-stm32mp/cmd_stm32prog
erial
device sequence number")
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 897ec13ad8..2f05c5e91b 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++
Replace the remaining printf in setup_boot_mode() by log macro
to handle filtering for log features.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach
e, &faddr);
...
The both behavior should be aligned and the address translation
must be called in fdt_get_resource() and removed for each caller.
Fixes: a44810123f9e ("dm: core: Add dev_read_resource() to read device
resources")
Signed-off-by: Patrick Delaunay
---
This pat
Hi,
On 3/30/21 3:29 PM, Patrick Delaunay wrote:
Call the translation function on the ofnode_read_resource result only
when the livetree is not activated.
Today of_address_to_resource() calls ofnode_read_resource() for livetree
support and fdt_get_resource() when livetree is not supported.
The
Simplify the code of the function board_check_usb_power
based in CONFIG_ADC and adc_measurement; the function is removed by the
linker when the CONFIG_ADC is not activated.
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c | 9 -
1 file changed, 4 insertions(+), 5
Hi Horatiu,
On 4/6/21 11:14 AM, Horatiu Vultur wrote:
The 04/06/2021 09:38, Patrick Delaunay wrote:
Hi Patrick,
I have applied your patches and I have done a basic test on jr2_switch.
It seems to work fine. I got some warnings from the function
'__of_translate_address' which I need
) {
+ puts("Expected OS image is not found. Instead found ");
+ puts(genimg_get_os_name(spl_image->os));
+ puts(". Trying to start U-boot\n");
return -ENOENT;
}
Reviewed-by: Patrick Delaunay
Thanks
Patrick
---
common/spl/spl.c | 5 +
include/spl.h| 14 ++
2 files changed, 19 insertions(+)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi
On 3/15/21 4:47 PM, Alexandru Gagniuc wrote:
The purpose of this change is to allow configuring TrustZone (TZC)
memory permissions. For example, OP-TEE expects TZC regions to be
configured in a very particular way. The API presented here is
intended to allow exactly that.
UCLASS support is n
Hi,
On 3/15/21 4:47 PM, Alexandru Gagniuc wrote:
OP-TEE is very particular about how the TZC should be configured.
When booting an OP-TEE payload, an incorrect TZC configuration will
result in a panic.
Most information can be derived from the SPL devicetree. The only
information we don't have i
st STM32MP port on U-Boot
and CONFIG_SPL_MAX_FOOTPRINT is the correct way to limit the SPL size.
If I remember correctly, the 128KB limitation was only a attempt to reserved
enough SYSRAM for BSS + SPL stack located at CONFIG_SPL_STACK = end of
sysram.
Reviewed-by: Patrick Delaunay
Thanks
Patrick
and CONFIG_SPL_BSS_MAX_SIZE
can be also removed with previous patch.
Reviewed-by: Patrick Delaunay
Thanks
Patrick
0x01D0
/* limit SYSRAM usage to first 128 KB */
#define CONFIG_SPL_MAX_SIZE 0x00020000
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi,
On 3/30/21 8:32 PM, Alexandru Gagniuc wrote:
The STM32MP ROM provides several service. One of them is the ability
to verify ecdsa256 signatures. Hook the ROM API into the ECDSA uclass.
Signed-off-by: Alexandru Gagniuc
---
arch/arm/mach-stm32mp/Kconfig| 9 +++
arch/arm/mach-stm3
the minimal supported udelay = 1 to avoid issue with udelay(0)
when the the property is absent.
This patch also updates the tegra186 part to use the modified platdata,
even if the GPIO reset delay value is hardcoded in probe function.
Signed-off-by: Patrick Delaunay
---
drivers/net
EV1 board, we have:
STM32MP1> mmc list
STM32 SDMMC2: 0 (SD)
STM32 SDMMC2: 1 (eMMC)
Changed to more clear:
STM32MP1> mmc list
STM32 SD/MMC: 0 (SD)
STM32 SD/MMC: 1 (eMMC)
Signed-off-by: Patrick Delaunay
---
drivers/mmc/stm32_sdmmc2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
: stm32: Add UART8 pins A pinmux entry on stm32mp1
4d7c53a684da ARM: dts: stm32: Add USART3 pins A pinmux entry on stm32mp1
80ab128332ee ARM: dts: stm32: Add SAI2A pins B pinmux entry on stm32mp1
ab7f98c0c546 ARM: dts: stm32: Add Ethernet0 RMII pins A pinmux entry on stm32mp1
Signed-off-by: Patrick
you can deactivate cache for SPL only
(with CONFIG_SPL_SYS_DCACHE_OFF).
Reviewed-by: Patrice Chotard
Signed-off-by: Patrick Delaunay
---
Changes in v4:
- fix commit message and comment and add Patrice Chotard reviewed-by
Changes in v3:
- add Information in commit-message on early malloc and .BSS
Chang
data cache
and the TLB.
Reviewed-by: Patrice Chotard
Signed-off-by: Patrick Delaunay
---
Changes in v4:
- fix commit message and add Patrice Chotard reviewed-by
Changes in v3:
- remove debug message "bye"
Changes in v2:
- new
arch/arm/mach-stm32mp/spl.c | 19 +++
1 fi
debug message "bye"
Changes in v2:
- create a new function early_enable_caches
- use TLB in .init section
- use the default weak dram_bank_mmu_setup() and
use mmu_set_region_dcache_behaviour() to setup
the early MMU configuration
- enable data cache on DDR in SPL, after DDR controller init
ff-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> arch/arm/mach-stm32mp/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
> index eee39c27c3..42c02062
r boards which can be
> populated
> with either SoC.
>
> Signed-off-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> drivers/clk/clk_stm32mp1.c | 30 ++
> 1 file changed, 26 insertions(+), 4 deletions(-)
>
> di
gned-off-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> Note that these settings are generated by the cubemx tool
> ---
> .../stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi | 120 ++
> .../stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi | 120 +++
Hi Stephen and Marek
> From: Stephen Warren
> Sent: mercredi 29 avril 2020 23:51
> To: Marek Vasut
> Cc: u-boot@lists.denx.de; Joe Hershberger ; Patrice
> CHOTARD ; Patrick DELAUNAY
> ; Ramon Fried ; Stephen
> Warren ; Tom Warren
> Subject: Re: [PATCH] net: dwc_eth
> ---
>
> board/st/stm32mp1/stm32mp1.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi Marek,
> From: Marek Vasut
> Sent: mercredi 13 mai 2020 12:53
>
> On 5/13/20 11:12 AM, Patrick DELAUNAY wrote:
> > Dear Marek,
> >
> >> From: Marek Vasut
> >> Sent: mardi 12 mai 2020 19:07
> >>
> >> There are two speed grades of
settings are a better fit for the SoMs.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Patrick Delaunay
> > Cc: Patrice Chotard
> > ---
> > Note that these settings are generated by the cubemx tool
>
> Seems like quite a few of those stm32mp1 patches still
Hi David
> From: David Wu
> Sent: mardi 12 mai 2020 11:56
>
> It can be seen that most of the Socs using STM mac, "snps,reset-gpio"
> gpio is used, adding this option makes reset function more general.
>
> Signed-off-by: David Wu
> ---
>
> Changes in v2:
> - Remove the code is not related (Pa
fdt_get_addr(dev);
> + eqos->regs = dev_read_addr(dev);
> if (eqos->regs == FDT_ADDR_T_NONE) {
> - pr_err("devfdt_get_addr() failed");
> + pr_err("dev_read_addr() failed");
> return -ENODEV;
> }
> eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE);
> --
> 2.19.1
>
>
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi David,
> From: David Wu
> Sent: mardi 12 mai 2020 11:56
>
> For others using, clk_rx and clk_tx may not be necessary, and their clock
> names
> are different.
>
> Signed-off-by: David Wu
> ---
>
> Changes in v2:
> - Don't change the Rx and Tx clock names. (Patrice, Stephen)
>
> drivers/
Hi,
> From: Patrick DELAUNAY
> Sent: mardi 21 avril 2020 17:11
>
> For board using STPMIC1, the vddcore is provided by BUCK1 of STMPIC1 and
> need to be updated for 800MHz support and only after the clock tree
> initialization.
>
> The VDDCORE voltage value in provid
Hi Marek,
> From: U-Boot On Behalf Of Patrick DELAUNAY
> Sent: mercredi 22 avril 2020 10:25
>
> Dear Marek,
>
> > From: Marek Vasut
> > Sent: vendredi 10 avril 2020 20:56
> >
> > Add default U-Boot configuration for the DHCOR SoM on AV96 board.
>
Hi,
> From: Marek Vasut
> Sent: mercredi 22 avril 2020 13:18
>
> Add default U-Boot configuration for the DHCOR SoM on AV96 board.
>
> Reviewed-by: Patrick Delaunay
> Signed-off-by: Marek Vasut
> Cc: Manivannan Sadhasivam
> Cc: Patrick Delaunay
> Cc: Patrice
pick the correct device tree from an fitImage.
>
> Reviewed-by: Patrick Delaunay
> Signed-off-by: Marek Vasut
> Cc: Manivannan Sadhasivam
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> V2: No change
> V3: Drop dm-pre-reloc and gpio-cells from config node
> ---
Hi,
> From: Marek Vasut
> Sent: mercredi 22 avril 2020 13:18
>
> Add weak implementation of board_early_init_f() hook into the
> STM32MP1 SPL. This can be used to read out e.g. configuration straps before
> initializing the DRAM.
>
> Reviewed-by: Patrick Delaunay
>
n the single
> top-
> level DRAM configuration, if matching on subnodes is required, then this
> board_stm32mp1_ddr_config_name_match() must be overridden.
>
> Signed-off-by: Marek Vasut
> Cc: Manivannan Sadhasivam
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
configuration dtsi
> files in
> board DT.
>
> Reviewed-by: Patrick Delaunay
> Signed-off-by: Marek Vasut
> Cc: Manivannan Sadhasivam
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> V2: Add compatible string
> V3: Add RB from Patrick
> ---
, read them
> out and use the value to pick the correct DDR3 config.
>
> Reviewed-by: Patrick Delaunay
> Signed-off-by: Marek Vasut
> Cc: Manivannan Sadhasivam
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> V2: Match on compatible string
> V3: Add RB fro
Hi,
> From: Patrick DELAUNAY
> Sent: mercredi 18 mars 2020 09:23
>
>
> This serie migrate the dynamically build MTD
> (CONFIG_SYS_MTDPARTS_RUNTIME) and the DFU configuration
> (CONFIG_SET_DFU_ALT_INFO) previously based on ENV variables to
> CONFIG_.
>
> These
Hi,
> From: Patrick DELAUNAY
> Sent: mercredi 18 mars 2020 09:25
>
>
> Add a specific command stm32prog for STM32MP soc family witch allows to
> update the devices on the board with the STMicroelectronics tool
> STM32CubeProgrammer (http://www.st.com/STM32CubeProg).
>
Hi,
> From: Patrick DELAUNAY
> Sent: mercredi 22 avril 2020 14:29
>
>
> It is a V2 for the serie
> http://patchwork.ozlabs.org/project/uboot/list/?series=167872
>
> Rebased on master branch and after the first reviews:
>
> [01/16] arm: stm32mp: update dep
Hi Patrice
> From: Patrice CHOTARD
> Sent: jeudi 30 avril 2020 18:41
>
> On DK1/2 board, when a 1.5A power supply is detected, a warning message is
> displayed. In this message, "1.5mA" is displayed instead of "1.5A".
>
> Signed-off-by: Patrice Chotard
> ---
>
> board/st/stm32mp1/stm32mp1.c
> Fixes: 132e5b68986d ("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96
> board")
> Signed-off-by: Marek Vasut
> Cc: Manivannan Sadhasivam
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 2 +-
>
ff-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> Note that these settings are generated by the cubemx tool
> ---
> .../stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi | 120 ++
> .../stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi | 120 +++
Hi,
> From: Marek Vasut
> Sent: lundi 27 avril 2020 12:27
>
> Define I2C EEPROM bus and address, so that the 'eeprom' command uses the
> correct ones and does not generate the following error:
> eeprom_rw_block: Cannot find udev for a bus 0
>
> Signed-
Hi
> From: Marek Vasut
> Sent: lundi 27 avril 2020 12:27
>
> The SPI NOR nWP line is connected to GPIO PF7 on the SoM, pull the GPIO line
> high by default to clear SPI NOR WP.
>
> Signed-off-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> -
Hi,
> From: Patrick DELAUNAY
> Sent: jeudi 30 avril 2020 16:30
>
> Activate the data cache in SPL and in U-Boot before relocation.
>
> In arch_cpu_init(), the function early_enable_caches() sets the early TLB,
> early_tlb[] located .init section, and set cacheable:
> -
Hi
> From: Patrick DELAUNAY
> Sent: jeudi 30 avril 2020 16:30
>
> Activate cache on DDR to improve the accesses to DDR used by SPL:
> - CONFIG_SPL_BSS_START_ADDR
> - CONFIG_SYS_SPL_MALLOC_START
>
> Cache is configured only when DDR is fully initialized, to avoid spe
Hi,
> From: Patrick DELAUNAY
> Sent: jeudi 30 avril 2020 09:52
>
> Change the mmc displayed name in U-Boot for stm32_sdmmc2 driver to
> “STM32 SD/MMC”.
>
> This stm32_sdmmc2 driver is for version 2 of the ST HW IP SDMMC but the
> displayed name "STM32 SDMMC2"
Hi,
> From: Patrick DELAUNAY
> Sent: vendredi 24 avril 2020 15:48
> To: u-boot@lists.denx.de
> Cc: Lionel DEBIEVE ; Patrick DELAUNAY
> ; Lukasz Majewski ; Patrice
> CHOTARD ; U-Boot STM32 mailman.stormreply.com>
> Subject: [PATCH] clk: stm32mp1: fix CK_MPU calcul
Hi,
> From: Patrick DELAUNAY
> Sent: jeudi 30 avril 2020 15:53
> To: u-boot@lists.denx.de
> Cc: Patrick DELAUNAY ; Marek Vasut
> ; Tom Rini ; U-Boot STM32 st...@st-md-mailman.stormreply.com>
> Subject: [PATCH] ARM: dts: stm32mp1: DT alignment with Linux 5.7-rc2
>
on DHCOM
ARM: stm32: Hog GPIO PF7 high on DHCOM to unlock SPI NOR nWP
Patrice Chotard (2):
board: stm32mp1: Keep error led ON in case of low power detection
stm32mp1: Fix warning display when 1.5A power supply is used
Patrick Delaunay (43):
board: stm32mp1: m
t;;
...
};
Serie-cc: Christophe ROULLIER
Serie-cc: David Wu
Serie-cc: marex
Signed-off-by: Patrick Delaunay
---
drivers/net/dwc_eth_qos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index f67c5f4570..5e7ad6c65
he select IP
version.
This glue is implemented in Linux kernel in:
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
For information in stm32mp151.dtsi, the 2 compatibles are
supported:
ethernet0: ethernet@5800a000 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"
arning - spi_flash_probe_bus_cs() failed, using default
> >>> environment │ │ <> │ │ <> alloc space exhausted │ │
> >>> <> alloc space exhausted │ │ <> alloc space exhausted │ │
> >>> <> himport_r: can't insert "
Hi Heiko,
> From: Heiko Schocher
> Sent: vendredi 15 mai 2020 08:01
>
> Hello Patrick,
>
> Am 14.05.2020 um 15:47 schrieb Patrick DELAUNAY:
> > Hi Heiko
> >
> >> From: Heiko Schocher
> >> Sent: mardi 12 mai 2020 09:32
> >>
> >
in _dm_gpio_set_dir_flags() if setting direction was OK.
>
> Changes in v4:
> - new in version 4
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/gpio/gpio-uclass.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
Reviewed-by: Patrick Dela
Hi,
> From: U-Boot On Behalf Of Heinrich Schuchardt
> Sent: dimanche 15 mars 2020 13:03
>
> From: Atish Patra
>
> Currently, bootefi only parses memory reservation block to setup EFI reserved
> memory mappings. However, it doesn't parse the reserved-memory[1] device tree
> node that also can c
Move the stm32mp1 common code board_get_mtdparts() in common directory,
this patch reduce the maintenance effort on this generic part (not board
dependent).
Signed-off-by: Patrick Delaunay
---
board/dhelectronics/dh_stm32mp1/Makefile | 1 +
board/dhelectronics/dh_stm32mp1/board.c | 89
Move the stm32mp1 common code set_dfu_alt_info() in common directory,
this patch reduce the maintenance effort on this generic part (not board
dependent).
Signed-off-by: Patrick Delaunay
---
board/dhelectronics/dh_stm32mp1/Makefile | 2 +
board/dhelectronics/dh_stm32mp1/board.c | 50
This patch reduces the stm32mp1 environment size and builds
dynamically the MTD partitions with information from defconfig
(CONFIG_MTDPARTS_...).
Signed-off-by: Patrick Delaunay
---
board/st/common/Kconfig| 57 ++
board/st/common/stm32mp_mtdparts.c | 93
This patch reduces the stm32mp1 environment size and
builds dynamically the DFU board configuration with gpt
and mtd partitions and information from defconfig
(CONFIG_DFU_ALT_RAM0).
Signed-off-by: Patrick Delaunay
---
board/dhelectronics/dh_stm32mp1/Kconfig | 1 +
board/st/common/Kconfig
as fallback
the builtin DTB.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/Makefile | 1 +
arch/arm/mach-stm32mp/boot_params.c | 45 +
2 files changed, 46 insertions(+)
create mode 100644 arch/arm/mach-stm32mp/boot_params.c
diff --git a/arch/arm/m
uot;)
and the associated "reserved-memory" are deactivated in kernel device
tree when OP-TEE is not detected by U-Boot to prevent kernel issue
(memory is reserved but not used, optee driver probe failed).
Signed-off-by: Patrick Delaunay
---
This patch depends on "ARM: bootm:
As the op-tee presence is detected by U-boot, the stm32mp15_optee_defconfig
is identical to stm32mp15_trusted_defconfig and can be removed.
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/MAINTAINERS | 1 -
configs/stm32mp15_optee_defconfig | 134 --
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