Add usb_pgood_delay to ensure a correct detection of USB devices.
Signed-off-by: Patrice Chotard
---
include/configs/stm32mp15_st_common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/stm32mp15_st_common.h
b/include/configs/stm32mp15_st_common.h
index d0cd4130cec
With some USB device, the current usb_pgood_delay value is not long
enough to ensure a correct detection.
Signed-off-by: Patrice Chotard
---
include/configs/stm32mp13_st_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/stm32mp13_st_common.h
b
: Marek Vasut
> ---
> Cc: Jim Liu
> Cc: Neil Armstrong
> Cc: Patrice Chotard
> Cc: Samuel Holland
> Cc: Sumit Garg
> Cc: Weijie Gao
> ---
> include/generic-phy.h | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/generic-phy.h b/
Hi Marek
On 3/19/23 18:09, Marek Vasut wrote:
> Insert missing space in front of asterisk to avoid checkpatch warning.
> Replace 'beeing' with 'being' as well, to fix another checkpatch warning.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Jim Liu
>
m Liu
> Cc: Neil Armstrong
> Cc: Patrice Chotard
> Cc: Samuel Holland
> Cc: Sumit Garg
> Cc: Weijie Gao
> ---
> drivers/phy/phy-uclass.c | 22
> include/generic-phy.h| 77
> 2 files changed, 99 insertions(+)
From: Patrice Chotard
In case there is no RAM driver retrieve RAM size from DT as fallback.
Signed-off-by: Patrice Chotard
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/dram_init.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-stm32mp
of type 'long unsigned int',
but argument 2 has type 'phys_addr_t' {aka 'long long unsigned
int'}
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/dram_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
dif
, DCACHE_DEFAULT_OPTION);
| ^
Signed-off-by: Patrice Chotard
---
arch/arm/include/asm/system.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm
Add STM32MP257F Evaluation board support, it embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2
for power distribution ...
Patrice Chotard (8):
arm: caches: Make DCACHE_DEFAULT_OPTION accessible for ARM64 arch
From: Patrice Chotard
In case there is no RAM driver retrieve RAM size from DT as fallback.
Signed-off-by: Patrice Chotard
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/dram_init.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-stm32mp
Limit DDR usage under 4GB boundary on STM32MP regardless of
memory size declared in device tree.
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/dram_init.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/dram_init.c
b/arch/arm/mach
of type 'long unsigned int',
but argument 2 has type 'phys_addr_t' {aka 'long long unsigned
int'}
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/dram_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
dif
, DCACHE_DEFAULT_OPTION);
| ^
Signed-off-by: Patrice Chotard
---
arch/arm/include/asm/system.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm
Add STM32MP257F Evaluation board support, it embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2
for power distribution ...
Patrice Chotard (8):
arm: caches: Make DCACHE_DEFAULT_OPTION accessible for ARM64 arch
When building with AARCH64 defconfig, we got warnings, fix them.
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/bsec.c | 29 +++--
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index
From: Patrice Chotard
When building with AARCH64 defconfig, we got warnings, fix them
by using registers base address defined as void __iomem * instead of
fdt_addr_t.
Signed-off-by: Patrice Chotard
Signed-off-by: Patrice Chotard
---
drivers/serial/serial_stm32.c | 23
Add stm32mp2 compatible.
Signed-off-by: Patrice Chotard
---
drivers/pinctrl/pinctrl_stm32.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 8bb7588714a..7120b8edba0 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b
Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC,
with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2 typeC,
SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
Sync device tree with kernel v6.6-rc1.
Signed-off-by: Patrice Chotard
---
arch/arm/dts
again but
with a new value for gd->arch.tlb_addr. gd->arch.tlb_addr has been
updated after relocation in arm_reserve_mmu().
Signed-off-by: Patrice Chotard
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-stm32mp/Kconfig | 26 ++-
arch/ar
Hi,
I got issues with my mailer which send partially this series, please drop it.
Patrice
On 10/27/23 16:39, Patrice Chotard wrote:
>
> Add STM32MP257F Evaluation board support, it embeds a
> STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
> 2*USB typeA, 1*USB2 typeC,
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp15-scmi.dtsi | 16
1 file changed, 16 deletions(-)
diff --git a/arch/arm/dts/stm32mp15-scmi.dtsi b/arch/arm/dts/stm32mp15-scmi.dtsi
index 543f24c2f4f..ad2584213d9 100644
--- a/arch/arm/dts/stm32mp15-scmi.dtsi
+++ b/arch/arm/dts
>
>> Signed-off-by: Michael Walle
>> Cc: Patrick Delaunay
>> Cc: Patrice Chotard
>> ---
>> CCing other ST people, maybe someone want to take over instead.
>> ---
>> MAINTAINERS | 3 +--
>> 1 file changed, 1 insertion(+), 2 deletions(-)
>>
On 8/22/23 09:51, Bhupesh Sharma wrote:
> While 23e20b2fa6 ("arm: stm32mp: Fix compilation issue when
> SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled") tried fixing
> this issue, fix it really by adding #if checks for SYS_ICACHE_OFF
> and SYS_DCACHE_OFF.
>
&g
lim, off);
> + printf("Limit reached 0x%llx while erasing at
> offset 0x%llx, remaining 0x%llx\n",
> + lim, erase_op.addr, remaining);
> return -EIO;
> }
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
figs/stm32f746-disco_spl_defconfig
> +++ b/configs/stm32f746-disco_spl_defconfig
> @@ -85,7 +85,7 @@ CONFIG_VIDEO=y
> CONFIG_BACKLIGHT_GPIO=y
> CONFIG_VIDEO_STM32=y
> CONFIG_VIDEO_STM32_MAX_XRES=480
> -CONFIG_VIDEO_STM32_MAX_YRES=640
> +CONFIG_VIDEO_STM32_MAX_YRES=272
>
_(EM<+M^L^74q?-LhQF`6hVOJ5K`-RKKOd^Ze6^u$l;{m?j;jxB&w%u7X7
> zpNi!Du~`}+z2MklD^V)@2-Fq&>p8JH^a<>6BJ}Oat+m9Leuyu&Ev|m@DLO5|dmSC!
> z90Q4(oJABB&I@z|`h|63Yt0HXY**c!OsDy&B)bjr@Z_Q%FM+23zT}{v(eDSFwAJTw
> z))rOp`3QJ2@R^ayGeG;L!f>>eVCc2p-IkDcnkThN_|bW51&)*EN z`jt>ssYU0QNl~!%`h}{Zeuk>LgA)1&~ih@X&|J
> zYtS#j0xob&ks>mnlV+w=nE}0%6UR;H17x|<57HZc`W)^F^pvb;^e{A9Apu?Vl&2k{
> zOKySdHtgeU=jN!wooxghuWOBmVj4El_guc6Rgc!J+CjYsl;$Ec%)^xl>LcKqs_(MM
> zc223(U3b0EX0jgGQ*DtGk87zMgY{nI0QB}tB!cQr
> z2>%!Lt1bfqK^-DDxw@i
> zEE3PqC(F5>s=uC^bJ0( zt=;sa@YWFMw{mvyhdxMJ_43v)xWMz2wXyyyu|N;?P zWFzS4zitXw`Zx4;wK3EOIQOfK(}?y3Xww2(CmBjlRtLn-Lz|`fnER-< zDbY>6a63L2Y!UIhZRL8
> z6yXm!_#HYti@`AU=B`M{pbibySn9@YB&TvmF{i`PhJ6gz{&NHrjiu#dQ^h?({$(VQ
> zZpQK0q`1di@+M>H^c}(Ou@PE-IjiK={wu$neL7kZUruGzhmN@D)6p>AA?c0W8u!RZ
> zt=5-#t|1>iHp#3pO8-Sq-cY?4YULh*#z8!kg6gLDJvNoyR4MW)Bg4Ta{IRLT*l4X+
> z*Cm8C6F8$+cslw8*(m{uA!rSMlAAUj>(oR79lU#NjOM;!*pgo9u}OrA5l(E@V)eMy
> z&U|btx<>=q#SwUY!K=Bh&;MbB8LN8MhChT@Wyd-;PXAqw`bQ|<$5?`UjBl6oYbSk?
> zHw>=Frkr~;6E6&5ydhRPt>a}GAFsDqr6qvz1U&JSj+b$d2V>!q#Bp1y{z!2?Hu3Ip
> z7oFU&f;JQJ4FdNlk4-6NCTInGx3K!r390BFn`o#jxf!cTJ?luuihpckp=F%&Bvqj%
> zQMQvlWe8n4a$?+bPFc#?xG6}@!5g^`rvt{59-E@fPvRU*j`oRAd}?u`Z;V&Apb`|N
> z-o`woiKN%*Lu5CltKG(_n}2o8N}cJ$=18Z*+41JSWNc@Bx5Om6fdzC@d1ct)Y~WFq
> zb8x)QP1ap4mI%&H0TOc9hrfM!hh4!l=cIp?U)49c%d6+6*MCubM?(IpmO3Lnbabko
> z$OeedFRF8#yzLot5uXj=en*DZg=(61AR8nd&H-TM$aIf6={s*S)&)DbbZokMLUUQi
> z*f5FKkvBDywU*(?FG+V^EQ7HbHWSJ4pS6zek|8=aQzP}14F5@Y6D8esY?gMBOYIjE
> zzCY*}zys?rI$OPU4ag?^sM>VWu{oM^`hq6A_={H7W;!}oWmez>RtxTn5|+-`d_4=)
> z2gTIy_2gb$T>4I8q5fNhjrd2#w`!LY(o#nk>4|I$u@}c^bs42&i#5+SB2$i*36HcR
> z8zlDMRxj1FP#Lg3K^`hCi4PUe(K03to|Ssr^9t2S|D}$;z4mcnt6Q2OPDoD=g_E@!
> zKz9%sUvpRVy4(PV(3_fb=7^tCt<(B-m~%i;Mg~!LI?DKK?tdv?UmB=(kN>~?e=GdC
> HRgC-}TzMV3
>
> literal 0
> HcmV?d1
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit 284b08fb51b6 ("board: stm32mp1: add
splash screen with stmicroelectronics logo").
Signed-off-by: Patrice Chotard
---
configs/stm32f769-disco_defconfig | 2 +-
configs
ic int __maybe_unused stm32mp1_clk_dump(struct udevice *dev)
> {
> char buf[32];
> int i, s, p;
> + struct stm32mp1_clk_priv *priv;
> +
> + priv = dev_get_priv(dev);
>
> printf("Clocks:\n");
> for (i = 0; i < _PARENT_NB; i++) {
> @@ -2242,28 +2245,9 @@ static void __maybe_unused stm32mp1_clk_dump(struct
> stm32mp1_clk_priv *priv)
> stm32mp1_clk_parent_sel_name[i], i, p);
> }
> }
> -}
> -
> -#ifdef CONFIG_CMD_CLK
> -int soc_clk_dump(void)
> -{
> - struct udevice *dev;
> - struct stm32mp1_clk_priv *priv;
> - int ret;
> -
> - ret = uclass_get_device_by_driver(UCLASS_CLK,
> - DM_DRIVER_GET(stm32mp1_clock),
> - &dev);
> - if (ret)
> - return ret;
> -
> - priv = dev_get_priv(dev);
> -
> - stm32mp1_clk_dump(priv);
>
> return 0;
> }
> -#endif
>
> static int stm32mp1_clk_probe(struct udevice *dev)
> {
> @@ -2294,7 +2278,7 @@ static int stm32mp1_clk_probe(struct udevice *dev)
> #if defined(VERBOSE_DEBUG)
> /* display debug information for probe after relocation */
> if (gd->flags & GD_FLG_RELOC)
> - stm32mp1_clk_dump(priv);
> + stm32mp1_clk_dump(dev);
> #endif
>
> gd->cpu_clk = stm32mp1_clk_get(priv, _CK_MPU);
> @@ -2325,6 +2309,9 @@ static const struct clk_ops stm32mp1_clk_ops = {
> .disable = stm32mp1_clk_disable,
> .get_rate = stm32mp1_clk_get_rate,
> .set_rate = stm32mp1_clk_set_rate,
> +#if IS_ENABLED(CONFIG_CMD_CLK) && !IS_ENABLED(CONFIG_SPL_BUILD)
> + .dump = stm32mp1_clk_dump,
> +#endif
> };
>
> U_BOOT_DRIVER(stm32mp1_clock) = {
For stm32mp1, tested on stm32mp157c-dk2 board
Tested-by: Patrice Chotard
Thanks
Patrice
lks(dev, -1, 0);
>
> + uclass_foreach_dev_probe(UCLASS_CLK, dev) {
> + ops = dev_get_driver_ops(dev);
> + if (ops && ops->dump) {
> + printf("--\n");
> + ops->dump(dev);
> + }
> + }
> +
> return 0;
> }
> #else
Reviewed-by: Patrice Chotard
Tested-by: Patrice Chotard
Thanks
Patrice
t_parent)(struct clk *clk, struct clk *parent);
> int (*enable)(struct clk *clk);
> int (*disable)(struct clk *clk);
> +#if IS_ENABLED(CONFIG_CMD_CLK)
> + int (*dump)(struct udevice *dev);
> +#endif
> };
>
> #if 0 /* For documentation only */
Reviewed-by: Patrice Chotard
Tested-by: Patrice Chotard
Thanks
Patrice
mp; !!clk->dev;
> }
>
> -int soc_clk_dump(void);
> -
> #endif
>
> #define clk_prepare_enable(clk) clk_enable(clk)
Reviewed-by: Patrice Chotard
Tested-by: Patrice Chotard
Thanks
Patrice
On 9/12/23 08:19, AKASHI Takahiro wrote:
> The commit 85dc58289238 ("firmware: scmi: prepare uclass to pass channel
> reference") added an explicit parameter, channel, but it seems to make
> the code complex.
>
> Hiding this parameter will allow for adding a generic (protocol-agnostic)
> helper fu
Replace ohci_setup_phy() and ohci_shutdown_phy () by respectively
generic_setup_phy() and generic_shutdown_phy().
Signed-off-by: Patrice Chotard
Cc: Marek Vasut
Cc: Simon Glass
---
drivers/usb/host/ohci-generic.c | 56 ++---
1 file changed, 3 insertions(+), 53
In drivers usb/host/{ehci,ohci}-generic.c, {ehci,ohci}_setup_phy() and
{ehci,ohci}_shutdown_phy() shares 95% of common code.
Factorize this code in new generic_{setup,shudown}_phy() functions.
Signed-off-by: Patrice Chotard
Cc: Marek Vasut
Cc: Simon Glass
---
drivers/phy/phy-uclass.c | 42
Replace ehci_setup_phy() and ehci_shutdown_phy () by respectively
generic_setup_phy() and generic_shutdown_phy().
Signed-off-by: Patrice Chotard
Cc: Marek Vasut
Cc: Simon Glass
---
drivers/usb/host/ehci-generic.c | 6 +++---
drivers/usb/host/ehci-msm.c | 4 ++--
drivers/usb/host/ehci-mx6
Remove unused ehci_{setup,shutdown}_phy() helpers now replaced by
generic_{setup,shutdown}_phy().
Signed-off-by: Patrice Chotard
Cc: Marek Vasut
Cc: Simon Glass
---
drivers/usb/host/ehci-hcd.c | 66 -
drivers/usb/host/ehci.h | 4 ---
2 files changed
In drivers ehci-generic.c and ohci-generic.c, specific phy
helpers has been added and shared 95% of common code.
Factorize this code in generic_{setup,shutdown}_phy() helpers
and update all consumers.
Patrice Chotard (4):
phy: Add generic_{setup,shutdown}_phy() helpers
usb: ohci: Make
ulong clk_set_rate(struct clk *clk, ulong rate)
> if (!ops->set_rate)
> return -ENOSYS;
>
> + /* get private clock struct used for cache */
> + clk_get_priv(clk, &clkp);
> /* Clean up cached rates for us and all child clocks */
> - clk_clean_rate_cache(clk);
> + clk_clean_rate_cache(clkp);
>
> return ops->set_rate(clk, rate);
> }
Reviewed-by: Patrice Chotard
Thanks
Patrice
mpty flashlayout */
> + if (!data->dev_nb)
> + return;
> +
> /* initialize the selected device */
> for (i = 0; i < data->dev_nb; i++) {
> ret = init_device(data, &data->dev[i]);
Reviewed-by: Patrice Chotard
Thanks
Patrice
md_read(u64 offset, void *buf, long
> *len)
> }
> phase = stm32prog_data->phase;
> if (phase == PHASE_FLASHLAYOUT)
> - destination = STM32_DDR_BASE;
> + destination = CONFIG_SYS_LOAD_ADDR;
> dfu_offset = stm32prog_data->offset;
>
> /* mandatory header, size = PHASE_MIN_SIZE */
Reviewed-by: Patrice Chotard
Thanks
Patrice
address);
> + ret = stm32prog_start(data, address);
>
> if (ret)
> stm32prog_serial_result(ABORT_BYTE);
> diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
> b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
> index bcb4d373f69..be38ff239b2 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
> +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
> @@ -41,7 +41,7 @@ static int stm32prog_set_phase(struct stm32prog_data *data,
> u8 phase,
> static int stm32prog_cmd_write(u64 offset, void *buf, long *len)
> {
> u8 phase;
> - u32 address;
> + uintptr_t address;
> u8 *pt = buf;
> void (*entry)(void);
> int ret;
> @@ -58,7 +58,7 @@ static int stm32prog_cmd_write(u64 offset, void *buf, long
> *len)
> address = (pt[1] << 24) | (pt[2] << 16) | (pt[3] << 8) | pt[4];
> if (phase == PHASE_RESET) {
> entry = (void *)address;
> - printf("## Starting application at 0x%x ...\n", address);
> + printf("## Starting application at 0x%p ...\n", entry);
> (*entry)();
> printf("## Application terminated\n");
> return 0;
Reviewed-by: Patrice Chotard
Thanks
Patrice
f4b96fa75 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
> +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
> @@ -20,7 +20,12 @@
> #define DEFAULT_ADDRESS 0x
>
> #define CMD_SIZE 512
> +/* SMC is only supported in SPMIN for STM32MP15x */
> +#ifdef CONFIG_STM32MP15x
> #define OTP_SIZE_SMC 1024
> +#else
> +#define OTP_SIZE_SMC 0
> +#endif
> #define OTP_SIZE_TA 776
> #define PMIC_SIZE8
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
t; CONFIG_DM_REGULATOR_STM32_VREFBUF=y
> CONFIG_DM_REGULATOR_STPMIC1=y
> +CONFIG_DM_REGULATOR_SCMI=y
> CONFIG_REMOTEPROC_STM32_COPRO=y
> CONFIG_RESET_SCMI=y
> CONFIG_DM_RNG=y
Reviewed-by: Patrice Chotard
memset(buf, 0, buflen);
> @@ -1197,8 +1197,8 @@ static int create_gpt_partitions(struct stm32prog_data
> *data)
> sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
> run_command(buf, 0);
> #endif
> + puts("done\n");
> }
> - puts("done\n");
>
> #ifdef DEBUG
> run_command("mtd list", 0);
Reviewed-by: Patrice Chotard
Thanks
Patrice
UTOEND);
> + /* Set nb bytes to transfer and reload (if needed) */
> + cr2 &= ~(STM32_I2C_CR2_NBYTES_MASK | STM32_I2C_CR2_RELOAD);
> if (msg->len > STM32_I2C_MAX_LEN) {
> cr2 |= STM32_I2C_CR2_NBYTES(STM32_I2C_MAX_LEN);
> cr2 |= STM32_I2C_CR2_RELOAD;
Reviewed-by: Patrice Chotard
Thanks
Patrice
STM32_I2C_ISR_TXIS | STM32_I2C_ISR_NACKF;
>
> - stm32_i2c_handle_reload(i2c_priv, msg, stop);
> + stm32_i2c_handle_reload(i2c_priv, msg);
> } else if (!bytes_to_rw) {
> /* Wait until TC flag is set */
> mask = STM32_I2C_ISR_TC;
Reviewed-by: Patrice Chotard
Thanks
Patrice
t;cr2, mask);
> + /* End of transfer, send stop condition if appropriate */
> + if (!ret && !(status & (STM32_I2C_ISR_NACKF | STM32_I2C_ISR_ERRORS)))
> + setbits_le32(®s->cr2, STM32_I2C_CR2_STOP);
>
> return stm32_i2c_check_end_of_message(i2c_priv);
> }
Reviewed-by: Patrice Chotard
Thanks
Patrice
quot;,
> +
> STM32_I2C_FALL_TIME_DEFAULT);
>
> i2c_priv->dnf_dt = dev_read_u32_default(dev,
> "i2c-digital-filter-width-ns", 0);
> if (!dev_read_bool(dev, "i2c-digital-filter"))
Reviewed-by: Patrice Chotard
Thanks
Patrice
32_I2C_ISR_TXIS | STM32_I2C_ISR_NACKF;
>
> - stm32_i2c_handle_reload(i2c_priv, msg, stop);
> + stm32_i2c_handle_reload(i2c_priv, msg);
> } else if (!bytes_to_rw) {
> /* Wait until TC flag is set */
> mask = STM32_I2C_ISR_TC;
Reviewed-by: Patrice Chotard
Thanks
Patrice
UTOEND);
> + /* Set nb bytes to transfer and reload (if needed) */
> + cr2 &= ~(STM32_I2C_CR2_NBYTES_MASK | STM32_I2C_CR2_RELOAD);
> if (msg->len > STM32_I2C_MAX_LEN) {
> cr2 |= STM32_I2C_CR2_NBYTES(STM32_I2C_MAX_LEN);
> cr2 |= STM32_I2C_CR2_RELOAD;
Reviewed-by: Patrice Chotard
Thanks
Patrice
mask);
> + /* End of transfer, send stop condition if appropriate */
> + if (!ret && !(status & (STM32_I2C_ISR_NACKF | STM32_I2C_ISR_ERRORS)))
> + setbits_le32(®s->cr2, STM32_I2C_CR2_STOP);
>
> return stm32_i2c_check_end_of_message(i2c_priv);
> }
Reviewed-by: Patrice Chotard
Thanks
Patrice
MAPSZ SZ_256M
>
> -/* Extend size of kernel image for uncompression */
> -
> /*MMC SD*/
> #define CONFIG_SYS_MMC_MAX_DEVICE3
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
return ret;
> }
> /* on success, lock the OTP for HASH key */
> - val = 1;
> + val = BSEC_LOCK_PERM;
> ret = misc_write(dev, STM32_BSEC_LOCK(word), &val, 4);
> if (ret != 4) {
> log_err("Lock OTP %i failed\n", word);
Reviewed-by: Patrice Chotard
Thanks
Patrice
sc_dev(&dev);
> + if (ret)
> + return CMD_RET_FAILURE;
> +
> + if (read_close_status(dev, !yes, &closed))
> return CMD_RET_FAILURE;
> - }
>
> if (closed) {
> printf("Error: already closed!\n");
> return CMD_RET_FAILURE;
> }
>
> + /* check PKH status before to close */
> + ret = read_hash_otp(dev, !yes, &lock);
> + if (ret) {
> + if (ret == -ENOENT)
> + printf("Error: OTP not programmed!\n");
> + return CMD_RET_FAILURE;
> + }
> if (!lock)
> printf("Warning: OTP not locked!\n");
>
> if (!yes && !confirm_prog())
> return CMD_RET_FAILURE;
>
> - ret = get_misc_dev(&dev);
> - if (ret)
> - return CMD_RET_FAILURE;
> -
> val = STM32_OTP_CLOSE_MASK;
> ret = misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), &val, 4);
> if (ret != 4) {
Reviewed-by: Patrice Chotard
Thanks
Patrice
printf("Warning: OTP not locked!\n");
> + printf("Warning: %s not locked!\n", key->name);
>
> if (!yes && !confirm_prog())
> return CMD_RET_FAILURE;
> @@ -275,7 +374,7 @@ static int do_stm32key_close(struct cmd_tbl *cmdtp, int
> flag, int argc, char *co
> val = STM32_OTP_CLOSE_MASK;
> ret = misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), &val, 4);
> if (ret != 4) {
> - printf("Error: can't update OTP\n");
> + printf("Error: can't update OTP %d\n", STM32_OTP_CLOSE_ID);
> return CMD_RET_FAILURE;
> }
>
> @@ -285,11 +384,15 @@ static int do_stm32key_close(struct cmd_tbl *cmdtp, int
> flag, int argc, char *co
> }
>
> static char stm32key_help_text[] =
> - "read []: Read the hash stored at addr in memory or in OTP\n"
> - "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n"
> - "stm32key close [-y] : Close the device, the hash stored in OTP\n";
> -
> -U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse ST Hash key", stm32key_help_text,
> + "list : list the supported key with description\n"
> + "stm32key select [] : Select the key identified by or
> display the key used for read/fuse command\n"
> + "stm32key read [ | -a ] : Read the curent key at or
> current / all (-a) key in OTP\n"
> + "stm32key fuse [-y] : Fuse the current key at addr in OTP\n"
> + "stm32key close [-y] : Close the device\n";
> +
> +U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Manage key on STM32", stm32key_help_text,
> + U_BOOT_SUBCMD_MKENT(list, 1, 0, do_stm32key_list),
> + U_BOOT_SUBCMD_MKENT(select, 2, 0, do_stm32key_select),
> U_BOOT_SUBCMD_MKENT(read, 2, 0, do_stm32key_read),
> U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse),
> U_BOOT_SUBCMD_MKENT(close, 2, 0, do_stm32key_close));
Reviewed-by: Patrice Chotard
Thanks
Patrice
t; if (closed)
> *closed = status;
> if (print)
> @@ -371,7 +409,7 @@ static int do_stm32key_close(struct cmd_tbl *cmdtp, int
> flag, int argc, char *co
> if (!yes && !confirm_prog())
> return CMD_RET_FAILURE;
>
> - val = STM32_OTP_CLOSE_MASK;
> + val = get_otp_close_mask();
> ret = misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), &val, 4);
> if (ret != 4) {
> printf("Error: can't update OTP %d\n", STM32_OTP_CLOSE_ID);
Reviewed-by: Patrice Chotard
Thanks
Patrice
Hi Waldemar
On 9/19/22 13:48, Waldemar Brodkorb wrote:
> Hi again,
>
> Waldemar Brodkorb wrote,
>
>> Hi,
>>
>> I am trying to run u-boot on a STM32F746G-DISCO device.
>> I am configuring u-boot with stm32f746-disco_spl_defconfig.
>>
>> But nothing happens on the LCD nor on the serial console.
>>
I forgot to mention that information can be directly found
in doc/board/st/stm32_MCU.rst
Patrice
On 9/19/22 13:48, Waldemar Brodkorb wrote:
> Hi again,
>
> Waldemar Brodkorb wrote,
>
>> Hi,
>>
>> I am trying to run u-boot on a STM32F746G-DISCO device.
>> I am configuring u-boot with stm32f746-
Hi Waldemar
On 9/19/22 13:48, Waldemar Brodkorb wrote:
> Hi again,
>
> Waldemar Brodkorb wrote,
>
>> Hi,
>>
>> I am trying to run u-boot on a STM32F746G-DISCO device.
>> I am configuring u-boot with stm32f746-disco_spl_defconfig.
>>
>> But nothing happens on the LCD nor on the serial console.
>>
This series is fixing issues in SPL boot mode:
- SPL binary size over 0x8000 bytes for STM32F746-disco, STM32F769-DISCO and
STM32746G-EVAL boards
- fix embedded flash size for STM32F769-DISCO
- fix CONFIG_SYS_SPL_ARGS_ADDR for STM32F746-DISCO and STM32746G-EVAL
Patrice Chotard (6
to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
configs/stm32f746-disco_spl_defconfig | 7 ---
1 file changed, 4 insertions(
to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
configs/stm32f769-disco_spl_defconfig | 7 ---
1 file changed, 4 insertions(
to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
configs/stm32746g-eval_spl_defconfig | 7 ---
1 file changed, 4 insertions(
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
configs/stm32f746-disco_spl_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
configs/stm32746g-eval_spl_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
* 32KB sectors
1 * 128KB sector1 * 128KB sector
3 * 256KB sectors 7 * 256KB sectors
Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly.
Signed-off-by: Patrice Chotard
---
arch/arm/include/asm/arch-stm32f7/stm32.h | 6 +++---
configs
Waldemar,
You can applied the following series on current U-Boot master
branch (a0759684e015bd7252be3af508c0fcfdbb8ec5dc):
https://patchwork.ozlabs.org/project/uboot/list/?series=318991
Thanks
Patrice
On 9/19/22 16:36, Patrice CHOTARD wrote:
> Hi Waldemar
>
> On 9/19/22 13:48,
Hi Waldemar
On 9/19/22 23:03, Waldemar Brodkorb wrote:
> Hi Patrice,
> Patrice CHOTARD wrote,
>
>> Waldemar,
>>
>> You can applied the following series on current U-Boot master
>> branch (a0759684e015bd7252be3af508c0fcfdbb8ec5dc):
>>
>> https://pa
Hi Waldemar
On 9/20/22 01:12, Waldemar Brodkorb wrote:
> Hi Simon,
> Simon Glass wrote,
>
>> Hi Waldemar,
>>
>> On Mon, 19 Sept 2022 at 13:48, Waldemar Brodkorb wrote:
>>>
>>> Hi again,
>>>
>>> Waldemar Brodkorb wrote,
>>>
Hi,
I am trying to run u-boot on a STM32F746G-DISCO device
Hi Waldemar
On 9/20/22 12:53, Waldemar Brodkorb wrote:
> Hi Patrice,
> Patrice CHOTARD wrote,
>
>> Hi Waldemar
>>
>> On 9/19/22 23:03, Waldemar Brodkorb wrote:
>>> Hi Patrice,
>>> Patrice CHOTARD wrote,
>>>
>>>> Waldemar,
>&
:
- Remove SYS_UBOOT_FLAG from stm32f746-disco.h
Patrice Chotard (7):
configs: stm32f746-disco: Fix SPL boot
configs: stm32f769-disco: Fix SPL boot
configs: stm32746g-eval: Fix SPL boot
configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR
configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR
to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32f746-disco_spl_defconfig | 7 ---
1 file change
to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32f769-disco_spl_defconfig | 7 ---
1 file change
to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32746g-eval_spl_defconfig | 7 ---
1 file change
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32f746-disco_spl_defconfig | 2 +-
1 file changed, 1 insertion
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32746g-eval_spl_defconfig | 2 +-
1 file changed, 1 insertion
is set by default to CONFIG_SYS_TEXT_BASE
which match with our requirement.
Signed-off-by: Patrice Chotard
---
(no changes since v1)
include/configs/stm32f746-disco.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/stm32f746-disco.h
b/include/configs/stm32f746-disco.h
index 64c1bc7d43..b0e
* 32KB sectors
1 * 128KB sector1 * 128KB sector
3 * 256KB sectors 7 * 256KB sectors
Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly.
Signed-off-by: Patrice Chotard
---
Changes in v2:
- Remove SYS_UBOOT_FLAG from stm32f746-disco.h
d enable the regulator manually
> in code, as the board already reconfigures the Buck3 regulator in
> code per PMIC NVM content instead.
>
> Fixes: 0adf10a87b1 ("ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on
> Avenger96")
> Signed-off-by: Marek Vasut
&g
Device tree alignment with kernel v6.0-rc4.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
arch/arm/dts/stm32746g-eval.dts | 18 -
arch/arm/dts/stm32f4-pinctrl.dtsi| 2 +-
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 4 +-
arch/arm/dts
STM32 SD/MMC: 0
> Loading Environment from MMC... OK
> In: serial@4001
> Out: serial@4001
> Err: serial@4001
> Net: No ethernet found.
> Hit any key to stop autoboot: 0
>
> ----
>
> The LMB don't generate error when 2 regions are identical (same address and
> size).
>
>
> A pending OP-TEE patch allow to avoid the U-Boot device tee modification and
> remove this trace:
>
> https://github.com/OP-TEE/optee_os/pull/5527
>
>
> Regards
>
> Patrick
>
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
t; + { "jedec,spi-nor", MTD_DEV_TYPE_NOR, },
> + { "spi-nand", MTD_DEV_TYPE_SPINAND},
> { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
> { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
> };
Reviewed-by: Patrice Chotard
Thanks
Patrice
include
> #include "stm32mp15-scmi-u-boot.dtsi"
> -#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
>
> / {
> aliases {
> diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
> b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
> index 54662f7e290..c265745ff10 100644
> --- a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
> @@ -5,7 +5,6 @@
>
> #include
> #include "stm32mp15-scmi-u-boot.dtsi"
> -#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
>
> / {
> aliases {
Reviewed-by: Patrice Chotard
Thanks
Patrice
Hi Patrick
For the series: applied on u-boot-stm32/next
Thanks
Patrice
On 9/6/22 18:53, Patrick Delaunay wrote:
> When the STM32CubeProgrammer sent a empty flashlayout.tsv
> file, the command stm32prog correctly parse the file
> but data->dev_nb = 0 and the stm32prog_devices_init
> operations sh
Hi Patrick
On 9/23/22 13:37, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 9/21/22 09:53, Patrick DELAUNAY wrote:
>> Hi,
>>
>> On 9/7/22 13:42, Patrick Delaunay wrote:
>>> Device tree alignment with Linux kernel v6.0-rc3:
>>> - ARM: dts: stm32: add su
HI Patrick
On 9/12/22 08:43, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 9/9/22 17:22, Patrick Delaunay wrote:
>> Improve the partitioning trace done in command stm32prog:
>> - remove the trace "partition: Done" when the GPT partitioning is not done
>> - in
Hi Patrick
On 9/23/22 13:38, Patrice CHOTARD wrote:
> Hi
>
> On 9/12/22 17:40, Patrick Delaunay wrote:
>> From: Christophe Kerello
>>
>> Current compatible string used to update SPI NAND and SPI NOR devices
>> can lead to a wrong partitions update (for example
Hi Patrick
On 9/15/22 18:11, Patrick Delaunay wrote:
>
> And support the 2 keys for STM32MP13x
> - PKHTH : Hash of the 8 ECC Public Keys Hashes Table
> (ECDSA is the authentication algorithm)
> - EDMK : Encryption/Decryption Master Key
>
> Only one key is supported for STM32MP15x
> -
Hi Patrick
On 9/19/22 08:42, Patrice CHOTARD wrote:
> Hi PAtrick
>
> On 9/16/22 16:52, Patrick Delaunay wrote:
>> Remove the unnecessary comment after the CONFIG_SYS_BOOTM_LEN
>> migration to Kconfig.
>>
>> Fixes: c45568cc4e51 ("Convert CONFIG_SYS_BOOTM_LEN
Hi Patrick
On 9/23/22 13:40, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 9/21/22 09:37, Patrick Delaunay wrote:
>> Remove the unnecessary nodes for TFABOOT and keep the mandatory part
>> in SOC dtsi, only the DDRCTRL and DDRPHY addresses.
>> This patch allows to m
int stm32_usbphyc_phy_power_off(struct phy *phy)
> return 0;
>
> if (usbphyc_phy->vbus) {
> - ret = regulator_set_enable(usbphyc_phy->vbus, false);
> + ret = regulator_set_enable_if_allowed(usbphyc_phy->vbus, false);
> if (ret)
> return ret;
> }
Reviewed-by: Patrice Chotard
Thanks
Patrice
g
> b/configs/stm32mp15_trusted_defconfig
> index 1154eec210c..6644ea4c81f 100644
> --- a/configs/stm32mp15_trusted_defconfig
> +++ b/configs/stm32mp15_trusted_defconfig
> @@ -23,6 +23,7 @@ CONFIG_FIT=y
> CONFIG_BOOTDELAY=1
> CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
> CONFIG
7fd93c55db 100644
> --- a/common/usb_hub.c
> +++ b/common/usb_hub.c
> @@ -47,7 +47,7 @@
> #define HUB_SHORT_RESET_TIME 20
> #define HUB_LONG_RESET_TIME 200
>
> -#define HUB_DEBOUNCE_TIMEOUT 1000
> +#define HUB_DEBOUNCE_TIMEOUT CONFIG_USB_HUB_DEBOUNCE_TIMEOUT
>
> #define PORT_OVERCURRENT_MAX_SCAN_COUNT 3
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
On 9/26/22 14:52, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/23/22 13:20, Patrice Chotard wrote:
>> Device tree alignment with kernel v6.0-rc4.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
>&
On 9/26/22 14:50, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SP
On 9/26/22 14:57, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SP
On 9/26/22 14:57, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SP
On 9/26/22 14:58, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
>> fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
>> It solves hard fault when jumping from SPL to U-Boot.
&
On 9/26/22 14:58, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
>> fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
>> It solves hard fault when jumping from SPL to U-Boot.
&
On 9/26/22 15:05, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
>> MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
>> STM32F746. The flash layout i
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