-off-by: Neil Armstrong
---
arch/arm/mach-snapdragon/include/mach/gpio.h | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-snapdragon/include/mach/gpio.h
b/arch/arm/mach-snapdragon/include/mach/gpio.h
index 53c6ae06490..cc8f405e20b 100644
--- a
Use the previously introduced msm_special_pin_data to setup the special
pins configuration if the SoC driver have them specified.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/pinctrl-qcom.c | 37 +++--
1 file changed, 35 insertions(+), 2 deletions
Add the special pins configuration data to allow setup the bias
of the UFS and SDCard pins on the SM8550 SoC.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/pinctrl-sm8550.c | 42 ---
1 file changed, 34 insertions(+), 8 deletions(-)
diff --git a/drivers
Add the special pins configuration data to allow setup the bias
of the UFS and SDCard pins on the SM8650 SoC.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/pinctrl-sm8650.c | 42 ---
1 file changed, 34 insertions(+), 8 deletions(-)
diff --git a/drivers
hat
usb_gadget_map_request() hasn't been called yet.
Fixes: fd15b58c1a9 ("dwc3: flush cache only if there is a buffer attached to a
request")
Signed-off-by: Neil Armstrong
---
drivers/usb/dwc3/gadget.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/u
link startup for Qualcomm Controllers v5,
let's just remove the logic.
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index be64bf971f1..28c244b70e5 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers
On 29/05/2024 07:33, Sumit Garg wrote:
Hi Neil,
On Tue, 28 May 2024 at 14:02, Neil Armstrong wrote:
Add support for bias-pull-down as an alternate of bias-pull-up.
nit: s/alternate/alternative/
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/pinctrl-qcom.c | 1 +
1 file
/arm/dts directory for these boards.
Keep A1 DTs locally since the architecture is still young.
CI built & tested at:
https://gitlab.com/amlogic-foss/amlogic-u-boot-autotest/-/pipelines/1233461384
Signed-off-by: Neil Armstrong
---
Changes in v2:
- add change to remove prefix in fdt
Remove amlogic/ path prefix in CFG_EXTRA_ENV_SETTINGS fdtfile when
using CONFIG_OF_UPSTREAM, otherwise amlogic/ is added twice.
Signed-off-by: Neil Armstrong
---
include/configs/meson64.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/include/configs/meson64.h b
: Neil Armstrong
---
arch/arm/mach-meson/Kconfig| 3 +++
configs/beelink-gt1-ultimate_defconfig | 2 +-
configs/jethub_j100_defconfig | 2 +-
configs/jethub_j80_defconfig | 2 +-
configs/khadas-vim2_defconfig | 2 +-
configs/khadas-vim_defconfig | 2
: Neil Armstrong
---
arch/arm/mach-meson/Kconfig | 1 +
configs/bananapi-cm4-cm4io_defconfig | 2 +-
configs/bananapi-m2-pro_defconfig | 2 +-
configs/bananapi-m2s_defconfig| 2 +-
configs/bananapi-m5_defconfig | 2 +-
configs/beelink-gsking
Hi,
On Tue, 19 Mar 2024 15:42:59 +0100, Neil Armstrong wrote:
> Enable OF_UPSTREAM to use upstream DT and add amlogic/ prefix to the
> DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
> including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory and
> dr
Hi,
On Fri, 29 Mar 2024 18:51:47 +0100, Neil Armstrong wrote:
> Enable OF_UPSTREAM to use upstream DT and add amlogic/ prefix to the
> DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
> including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory and
> dr
+++ b/arch/arm/mach-snapdragon/qcom-priv.h
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#ifndef __QCOM_PRIV_H__
+#define __QCOM_PRIV_H__
+
+#if CONFIG_IS_ENABLED(OF_LIVE)
+/**
+ * qcom_of_fixup_nodes() - Fixup Qualcomm DT nodes
+ *
+ * Adjusts nodes in the live tree to improve compatibility with U-Boot.
+ */
+void qcom_of_fixup_nodes(void);
+#else
+static inline void qcom_of_fixup_nodes(void)
+{
+ log_debug("Unable to dynamically fixup USB nodes, please enable
CONFIG_OF_LIVE\n");
+}
+#endif /* OF_LIVE */
+
+#endif /* __QCOM_PRIV_H__ */
Reviewed-by: Neil Armstrong
Also tested on SM8550 & SM8650, so:
Tested-by: Neil Armstrong
u64 start = timer_get_us(); \
func(__VA_ARGS__); \
@@ -119,5 +150,6 @@ static void fixup_usb_nodes(void)
void qcom_of_fixup_nodes(void)
{
time_call(fixup_usb_nodes);
+ time_call(fixup_power_domains);
}
Reviewed-by: Neil Armstrong
Also tested on SM8550 & SM8650, so:
Tested-by: Neil Armstrong
@@ -160,8 +161,9 @@ void __weak qcom_board_init(void)
}
int board_init(void)
{
+ regulators_enable_boot_on(false);
show_psci_version();
qcom_of_fixup_nodes();
qcom_board_init();
return 0;
Reviewed-by: Neil Armstrong
ed on.
+ *
https://lore.kernel.org/linux-arm-msm/20240320122515.3243711-1-caleb.conno...@linaro.org/
+ */
+&pcie0_3p3v_dual {
+ regulator-always-on;
+};
Reviewed-by: Neil Armstrong
ocks for Debug UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.
In addition, the drivers are enabled in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (3):
UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.
Signed-off-by: Neil Armstrong
---
drivers/clk/qcom/Kconfig| 8 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock
UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.
Signed-off-by: Neil Armstrong
---
drivers/clk/qcom/Kconfig| 8 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock
Enable the SM8550 & SM8650 clock driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 1abb57345ff..993c2d25f07 100644
--- a/configs/qcom_defco
& SM1 to using upstream DT
----
Neil Armstrong (5):
configs: meson64: remove amlogic prefix in fdtfile when
CONFIG_OF_UPSTREAM is selected
dts: meson: Switch GXL, GXM & AXG to using upstream DT
dts: meson: Drop redundant GXL, GXM &
Add pinctrl driver for the TLMM block found in the SM8550 & SM8650 SoCs.
This driver only handles the gpio and qup debug uart pinmux, and makes sure
the pinconf applies on SDC2 pins.
Finally enable both drivers in the Qualcomm defconfig
Signed-off-by: Neil Armstrong
---
Neil Armstron
Add pinctrl driver for the TLMM block found in the SM8550 SoC.
This driver only handles the gpio and qup1_se7 pinmux, and makes sure
the pinconf applies on SDC2 pins.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/Kconfig | 7
drivers/pinctrl/qcom/Makefile | 1
Enable the SM8550 & SM8650 pinctrl drivers for Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 222db6448ab..a92b6ef7911 100644
--- a/configs/qcom_defco
Add pinctrl driver for the TLMM block found in the SM8650 SoC.
This driver only handles the gpio and qup2_se7 pinmux, and makes sure
the pinconf applies on SDC2 pins.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/Kconfig | 7
drivers/pinctrl/qcom/Makefile | 1
cnfg registers and
mark periperal as read-only when the owner id doesn't match
- finally add version 7 defines
SPMI Arbiter Version 7 is present on SM8450, SM8550 and SM8650 SoC.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (4):
spmi: msm: fix version 5 support
spmi
Properly use ch_offset in msm_spmi_write() reg access.
Fixes: f5a2d6b4b03 ("spmi: msm: add arbiter version 5 support")
Signed-off-by: Neil Armstrong
---
drivers/spmi/spmi-msm.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/spmi/sp
Since version 2, the cmd format has changed, takes helpers
from Linux driver and use a switch/case to handle all
versions in msm_spmi_write/read() command.
Signed-off-by: Neil Armstrong
---
drivers/spmi/spmi-msm.c | 75 -
1 file changed, 55
s and introduce the SPMI_CHANNEL_READ_ONLY flag to
mark a peripheral as read-only.
Signed-off-by: Neil Armstrong
---
drivers/spmi/spmi-msm.c | 33 +
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
Add the defines and support for SPMI arbiters version 7,
which can handle up to 1024 peripherals, and can also drive
a secondary bus which is not implemented yet.
Signed-off-by: Neil Armstrong
---
drivers/spmi/spmi-msm.c | 33 +
1 file changed, 29 insertions
First add PMIC gpio variant on pm8550-gpio, then rework the
qcom-pmic button driver to support data structs for each PMIC
variant and finally add the data for the pmk8350 button configs.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (3):
gpio: qcom_pmic_gpio: add support for pm8550-gpio
Add support for PM8550 GPIO controller variant, keep read-only
until the GPIO and Pinctrl setup is fixed for new PMICs.
Signed-off-by: Neil Armstrong
---
drivers/gpio/qcom_pmic_gpio.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio
Move node name checks to a proper data struct with all information
for the supported subnodes.
Replace the key offset defines with the Linux driver ones.
Signed-off-by: Neil Armstrong
---
drivers/button/button-qcom-pmic.c | 84 ++-
1 file changed, 56
Finally add the entries for the qcom,pmk8350-pwrkey and qcom,pmk8350-resin
found on PMICs used with SM8350 and later SoCs.
Signed-off-by: Neil Armstrong
---
drivers/button/button-qcom-pmic.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/button/button-qcom-pmic.c
b
Add support for the new Qualcomm Synopsys eUSB2 PHY found in the
SM8550 and SM8650 SoCs.
Finally enable the driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (2):
phy: qcom: add Synopsys eUSB2 PHY driver
qcom_defconfig: enable the Qualcomm Synopsys
Add a driver for the new Synopsys eUSB2 PHY found in the SM8550
and SM8650 SoCs.
Signed-off-by: Neil Armstrong
---
drivers/phy/qcom/Kconfig | 8 +
drivers/phy/qcom/Makefile | 1 +
drivers/phy/qcom/phy-qcom-snps-eusb2.c | 365 +
3
Enable the Qualcomm Synopsys eUSB2 PHY driver in Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 1abb57345ff..b0ae5eb4df3 100644
--- a/configs/qcom_defconfig
On 05/04/2024 10:35, Neil Armstrong wrote:
Add a driver for the new Synopsys eUSB2 PHY found in the SM8550
and SM8650 SoCs.
Signed-off-by: Neil Armstrong
---
drivers/phy/qcom/Kconfig | 8 +
drivers/phy/qcom/Makefile | 1 +
drivers/phy/qcom/phy-qcom-snps-eusb2
On 05/04/2024 10:27, Neil Armstrong wrote:
Finally add the entries for the qcom,pmk8350-pwrkey and qcom,pmk8350-resin
found on PMICs used with SM8350 and later SoCs.
Signed-off-by: Neil Armstrong
---
drivers/button/button-qcom-pmic.c | 14 ++
1 file changed, 14 insertions
On 08/04/2024 15:07, Caleb Connolly wrote:
This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.
Signed-off-by: Caleb Connolly
---
drivers/pinctrl/qcom/Kconfig | 7 +++
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-s
On 09/04/2024 17:02, Caleb Connolly wrote:
Add the newly created u-boot-qcom mailing list to keep track of Qualcomm
patches.
Additionally, link to the U-Boot Snapdragon custodian tree.
Signed-off-by: Caleb Connolly
---
Cc: Neil Armstrong
Cc: Sumit Garg
Cc: u-boot@lists.denx.de
Hi,
On 09/04/2024 20:03, Caleb Connolly wrote:
We currently default to the lowest rate but this actually doesn't work
on most platforms. Default to the HS400 speed instead which is most
common on Qualcomm platforms.
Signed-off-by: Caleb Connolly
---
drivers/mmc/msm_sdhci.c | 2 +-
1 file ch
re_major, core_minor);
+
/*
* Support for some capabilities is not advertised by newer
* controller versions and must be explicitly enabled.
*/
Reviewed-by: Neil Armstrong
dex);
+ if (ret)
+ host->index = 0;
+ priv->base = dev_read_addr_index_ptr(dev, 1);
+
+ if (!host->ioaddr)
return -EINVAL;
+ if (!var_info->mci_removed && !priv->base) {
+ printf("msm_sdhci: MCI base address not found\n");
+ return -EINVAL;
+ }
+
return 0;
}
static int msm_sdc_bind(struct udevice *dev)
Reviewed-by: Neil Armstrong
{ .compatible = "qcom,sdhci-msm-v4", .data = (ulong)&msm_sdhc_mci_var },
Reviewed-by: Neil Armstrong
selector - 150]);
+ else
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
return pin_name;
}
static unsigned int sdm845_get_function_mux(__maybe_unused unsigned int pin,
At some point we should add the pinconf settings for SDC and UFS, but for now
it's ok!
Reviewed-by: Neil Armstrong
On 10/04/2024 11:13, Sumit Garg wrote:
Hi Neil,
On Thu, 4 Apr 2024 at 22:16, Neil Armstrong wrote:
Add the GCC and TCSRCC clock driver for the SM8550 SoC.
The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
On 10/04/2024 11:27, Sumit Garg wrote:
On Wed, 10 Apr 2024 at 14:46, Neil Armstrong wrote:
On 10/04/2024 11:13, Sumit Garg wrote:
Hi Neil,
On Thu, 4 Apr 2024 at 22:16, Neil Armstrong wrote:
Add the GCC and TCSRCC clock driver for the SM8550 SoC.
The GCC driver uses the clk-qcom
First add PMIC gpio variant on pm8550-gpio, then rework the
qcom-pmic button driver to support data structs for each PMIC
variant and finally add the data for the pmk8350 button configs.
Signed-off-by: Neil Armstrong
---
Changes in v2:
- added missing qcom,pmk8350-pon compatible
- Link to v1
Add support for PM8550 GPIO controller variant, keep read-only
until the GPIO and Pinctrl setup is fixed for new PMICs.
Signed-off-by: Neil Armstrong
---
drivers/gpio/qcom_pmic_gpio.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio
Move node name checks to a proper data struct with all information
for the supported subnodes.
Replace the key offset defines with the Linux driver ones.
Signed-off-by: Neil Armstrong
---
drivers/button/button-qcom-pmic.c | 84 ++-
1 file changed, 56
Finally add the entries for the qcom,pmk8350-pwrkey and qcom,pmk8350-resin
found on PMICs used with SM8350 and later SoCs.
Signed-off-by: Neil Armstrong
---
drivers/button/button-qcom-pmic.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/button/button-qcom-pmic.c
Add support for the new Qualcomm Synopsys eUSB2 PHY found in the
SM8550 and SM8650 SoCs.
Finally enable the driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
Changes in v2:
- fixed driver build failure due to missin }
- Link to v1:
https://lore.kernel.org/r/20240405-topic
Add a driver for the new Synopsys eUSB2 PHY found in the SM8550
and SM8650 SoCs.
Signed-off-by: Neil Armstrong
---
drivers/phy/qcom/Kconfig | 8 +
drivers/phy/qcom/Makefile | 1 +
drivers/phy/qcom/phy-qcom-snps-eusb2.c | 366 +
3
Enable the Qualcomm Synopsys eUSB2 PHY driver in Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 1abb57345ff..b0ae5eb4df3 100644
--- a/configs/qcom_defconfig
, 396 insertions(+)
---
change-id: 20240408-b4-qcom-rbx-soc-44ee99c8b799
base-commit: 4ba549b0a4e67c563785ab144edf47e108b34822
// Caleb (they/them)
Reviewed-by: Neil Armstrong
ot a DesignWare USB3 DRD Core\n");
ret = -ENODEV;
goto err0;
}
Reviewed-by: Neil Armstrong
Tested-by: Neil Armstrong # on SM8550
On 11/04/2024 15:59, Sumit Garg wrote:
On Tue, 9 Apr 2024 at 23:33, Caleb Connolly wrote:
The V4 and V5 controllers have quite varied register layouts. Inherit
the register offsets and naming from the Linux driver. More version
specific offsets can be inherited from Linux as needed.
Fixes: 36
riv, pin_selector));
+ setbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
+TLMM_GPIO_OE_MASK);
+ break;
default:
return 0;
}
Reviewed-by: Neil Armstrong
orted from Linux.
Only FIFO mode is implemented, nor SE DMA nor GPI DMA is implemented.
Finally enable the driver in the default Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (2):
i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller
configs: qcom
orted from Linux.
Only FIFO mode is implemented, nor SE DMA nor GPI DMA is implemented.
Signed-off-by: Neil Armstrong
---
drivers/i2c/Kconfig| 10 +
drivers/i2c/Makefile | 1 +
drivers/i2c/geni_i2c.c | 576 +
include/soc/qcom/geni-
Enable the GENI I2C driver in the default Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 1abb57345ff..8d440b23625 100644
--- a/configs/qcom_defconfig
+++ b
+-
configs/qcom_defconfig| 2 +-
5 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c0d2b5138fca..d0a4a28b401d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -605,12 +605,8 @@ M: Neil Armstrong
R:Sumit Garg
L:u-boot-q
-
arch/arm/dts/sdm845.dtsi| 5752 ---
18 files changed, 19183 deletions(-)
Reviewed-by: Neil Armstrong
TTON_CMD=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTSTD_FULL=y
Reviewed-by: Neil Armstrong
-bindings/usb/pd.h | 88 ---
13 files changed, 1193 deletions(-)
Reviewed-by: Neil Armstrong
CONFIG_OF_UPSTREAM_BUILD_VENDOR),y)
+ifeq ($(CONFIG_ARM64),y)
+dt_dir := $(srctree)/dts/upstream/src/arm64
+else
+dt_dir := $(srctree)/dts/upstream/src/$(ARCH)
+endif
+
+dtb-vendor_dts := $(patsubst %.dts,%.dtb,$(wildcard $(dt_dir)/$(subst
",,$(CONFIG_OF_UPSTREAM_VENDOR))/*.dts))
+
+dtb-y += $(
On 19/04/2024 13:47, Caleb Connolly wrote:
Hi Neil,
On 18/04/2024 23:47, Neil Armstrong wrote:
Add Support for the Qualcomm Generic Interface (GENI) I2C interface
found on newer Qualcomm SoCs.
\o/
The Generic Interface (GENI) is a firmware based Qualcomm Universal
Peripherals (QUP) Serial
orted from Linux.
Only FIFO mode is implemented, neither SE DMA nor GPI DMA are implemented.
Finally enable the driver in the default Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Fixed commit msg, removed useless debug, switched to dev_err() in probe
- Fixed some possi
Enable the GENI I2C driver in the default Qualcomm defconfig.
Reviewed-by: Caleb Connolly
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 1abb57345ff..8d440b23625 100644
--- a
orted from Linux.
Only FIFO mode is implemented, neither SE DMA nor GPI DMA are implemented.
Signed-off-by: Neil Armstrong
---
drivers/i2c/Kconfig| 10 +
drivers/i2c/Makefile | 1 +
drivers/i2c/geni_i2c.c | 575 +
include/soc/qcom
Hi,
On 25/04/2024 19:50, Arseniy Krasnov wrote:
nfc: Synced from Linux commit 7ca2ef33179f ("Linux 6.6-rc1")
nand_all_pins: Synced from Linux commit be18d53c32b2 ("Linux 6.7-rc3")
No need to sync DT anymore, this is handled by OF_UPSTREAM and for next release
it's already aligned with v6.9 DT.
On 26/04/2024 10:40, Arseniy Krasnov wrote:
Hi,
On 26.04.2024 11:21, Neil Armstrong wrote:
Hi,
On 25/04/2024 19:50, Arseniy Krasnov wrote:
nfc: Synced from Linux commit 7ca2ef33179f ("Linux 6.6-rc1")
nand_all_pins: Synced from Linux commit be18d53c32b2 ("Linux 6.7-rc3")
)
- stop printing board model twice after sysinfo update
Neil Armstrong (1):
ARM: meson: stop printing board model after sysinfo update
arch/arm/mach-meson/board-info.c | 10 --
1 file changed, 10 deletions(-)
base-commit: 076529725f16f07a5cb2d5feba25d62b5f5a5872
change-id: 20240209-vim3-avb-malloc-aa3de534d6a0
Best regards,
Reviewed-by: Neil Armstrong
n",
+ debug("Unknown button node '%s' should be 'pwrkey' or
'resin'\n",
ofnode_get_name(node));
device_unbind(dev);
}
Reviewed-by: Neil Armstrong
nable(struct clk *clk)
clk_rcg_set_rate(priv->base, &blsp1_qup4_i2c_apps_regs, 0,
CFG_CLK_SRC_CXO);
break;
+ case GCC_SDCC1_AHB_CLK:
+ clk_enable_cbc(priv->base + SDCC_AHB_CBCR(1));
+ break;
default:
return 0;
}
Reviewed-by: Neil Armstrong
readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY))
+ ;
+
+ writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR);
+
+ writel(1, priv->base + UARTDM_NCF_TX);
+ writel(ch, priv->base + UARTDM_TF);
+}
+
+DEBUG_UART_FUNCS
+
+#endif
Reviewed-by: Neil Armstrong
_rate);
if (ret < 0)
@@ -218,7 +203,6 @@ static int msm_serial_probe(struct udevice *dev)
if (ret)
return ret;
- pinctrl_select_state(dev, "uart");
uart_dm_init(priv);
return 0;
@@ -251,6 +235,7 @@ U_BOOT_DRIVER(serial_msm) = {
.priv_auto = sizeof(struct msm_serial_data),
.probe = msm_serial_probe,
.ops= &msm_serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
};
#ifdef CONFIG_DEBUG_UART_MSM
Reviewed-by: Neil Armstrong
es = <&spmi_gpios 0 0 4>;
#gpio-cells = <2>;
- gpio-bank-name="spmi";
};
};
};
Reviewed-by: Neil Armstrong
bind = msm_pinctrl_bind,
+ .flags = DM_FLAG_PRE_RELOC,
};
Reviewed-by: Neil Armstrong
sure we don't indadvertently treat all pins as special pins. */
+ if (!data->pin_data.special_pins_start)
+ data->pin_data.special_pins_start = data->pin_data.pin_count;
+
drv = lists_driver_lookup_name("pinctrl_qcom");
if (!drv)
return -ENOENT;
Reviewed-by: Neil Armstrong
* these pins.
+*/
};
static const char *qcs404_get_function_name(struct udevice *dev,
@@ -49,7 +87,7 @@ static const char *qcs404_get_pin_name(struct udevice *dev,
unsigned int selector)
{
if (selector < 120) {
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
return pin_name;
} else {
return msm_pinctrl_pins[selector - 120];
@@ -62,7 +100,7 @@ static unsigned int qcs404_get_function_mux(unsigned int
selector)
}
static struct msm_pinctrl_data qcs404_data = {
- .pin_data = { .pin_count = 126, },
+ .pin_data = { .pin_count = 126, .pin_offsets = qcs404_pin_offsets,
.special_pins_start = 120, },
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = qcs404_get_function_name,
.get_function_mux = qcs404_get_function_mux,
Reviewed-by: Neil Armstrong
agonboard410c.c
b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 0136cc2237de..fbbfc0e65e24 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -88,7 +88,7 @@ int misc_init_r(void)
return 0;
}
-int board_late_init(void)
+int qcom_late_init(void)
{
char serial[16];
Reviewed-by: Neil Armstrong
://developer.qualcomm.com/qfile/35259/lm80-p0436-100_d_snapdragon_410e_apq8016e_tech_reference_manual_revd.pdf
+
Installation
First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for
``dragonboard410c``::
Reviewed-by: Neil Armstrong
pins_count,
+ .get_pin_name = qcom_pmic_pinctrl_get_pin_name,
+ .set_state = pinctrl_generic_set_state,
+ .pinconf_num_params = ARRAY_SIZE(qcom_pmic_pinctrl_conf_params),
+ .pinconf_params = qcom_pmic_pinctrl_conf_params,
+ .pinconf_set = qcom_pmic_pinctrl_pinconf_set,
+ .get_function_name = qcom_pmic_pinctrl_get_function_name,
+ .get_functions_count = qcom_pmic_pinctrl_generic_get_functions_count,
+ .pinmux_set = qcom_pmic_pinctrl_generic_pinmux_set_mux,
+};
+
+U_BOOT_DRIVER(qcom_pmic_pinctrl) = {
+ .name = "qcom_pmic_pinctrl",
+ .id = UCLASS_PINCTRL,
+ .ops= &qcom_pmic_pinctrl_ops,
+};
Reviewed-by: Neil Armstrong
On 20/02/2024 06:56, Sumit Garg wrote:
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
Some platforms hard reset when attempting to configure PMIC GPIOs. Add
support for quirks specified in match data with a single quirk to skip
this configuration. We rely on the GPIO already be configured
Hi,
On Fri, 09 Feb 2024 09:58:35 +0100, Mattijs Korpershoek wrote:
> When booting Android with AVB enabled, an OOM is observed:
>
> => avb init ${mmcdev}
> => avb verify _a
> ## Android Verified Boot 2.0 version 1.1.0
> read_is_device_unlocked not supported yet
> read_rollback_index not
From: Neil Armstrong
Please pull this simple config fixes for the Khadas VIM3 Android
setup to fix an Out Of Memory error for AVB.
Thanks,
Neil
The following changes since commit 5e4a0c7f4a2c9d4670b75a6a2056243b1a56512b:
Merge branch 'qcom-fixes-2024.04' of
https://gitlab.denx
/MAINTAINERS | 2 +-
doc/board/amlogic/jethub-j100.rst | 9 ++---
include/configs/jethub.h | 2 +-
3 files changed, 8 insertions(+), 5 deletions(-)
base-commit: d49fa3defa50c6d3f04acbb52fd486c13c14ab6a
Reviewed-by: Neil Armstrong
On 01/03/2024 14:30, Sumit Garg wrote:
On Fri, 1 Mar 2024 at 18:27, Tom Rini wrote:
On Thu, 22 Feb 2024 15:05:56 +0530, Sumit Garg wrote:
Changes in v6:
--
- v6_dt: https://github.com/b49020/u-boot/tree/v6_dt
- Patch #3: Incorporate fix for sandbox CI failure.
- Patch #6: Incorpo
o channel %u instead of %u\n",
> fifo_chan, channel);
> return -EINVAL;
> }
> --
> 2.29.2
>
Acked-by: Neil Armstrong
On 18/12/2020 15:26, Marek Szyprowski wrote:
> Detect eMMC or SD card boot on Odroid-C4/N2 and Khadas VIM3(l) boards and
> report proper MMC device for the environment loading code. This allows to
> automatically load and store environment variables on the FAT partition
> or RAW offset of the MMC d
"configure" PHY op is added to
permit dynamic (re)configuration of the PHY function.
Finally, the Linux MIPI D-PHY configuration helpers are imported to provide a
standard
set of default D-PHY timings, timings struct and correct calculations.
Neil Armstrong (4):
phy: dphy: Add con
commit 9123e3a74ec7 ("Linux
5.9-rc1").
Signed-off-by: Neil Armstrong
---
drivers/phy/Kconfig | 5 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-core-mipi-dphy.c | 161 ++
include/phy-mipi-dphy.h | 284 ++
Add the PHY configure op callback to the generic PHY uclass to permit
configuring the PHY.
It's useful for MIPI DSI PHYs to setup the link timings.
Signed-off-by:Neil Armstrong
Signed-off-by: Neil Armstrong
---
drivers/phy/phy-uclass.c | 11 +++
include/generic-phy.h
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission
and Analog part of the PCIe lines.
Signed-off-by: Neil Armstrong
---
drivers/phy/Kconfig | 9 +
drivers/phy/Makefile
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI
panels.
This D-PHY depends on a separate analog PHY.
Signed-off-by:Neil Armstrong
Signed-off-by: Neil Armstrong
---
drivers/phy/Kconfig | 9 +
drivers/phy/Makefile | 1 +
drivers/phy/meson
usage of a new variable called fdtoverlay_addr_r used to load
the overlay files without overwritting anything important.
Cc: Tom Rini
Cc: Andre Heider
Cc: Jernej Škrabec
Cc: Jonas Karlman
Signed-off-by: Neil Armstrong
---
Hi Tom,
This is repost of my last year's attempt.
It fills a hole to a
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