Yes, this patch allows to reduce code size and make it easier to read.
To further integrate the code for LPDDR4, will need to change two lines
instead of adding 24 lines.
Reviewed-by: Mikhail Kalashnikov
On 14.10.2023 20:02, Andre Przywara wrote:
The original H616 DDR3 ODT configuration
/20230729111331.173768-2-iunc...@gmail.com/
Signed-off-by: Mikhail Kalashnikov
iuncuim (1):
sunxi: H616: add LPDDR4 DRAM support
.../include/asm/arch-sunxi/dram_sun50i_h616.h | 2 +
arch/arm/mach-sunxi/Kconfig | 16 ++
arch/arm/mach-sunxi/dram_sun50i_h616.c| 176
d new orangepi
zero3 with H618.
The compatibility with T507 is not yet complete, because there
is difference in the phy_init array.
The LPDDR4-2133 timings correspond to DRAM Rayson RS1G32LO4D2BDS-53BT
found on the Orangepi Zero 3 4GB.
Signed-off-by: Mikhail Kalashnikov
---
.../include/asm/arch-
://lore.kernel.org/u-boot/20230729111331.173768-2-iunc...@gmail.com/
Signed-off-by: Mikhail Kalashnikov
iuncuim (1):
sunxi: H616: add LPDDR4 DRAM support
.../include/asm/arch-sunxi/dram_sun50i_h616.h | 2 +
arch/arm/mach-sunxi/Kconfig | 17 ++
arch/arm/mach-sunxi/dram_sun50i_h616.c
d new orangepi
zero3 with H618.
The compatibility with T507 is not yet complete, because there
is difference in the phy_init array.
The LPDDR4-2133 timings correspond to DRAM Rayson RS1G32LO4D2BDS-53BT
found on the NOR SPI from the Orangepi Zero 3 4GB.
Signed-off-by: Mikhail Kalashnikov
---
.../includ
From: iuncuim
At the moment, the driver only supports DDR3 and LPDDR3 memory.
Add support for a new type DRAM.
Signed-off-by: Mikhail Kalashnikov
iuncuim (1):
dram: h616: add LPDDR4 DRAM support
.../include/asm/arch-sunxi/dram_sun50i_h616.h | 1 +
arch/arm/mach-sunxi/Kconfig
quot;magic"
values obtained from the boot0.
These changes have been successfully tested by me with MYiR MYB-YT507
(1GB ARTMEM ATL4B08323M62) and 9tripod X507BV4 (2GB FORESEE NCLDXC2MG512M32).
Signed-off-by: Mikhail Kalashnikov
---
.../include/asm/arch-sunxi/dram_sun50i_h616.h | 1 +
arch
Hi Jernej,
On 04.11.2023 11:31, Jernej Škrabec wrote:
Hi Mikhail,
I have some notes on LPDDR4 from a long time ago. It mostly matches to your
code, but please take a look at comments below.
Note that I have extra code, not included in this patch, for
mctl_phy_read_training(). At the very begin
-iunc...@gmail.com/
Signed-off-by: Mikhail Kalashnikov
iuncuim (1):
sunxi: H616: add LPDDR4 support
.../include/asm/arch-sunxi/dram_sun50i_h616.h | 2 +
arch/arm/mach-sunxi/Kconfig | 17 ++
arch/arm/mach-sunxi/dram_sun50i_h616.c| 218 ++
arch/arm/mach
d new orangepi
zero3 with H618.
The compatibility with T507 is not yet complete, because there
is difference in the phy_init array.
The LPDDR4-2133 timings correspond to DRAM Rayson RS1G32LO4D2BDS-53BT
found on the NOR SPI from the Orangepi Zero 3 4GB.
Signed-off-by: Mikhail Kalashnikov
---
.../includ
On 24.11.2023 03:11, Andre Przywara wrote:
On Thu, 23 Nov 2023 11:12:25 -0800
Stephen Graf wrote:
Hi Stephen,
Thank you for your reply.
Thanks for coming back. Please keep the list(s) on CC:, as this is also
interesting for others, and more eyes help to find issues faster.
CC:ing Piotr and
probe
SF: Detected zb25vq128 with page size 256 Bytes, erase size 4 KiB, total
16 MiB
Loading the kernel and running the operating system (from microsd) also
without problems.
Tested-by: Mikhail Kalashnikov
On 14.11.2023 04:31, Andre Przywara wrote:
The OrangePi Zero 3 is a small developm
On 26.11.2023 03:23, Andre Przywara wrote:
Hi Andre,
On Sat, 25 Nov 2023 20:43:12 +0300
Mikhail Kalashnikov wrote:
Hi Mikhail,
Hi Andre!
Thanks for your patches. I started checking and noticed that USB storage
was not working:
=> usb reset
resetting USB...
Bus usb@520: USB EHCI 1.00
From: iuncuim
At the moment, the driver only supports DDR3 memory.
Add support for a new type DRAM.
These changes have been successfully tested by me
with tvbox tra###eed t98-h2b-lp3.
iuncuim (2):
sunxi: H616: add DRAM type selection
sunxi: H616: add LPDDR3 DRAM support
.../include/asm/a
From: iuncuim
Allwinner H616 SoC supports several types of DRAM memory. To further
integrate other types of memory, we need to add this delimitation.
---
arch/arm/mach-sunxi/Kconfig | 12 ++--
arch/arm/mach-sunxi/dram_timings/Makefile | 3 +--
configs/orangepi_zero2_defcon
From: iuncuim
The H616 SoC has support for several types of DRAM: DDR3, LPDDR3,
DDR4 and LPDDR4.
At the moment, the driver only supports DDR3 memory.
Let's extend the driver to support the LPDDR3 memory. All "magic"
values obtained from the boot0.
---
.../include/asm/arch-sunxi/dram_sun50i_h616.
On 02.08.2024 01:55, Chris Morgan wrote:
From: Jernej Skrabec
Adjust H616 LPDDR4 DRAM settings to be in line with vendor driver.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c| 35 +--
.../dram_timings/h616_lpddr4
On 02.08.2024 01:55, Chris Morgan wrote:
From: Jernej Skrabec
Adjust H616 LPDDR3 DRAM settings to be in line with vendor driver.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c | 2 +-
arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c
On 02.08.2024 01:55, Chris Morgan wrote:
From: Chris Morgan
The Anbernic RG35XX series of devices are based around an Allwinner
H700 SoC with 1GB of RAM, 2 SD cards, and multiple input buttons.
This bootloader has been tested on the Anbernic RG35XX-2024 and
RG35XX-H, but should be suitable f
On 16.08.2024 4:03 AM, Chris Morgan wrote:
On Wed, Aug 14, 2024 at 04:06:23PM -0500, Chris Morgan wrote:
On Sat, Aug 03, 2024 at 03:29:17PM +0300, Mikhail Kalashnikov wrote:
On 02.08.2024 01:55, Chris Morgan wrote:
From: Jernej Skrabec
Adjust H616 LPDDR4 DRAM settings to be in line with
Signed-off-by: Mikhail Kalashnikov
On 7/18/25 7:54 AM, Andre Przywara wrote:
From: Mikhail Kalashnikov
Add reverse engineered code to add support for DDR3 DRAM chips on the
Allwinner A523 DRAM controller.
---
arch/arm/mach-sunxi/Kconfig | 8 ++
arch/arm/mach-sunxi
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