chips with CS2 and 3 are connected to WAIT1.
Signed-off-by: Michal Sojka
Cc: Tom Rini
Cc: Stefan Roese
---
drivers/mtd/nand/omap_gpmc.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 459904d
Hi Stefan,
On Wed, Feb 11 2015, Stefan Roese wrote:
> On 10.02.2015 14:21, Michal Sojka wrote:
>> Commit fb384c4720ca7496775d6578f184bf628db73456 introduced the use of
>> WAIT0 pin for determining whether the NAND is ready or not. This only
>> works if all NAND chips are c
From: Michal Sojka
When running the following command
mkimage -f auto -A arm -O linux -T kernel -C none -a 0x8000 -e 0x8000 \
-d zImage -b zynq-microzed.dtb -i initramfs.cpio image.ub
the type of fdt subimage is the same as of the main kernel image and
the architecture of the
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