[U-Boot] Multi boot selection scenarios

2016-10-20 Thread Marcel Gielen [Celestia-STS]
I am looking into some multi boot options and I wonder what the most common ways are of selecting boot configurations. Suppose I have 2 Linux boot images consisting of kernel, device tree and root fs. What are the most common ways to set img2 as next active boot image from img1 ? - C

[U-Boot] Altera CycloneV socfpga development kit QSPI flash access from u-boot

2016-10-20 Thread Marcel Gielen [Celestia-STS]
I am trying to use the QSPI flash from uboot on the development kit. The flash content starts at offset 0 with 0xdeadbeaf * Reading in linux from the MTD partition => data ok * Using u-boot from the SDK GSRD image (u-boot 2013.01.01) => data ok * Using u-boot socfpga 2016-05 from Alter

[U-Boot] SDCRARD boot on Intel Arria10 SOCDK

2019-02-27 Thread Marcel Gielen [Celestia-STS]
We are trying to setup the Arria10 SOCDK (DK-SOC-10AS066S-A) to boot form SDCARD in RAW mode. We are under the impression this has never been used before. Kconfig sets SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x200 for ARCH_SOCFPGA, which is correct for the Cyclone-V, but not anymore for Arria-10

Status of Intel (Altera) Arria-10 support

2022-03-03 Thread Marcel Gielen [Celestia-STS]
It has been a while ago when I had to do something with an intel Arria-10. At that time the support was a bit troublesome. Some of the issues faced: U-Boot 2nd stage requires SDRAM to run. The ARRIA-10 DDR controller for the HPS requires at least the peripheral part of the FPGA to be configured

u-boot v2022.01 and Arria-10 socdk not booting

2022-03-16 Thread Marcel Gielen [Celestia-STS]
I am working on an Enclustra mercury board and had some issues with booting, which stopped after (successful) FPGA configuration. (Console: FPGA: Enter user mode is the last line printed) Since we also have an Arria10 socdk available, I decided to try that one. For the sockdk I have a working