Re: [PATCH 1/2] ram: ast2600: Keep MPLL power on

On Tue, 21 Feb 2023 at 13:01, Dylan Hung wrote: > > According to the PLL vendor, we should keep the PLL power on, so we > shouldn't toggle the power-down bit during PLL initialization. > > Signed-off-by: Dylan Hung Reviewed-by: Joel Stanley > --- > drivers/ram/

Re: [PATCH 2/2] clk: ast2600: Keep PLL power on

On Tue, 21 Feb 2023 at 13:01, Dylan Hung wrote: > > According to the PLL vendor, we should keep the PLL power on, so we > shouldn't toggle the power-down bit during PLL initialization. > > Signed-off-by: Dylan Hung Reviewed-by: Joel Stanley > --- > drivers/cl

Re: [PATCH v5 0/6] tpm: Support boot measurements

On Thu, 2 Feb 2023 at 17:08, Eddie James wrote: > > This series adds support for measuring the boot images more generically > than the existing EFI support. Several EFI functions have been moved to > the TPM layer. The series includes optional measurement from the bootm > command. > A new test cas

Re: [PATCH v4 0/4] net: Enable NC-SI support

On Tue, 23 Aug 2022 at 04:54, Joel Stanley wrote: > > On Mon, 8 Aug 2022 at 12:16, Joel Stanley wrote: > > > > Back in 2019 Sam submitted NC-SI support. The NC-SI PHY driver was > > merged (patches 1 and 2), but we never got around to merging patches 3 > > and 4: &g

Re: [PATCH] liteeth: LiteX Ethernet device

On Sun, 18 Sept 2022 at 15:50, Sean Anderson wrote: > > On 8/10/22 00:29, Joel Stanley wrote: > > LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic > > network device that is commonly used in LiteX designs. > > +static int liteeth_recv(struct udevic

bootelf unable to boot

Hello Simon, In 78398652723b ("bootm: Tidy up use of autostart env var") you rationalised the checking of autoboot in the bootelf command handling. This changed the bootelf default behaviour from "autostart by default" to "autostart only when autostart=on". The issue is with boards that have a fl

[PATCH v2] liteeth: LiteX Ethernet device

LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic network device that is commonly used in LiteX designs. Signed-off-by: Joel Stanley Reviewed-by: Ramon Fried --- v2: Fixed some return values Add asm/byteorder.h to fix building v1: https://lore.kernel.org/r

[PATCH] liteeth: LiteX Ethernet device

LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic network device that is commonly used in LiteX designs. Signed-off-by: Joel Stanley --- include/linux/litex.h | 83 drivers/net/liteeth.c | 214 ++ drivers/net/Kconfig

Re: [PATCH v4 0/4] net: Enable NC-SI support

On Mon, 8 Aug 2022 at 12:16, Joel Stanley wrote: > > Back in 2019 Sam submitted NC-SI support. The NC-SI PHY driver was > merged (patches 1 and 2), but we never got around to merging patches 3 > and 4: > > https://lore.kernel.org/u-boot/20190618013720.2823-1-...@mendozajonas.co

[PATCH] lib/rsa: Sanity check db_len

est of the function wil not work, so detect this case and return early. If this was host code we could assert, but as this is target code print an error and return. Fixes: 061daa0b61f0 ("rsa: add support of padding pss") Signed-off-by: Joel Stanley --- lib/rsa/rsa-verify.c | 5

[PATCH] image: Ensure image header name is null terminated

ot;) Signed-off-by: Joel Stanley --- include/image.h | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/image.h b/include/image.h index e4c6a50b885f..665b2278b7fb 100644 --- a/include/image.h +++ b/include/image.h @@ -776,7 +776,10 @@ image

[PATCH] gitlab-ci: Update comment about the Dockerfile

It's found in the u-boot tree now. Signed-off-by: Joel Stanley --- .gitlab-ci.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 5592862f74b8..cebd76d050b6 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -1,7 +1,7 @@ #

Re: [RFC PATCH 8/8] WIP: .azure-pipelines.yml: Remove evb-ast2600

ake a look at this and help to fix > the problems that I'm seeing with this build target here? Where does it hang? Can you attach the logs? What kind of debugging have you tried to date? Cheers, Joel > > Signed-off-by: Stefan Roese > Cc: Joel Stanley > Cc: Chia-Wei Wang >

Re: [RFC PATCH 8/8] WIP: .azure-pipelines.yml: Remove evb-ast2600

On Fri, 2 Sept 2022 at 04:09, Joel Stanley wrote: > > On Mon, 29 Aug 2022 at 06:23, Stefan Roese wrote: > > > > The evb-ast2600 target always runs into an timeout error when run via > > Azure CI. For test purpose only, this patch removes this CI build > > target

Re: [PATCH 0/3] Improvements to FIT hashing

Helli Simon, On Wed, 17 Feb 2021 at 03:20, Joel Stanley wrote: > > Here are some small changes to the FIT hashing code in order to use > more code from common/, which in turns allows hw implementations of SHA. > > This was motivated by a need to reduce the SPL size for the Aspeed

Re: [PATCH 2/3] fit: Use hash.c to call SHA code

On Wed, 17 Feb 2021 at 05:04, AKASHI Takahiro wrote: > > Simon, > > # This is not a direct comment on this patch. > > On Wed, Feb 17, 2021 at 01:50:41PM +1030, Joel Stanley wrote: > > Currently the FIT hashing will call directly into the SHA algorithms to > > get

Re: [PATCH] hash: Kconfig option for SHA512 hardware acceleration

ed-off-by: Heinrich Schuchardt > --- > This patch replaces > hash: revert Allow for SHA512 hardware implementations > https://lists.denx.de/pipermail/u-boot/2021-May/449648.html > https://patchwork.ozlabs.org/project/uboot/patch/20210512170040.137058-1-xypron.g...@gmx.de/ This loo

[PATCH] crypto: Add driver for Aspeed HACE

igned-off-by: Klaus Heinrich Kiwi Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + drivers/crypto/Kconfig| 19 +++ drivers/crypto/Makefile | 1 + drivers/crypto/aspeed_hace.c | 256 ++ 4 files changed, 277 insertions(+) c

[PATCH] Makefile: Conditionally add defaultenv_h to envtools target

| #include "generated/defaultenv_autogenerated.h" | ^~ Signed-off-by: Joel Stanley --- This is the minimal patch to fix the issue I was having building under Yocto, which explicitly builds the envtools target separate to the rest of u-boot.

[PATCH 0/3] Improvements to FIT hashing

submit. Joel Stanley (3): hw_sha: Fix coding style errors fit: Use hash.c to call SHA code hash: Allow for SHA512 hardware implementations common/hash.c | 24 ++-- common/image-fit.c | 34 -- include/hw_sha.h | 38

[PATCH 1/3] hw_sha: Fix coding style errors

Checkpatch complains about: ERROR: "foo * bar" should be "foo *bar" and CHECK: Alignment should match open parenthesis Signed-off-by: Joel Stanley --- include/hw_sha.h | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/include/hw_sha.h b/in

[PATCH 2/3] fit: Use hash.c to call SHA code

. Signed-off-by: Joel Stanley --- common/image-fit.c | 34 -- 1 file changed, 8 insertions(+), 26 deletions(-) diff --git a/common/image-fit.c b/common/image-fit.c index 28b3d2b19111..3451cdecc95b 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -1210,37

[PATCH 3/3] hash: Allow for SHA512 hardware implementations

Similar to support for SHA1 and SHA256, allow the use of hardware hashing engine by enabling the algorithm and setting CONFIG_SHA_HW_ACCEL / CONFIG_SHA_PROG_HW_ACCEL. Signed-off-by: Joel Stanley --- common/hash.c| 24 ++-- include/hw_sha.h | 26

[PATCH] image: fit: Use stack allocation macro

The documentation above the DEFINE_ALIGN_BUFFER says it's for use outside functions, but we're inside one. Instead use ALLOC_CACHE_ALIGN_BUFFER, the stack based macro, which also includes the cache alignment. Fixes: b583348ca8c8 ("image: fit: Align hash output buffers")

[PATCH 00/10] i2c: Improvements for aspeed boards

This set of patches clean up the aspeed i2c support for the ast2500 and enable the ast2600. It has been tested in qemu and on the ast2600-evb. Eddie James (1): ARM: dts: ast2600: Add I2C pinctrl Joel Stanley (9): ARM: dts: ast2600: Add I2C reset properties ARM: dts: ast2600: Dsiable I2C

[PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl

From: Eddie James Set the pinctrl groups for each I2C bus. These are essential to I2C operating correctly. Signed-off-by: Eddie James Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600.dtsi | 33 + 1 file changed, 33 insertions(+) diff --git a/arch/arm/dts

[PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties

The same as the upstream Linux device tree, each i2c bus has a property specifying the reset line. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index

[PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default

Allow boards to enable the buses they use. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index 4b23d25ede0a..a37d062bcad7 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b

[PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices

The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable those busses we can test the I2C driver. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2500-evb.dts | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts

[PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices

The EVB has an EEPROM on bus 7 and a LM75 temp sensor on bus 8. Enable those busses we can test the I2C driver. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600-evb.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600

[PATCH 06/10] reset/aspeed: Implement status callback

The I2C driver shares a reset line between buses, so allow it to test the state of the reset line before resetting it. Signed-off-by: Joel Stanley --- drivers/reset/reset-ast2500.c | 19 +++ drivers/reset/reset-ast2600.c | 17 + 2 files changed, 36 insertions

[PATCH 07/10] i2c/aspeed: Fix reset control

The reset control was written for the ast2500 and directly programs the clocking register. So we can share the code with other SoC generations use the reset device to deassert the I2C reset line. Signed-off-by: Joel Stanley --- drivers/i2c/ast_i2c.c | 22 +++--- 1 file changed

[PATCH 08/10] i2c/aspeed: Add AST2600 compatible

Signed-off-by: Joel Stanley --- drivers/i2c/ast_i2c.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index 0a93d7c82911..c9ffe2d62820 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -351,6 +351,7 @@ static const struct

[PATCH 09/10] config/ast2600: Enable I2C driver

Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 160bccff48e2..8f34546235a4 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -61,6

[PATCH 10/10] config/aspeed: Enable EEPROM options

To allow testing of the I2C driver, enable the eprom command and the misc driver. Signed-off-by: Joel Stanley --- configs/evb-ast2500_defconfig | 3 +++ configs/evb-ast2600_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configs/evb-ast2500_defconfig b/configs/evb

Re: [PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices

On Tue, 21 Jun 2022 at 05:38, Ryan Chen wrote: > > > -Original Message- > > From: joel.s...@gmail.com On Behalf Of Joel Stanley > > Sent: Monday, June 20, 2022 3:25 PM > > To: Ryan Chen ; BMC-SW > > ; Heiko Schocher > > Cc: u-boot@lists.denx.de; C

[PATCH v2 00/11] i2c: Improvements for aspeed boards

James (1): ARM: dts: ast2600: Add I2C pinctrl Joel Stanley (10): ARM: dts: ast2600: Add I2C reset properties ARM: dts: ast2600: Disable I2C nodes by default ARM: dts: ast2600-evb: Remove redundant pinctrl ARM: dts: ast2500-evb: Add I2C devices ARM: dts: ast2600-evb: Add I2C devices

[PATCH v2 01/11] ARM: dts: ast2600: Add I2C pinctrl

From: Eddie James Set the pinctrl groups for each I2C bus. These are essential to I2C operating correctly. Signed-off-by: Eddie James Reviewed-by: Ryan Chen Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600.dtsi | 33 + 1 file changed, 33 insertions

[PATCH v2 03/11] ARM: dts: ast2600: Disable I2C nodes by default

Allow boards to enable the buses they use. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- v2: Fix spelling --- arch/arm/dts/ast2600.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index 4b23d25ede0a..a37d062bcad7

[PATCH v2 02/11] ARM: dts: ast2600: Add I2C reset properties

The same as the upstream Linux device tree, each i2c bus has a property specifying the reset line. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- arch/arm/dts/ast2600.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts

[PATCH v2 05/11] ARM: dts: ast2500-evb: Add I2C devices

The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable those busses we can test the I2C driver. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- arch/arm/dts/ast2500-evb.dts | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/dts/ast2500

[PATCH v2 04/11] ARM: dts: ast2600-evb: Remove redundant pinctrl

Now that these are in the dtsi we don't need them in the EVB device tree. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600-evb.dts | 15 --- 1 file changed, 15 deletions(-) diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index 0d650543134a..806b760

[PATCH v2 06/11] ARM: dts: ast2600-evb: Add I2C devices

The EVB has an EEPROM and ADT8490 temp sensor/fan controller on bus 7, and a LM75 temp sensor on bus 8. Signed-off-by: Joel Stanley --- v2: Place devices under correct bus --- arch/arm/dts/ast2600-evb.dts | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm/dts/ast2600

[PATCH v2 07/11] reset/aspeed: Implement status callback

The I2C driver shares a reset line between buses, so allow it to test the state of the reset line before resetting it. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- drivers/reset/reset-ast2500.c | 19 +++ drivers/reset/reset-ast2600.c | 17 + 2 files

[PATCH v2 08/11] i2c/aspeed: Fix reset control

The reset control was written for the ast2500 and directly programs the clocking register. So we can share the code with other SoC generations use the reset device to deassert the I2C reset line. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- drivers/i2c/ast_i2c.c | 22

[PATCH v2 09/11] i2c/aspeed: Add AST2600 compatible

Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- drivers/i2c/ast_i2c.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index 0a93d7c82911..c9ffe2d62820 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -351,6 +351,7

[PATCH v2 10/11] config/ast2600: Enable I2C driver

Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index f84b723bbba3..5c298939da6d 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -62,6

[PATCH v2 11/11] config/aspeed: Enable EEPROM options

To allow testing of the I2C driver, enable the eprom command and the misc driver. Signed-off-by: Joel Stanley --- configs/evb-ast2500_defconfig | 3 +++ configs/evb-ast2600_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configs/evb-ast2500_defconfig b/configs/evb

[PATCH 0/9] mmc: Aspeed fixes

These changes get the SDHCI hardware on the AST2600 and AST2500 working using the same device tree layout as upstream Linux. The series has been tested on the Qemu models of the ast2500-evb and ast2600-evb, and tested on the ast2600a3-evb hardware. Joel Stanley (9): ARM: dts: ast2600: Update

[PATCH 1/9] ARM: dts: ast2600: Update SDHCI nodes

Match the description used by the Linux kernel, except use scu instead of syscon as the phandle. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600-evb.dts | 24 +++ arch/arm/dts/ast2600.dtsi| 57 +++- 2 files changed, 35 insertions(+), 46

[PATCH RESEND 0/9] mmc: Fixes for Aspeed boards

To list that broke sending the first attempt) Joel Stanley (9): ARM: dts: ast2600: Update SDHCI nodes ARM: dts: ast2500: Update SDHCI nodes clk/aspeed: Add debug message when clock fails clk/ast2600: Adjust eMMC clock names clk/ast2500: Add SD clock mmc/aspeed: Add debuging for clock

[PATCH RESEND 1/9] ARM: dts: ast2600: Update SDHCI nodes

Match the description used by the Linux kernel, except use scu instead of syscon as the phandle. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600-evb.dts | 24 +++ arch/arm/dts/ast2600.dtsi| 57 +++- 2 files changed, 35 insertions(+), 46

[PATCH RESEND 2/9] ARM: dts: ast2500: Update SDHCI nodes

Match the description used by the Linux kernel, except use scu instead of syscon as the phandle. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2500-evb.dts | 4 arch/arm/dts/ast2500-u-boot.dtsi | 25 - arch/arm/dts/ast2500.dtsi| 28

[PATCH RESEND 3/9] clk/aspeed: Add debug message when clock fails

A common message across platforms that prints the clock number. Signed-off-by: Joel Stanley --- drivers/clk/aspeed/clk_ast2500.c | 3 +++ drivers/clk/aspeed/clk_ast2600.c | 4 ++-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk

[PATCH RESEND 4/9] clk/ast2600: Adjust eMMC clock names

Adjust clock to stay compatible with those used by the Linux kernel device tree. Signed-off-by: Joel Stanley --- drivers/clk/aspeed/clk_ast2600.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index

[PATCH RESEND 5/9] clk/ast2500: Add SD clock

In order to use the clock from the sdhci driver, add the SD clock. Signed-off-by: Joel Stanley --- drivers/clk/aspeed/clk_ast2500.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index dcf299548de1

[PATCH RESEND 6/9] mmc/aspeed: Add debuging for clock probe failures

Signed-off-by: Joel Stanley --- drivers/mmc/aspeed_sdhci.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/aspeed_sdhci.c b/drivers/mmc/aspeed_sdhci.c index 453731571987..c71daae97584 100644 --- a/drivers/mmc/aspeed_sdhci.c +++ b/drivers/mmc

[PATCH RESEND 7/9] mmc/aspeed: Probe from controller

er solution is preferred. Select MISC as the controller driver is implemented as a misc device. Signed-off-by: Joel Stanley --- drivers/mmc/aspeed_sdhci.c | 21 + drivers/mmc/Kconfig| 1 + 2 files changed, 22 insertions(+) diff --git a/drivers/mmc/aspeed_sdhci.c b/dr

[PATCH RESEND 8/9] mmc/aspeed: Enable controller clocks

Request and enable the controller level clocks. Signed-off-by: Joel Stanley --- drivers/mmc/aspeed_sdhci.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/drivers/mmc/aspeed_sdhci.c b/drivers/mmc/aspeed_sdhci.c index 5591fa2b0891..9d79bf58cc70 100644 --- a/drivers/mmc

[PATCH RESEND 9/9] config/ast2600: Enable eMMC related boot options

Allow booting zImage from ext4 devices with DOS or UEFI partition layouts. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 13 + 1 file changed, 13 insertions(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 160bccff48e2

[u-boot-test-hooks PATCH 0/2] Aspeed updates

Hi Tom, This updates the configuration for the aspeed machines, adding support for the ast2600. Joel Stanley (2): ast2500: Simplify Qemu command line travis-ci: Add Aspeed AST2600 Qemu configuration bin/travis-ci/conf.evb-ast2500_qemu | 2 +- bin/travis-ci/conf.evb

[u-boot-test-hooks PATCH 1/2] ast2500: Simplify Qemu command line

The Aspeed machine in Qemu has appropriate defaults so we don't need to specify these options. Signed-off-by: Joel Stanley --- bin/travis-ci/conf.evb-ast2500_qemu | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/travis-ci/conf.evb-ast2500_qemu b/bin/travis-ci/con

[u-boot-test-hooks PATCH 2/2] travis-ci: Add Aspeed AST2600 Qemu configuration

Similar to the AST2500 this machine is emulated by Qemu. It boots from a 64MB SPI NOR flash device by default. Signed-off-by: Joel Stanley --- bin/travis-ci/conf.evb-ast2600_qemu | 13 + py/travis-ci/u_boot_boardenv_evb-ast2600_qemu.py | 4 2 files changed, 17

[PATCH 0/5] aspeed: Add to CI

assed. Joel Stanley (5): config/ast2600: Enable CRC32 config/ast2600: Make position independent config/ast2600: Disable hash hardware accel ast2600: Configure u-boot-with-spl.bin target CI: Add Aspeed AST2600 include/configs/evb_ast2600.h | 3 +++ .azure-pipelines.yml | 3 +++ .g

[PATCH 1/5] config/ast2600: Enable CRC32

Useful for testing images with the default hash type. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index f84b723bbba3..53ba36a28374 100644 --- a/configs/evb

[PATCH 2/5] config/ast2600: Make position independent

Allows loading one u-boot from another. Useful for testing on hardware. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 53ba36a28374..f3a6cb222020 100644 --- a

[PATCH 3/5] config/ast2600: Disable hash hardware accel

The Qemu model or the u-boot driver is unable to correctly compute the SHA256 hash used in a FIT. Disable it by default while that issue is worked out to enable boot testing in Qemu. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 3 --- 1 file changed, 3 deletions(-) diff

[PATCH 4/5] ast2600: Configure u-boot-with-spl.bin target

: make u-boot-with-spl.bin truncate -s 64M u-boot-with-spl.bin qemu-system-arm -nographic -M ast2600-evb \ -drive file=u-boot-with-spl.bin,if=mtd,format=raw Signed-off-by: Joel Stanley --- include/configs/evb_ast2600.h | 3 +++ configs/evb-ast2600_defconfig | 2 ++ 2 files changed, 5

[PATCH 5/5] CI: Add Aspeed AST2600

The AST2600 has a Qemu model that allows testing. Create a SPI NOR image containing the combined SPL and u-boot FIT image. Signed-off-by: Joel Stanley --- .azure-pipelines.yml | 3 +++ .gitlab-ci.yml | 6 ++ 2 files changed, 9 insertions(+) diff --git a/.azure-pipelines.yml b/.azure

Re: [PATCH 3/5] config/ast2600: Disable hash hardware accel

gt; From: joel.s...@gmail.com On Behalf Of Joel Stanley > >> Sent: Friday, June 24, 2022 10:50 AM > >> > >> The Qemu model or the u-boot driver is unable to correctly compute the > >> SHA256 hash used in a FIT. Disable it by default while that issue is > >>

[PATCH RESEND 0/5] aspeed: Add AST2600 machine to CI

assed. Joel Stanley (5): config/ast2600: Enable CRC32 config/ast2600: Make position independent config/ast2600: Disable hash hardware accel ast2600: Configure u-boot-with-spl.bin target CI: Add Aspeed AST2600 include/configs/evb_ast2600.h | 3 +++ .azure-pipelines.yml | 3 +++ .g

[PATCH RESEND 2/5] config/ast2600: Make position independent

Allows loading one u-boot from another. Useful for testing on hardware. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 53ba36a28374..f3a6cb222020 100644 --- a

[PATCH RESEND 4/5] ast2600: Configure u-boot-with-spl.bin target

: make u-boot-with-spl.bin truncate -s 64M u-boot-with-spl.bin qemu-system-arm -nographic -M ast2600-evb \ -drive file=u-boot-with-spl.bin,if=mtd,format=raw Signed-off-by: Joel Stanley --- include/configs/evb_ast2600.h | 3 +++ configs/evb-ast2600_defconfig | 2 ++ 2 files changed, 5

[PATCH RESEND 5/5] CI: Add Aspeed AST2600

The AST2600 has a Qemu model that allows testing. Create a SPI NOR image containing the combined SPL and u-boot FIT image. Signed-off-by: Joel Stanley --- .azure-pipelines.yml | 3 +++ .gitlab-ci.yml | 6 ++ 2 files changed, 9 insertions(+) diff --git a/.azure-pipelines.yml b/.azure

[PATCH RESEND 3/5] config/ast2600: Disable hash hardware accel

out to enable boot testing in Qemu. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 3 --- 1 file changed, 3 deletions(-) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index f3a6cb222020..160bccff48e2 100644 --- a/configs/evb-ast2600_defconfig +++ b

[PATCH RESEND 1/5] config/ast2600: Enable CRC32

Useful for testing images with the default hash type. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index f84b723bbba3..53ba36a28374 100644 --- a/configs/evb

Re: [PATCH RESEND 3/5] config/ast2600: Disable hash hardware accel

iawei > > > > > From: joel.s...@gmail.com On Behalf Of Joel > > > Stanley > > > Sent: Monday, June 27, 2022 3:58 PM > > > > > > The HACE driver lacks support for all the hash types, causing boot to > > > fail with the default FIT

Re: [PATCH 3/5] config/ast2600: Disable hash hardware accel

wrote works; it only tests one pass, so doesn't trigger the accumulation part of the model. I was running with this patch to see the output of the hash operation: Author: Joel Stanley Date: Sat Jun 18 18:20:08 2022 +0930 fit: Print hash results on failure Signed-off-by: Joel Stanley

Re: [PATCH] configs: ast2600: Move SPL bss section to DRAM space

Hi Chai Wei, On Wed, 1 Jun 2022 at 08:21, Chia-Wei Wang wrote: > > The commit b583348ca8c8 ("image: fit: Align hash output buffers") places > the hash output buffer at the .bss section. However, AST2600 by default > executes SPL in the NOR flash XIP way. This results in the hash output > cannot b

[PATCH] aspeed/ast2600: Fix SPL linker script

ed from. Fixes: 442a69c14375 ("configs: ast2600: Move SPL bss section to DRAM space") Signed-off-by: Joel Stanley --- Note that the Aspeed script is still missing the following sections, which would be a problem if --orphan-handling=warn or similar was added to LDFLAGS in the future (or i

[PATCH v2 0/7] aspeed: Add AST2600 machine to CI

re.com/u-boot/u-boot/_build/results?buildId=4607 Joel Stanley (7): config/ast2600: Enable CRC32 config/ast2600: Make position independent config/ast2600: Disable hash hardware accel spl: Set SPL_MAX_SIZE default for AST2600 ast2600: Configure u-boot-with-spl.bin target aspeed/spl: Remo

[PATCH v2 1/7] config/ast2600: Enable CRC32

Useful for testing images with the default hash type. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index

[PATCH v2 2/7] config/ast2600: Make position independent

Allows loading one u-boot from another. Useful for testing on hardware. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb

[PATCH v2 3/7] config/ast2600: Disable hash hardware accel

out to enable boot testing in Qemu. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 3 --- 1 file changed, 3 deletions(-) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 07784fe8ac62

[PATCH v2 4/7] spl: Set SPL_MAX_SIZE default for AST2600

The AST2600 bootrom has a max size of 64KB. This can be overridden if the system is running the SPL from SPI NOR and not using secure boot. Signed-off-by: Joel Stanley --- New in v2 common/spl/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig

[PATCH v2 5/7] ast2600: Configure u-boot-with-spl.bin target

u-boot-with-spl.bin truncate -s 64M u-boot-with-spl.bin qemu-system-arm -nographic -M ast2600-evb \ -drive file=u-boot-with-spl.bin,if=mtd,format=raw Reviewed-by: Cédric Le Goater Reviewed-by: Chia-Wei Wang Signed-off-by: Joel Stanley --- v2: Removed the change to include/configs

[PATCH v2 6/7] aspeed/spl: Remove OVERLAY from linker script

8340 g O .bss 000c stdio_devices This restores the state of the linker script before the patch that fixed the linker lists issue. Fixes: f6810b749f2e ("aspeed/ast2600: Fix SPL linker script") Signed-off-by: Joel Stanley --- I missed this in testing as I also had "

[PATCH v2 7/7] CI: Add Aspeed AST2600

The AST2600 has a Qemu model that allows testing. Create a SPI NOR image containing the combined SPL and u-boot FIT image. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- .azure-pipelines.yml | 3 +++ .gitlab-ci.yml | 6 ++ 2 files changed, 9

Re: [PATCH RESEND 4/5] ast2600: Configure u-boot-with-spl.bin target

On Tue, 28 Jun 2022 at 14:19, Tom Rini wrote: > > On Mon, Jun 27, 2022 at 05:28:10PM +0930, Joel Stanley wrote: > > > For the u-boot-with-spl.bin target to be useful for the AST2600, set the > > maximum SPL size which also sets the padding length. > > > > The nor

[PATCH v3 0/3] Enable NC-SI support

has been in use in the vendor fork for some time. This refreshes his patches and enables support in the Aspeed defconfigs, giving compile coverage to the NC-SI phy. I've called the series v3 to indicate it fixes issues in v2 of Sam's series. Changelogs in each patch. Joel Stanley (1)

[PATCH v3 1/3] net: NC-SI setup and handling

ned-off-by: Joel Stanley --- v3: - Fix compilation. There were no configs that enabled the NCSI phy code so it had bitrotted - Use NCSI_PHY instead of CMD_NCSI so NCSI can work without the command - Add phy_interface_is_ncsi() helper, thanks Cédric for this suggestion - Only create NCSI phy d

[PATCH v3 2/3] net/ftgmac100: Add NC-SI mode support

setup is skipped in favour of the NC-SI phy. Signed-off-by: Samuel Mendoza-Jonas Signed-off-by: Joel Stanley --- v3: - Simplify ncsi enable by re-using pdata->phy_interface parsing. use-ncsi still overrides this value. - Fix up freeing in remove callback per Joe's review dri

[PATCH v3 3/3] config/aspeed: Enable NC-SI support

Aspeed BMCs are commonly used with NC-SI. A system indicates the driver should configure the link over NC-SI using the device tree. Add it to the defconfig so we get compile coverage of the driver, even if the EVBs do not normally use it. Signed-off-by: Joel Stanley --- configs/evb

Re: [v4 03/12] spi: aspeed: Add ASPEED SPI controller driver

Hi Chin-Ting, On Tue, 24 May 2022 at 05:58, Chin-Ting Kuo wrote: > > Add ASPEED BMC FMC/SPI memory controller driver with > spi-mem interface for AST2500 and AST2600 platform. Have you considered including 2400 support in your patch set? I have prepared a series that adds upstream support for t

Re: [PATCH v4 0/4] net: Enable NC-SI support

On Thu, 15 Sept 2022 at 01:11, Joel Stanley wrote: > > On Tue, 23 Aug 2022 at 04:54, Joel Stanley wrote: > > > > On Mon, 8 Aug 2022 at 12:16, Joel Stanley wrote: > > > > > > Back in 2019 Sam submitted NC-SI support. The NC-SI PHY driver was > > &g

Re: [PATCH 1/4] configs: evb-ast2500: Remove MMC support from default settings

On Wed, 26 Oct 2022 at 13:11, Cédric Le Goater wrote: > > This saves ~50K in the resulting u-boot.bin file which is important to > fit in the U-Boot partition defined in the flash layout of upstream Linux. The downside is we stop testing it builds for ast2500. I guess as long as it's being built

Re: [PATCH 2/4] configs: evb-ast2500: Adjust boot command

On Wed, 26 Oct 2022 at 13:11, Cédric Le Goater wrote: > > Loading a kernel image is enough. > > Signed-off-by: Cédric Le Goater Reviewed-by: Joel Stanley > --- > configs/evb-ast2500_defconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > &g

Re: [PATCH 3/4] configs: evb-ast2500: Add support for FIT format

On Wed, 26 Oct 2022 at 13:11, Cédric Le Goater wrote: > > Signed-off-by: Cédric Le Goater Reviewed-by: Joel Stanley > --- > configs/evb-ast2500_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2

Re: [PATCH 4/4] configs: evb-ast2500: Set environment in SPI flash

On Wed, 26 Oct 2022 at 13:11, Cédric Le Goater wrote: > > We now have a SPI flash driver. Let's use it. > > Signed-off-by: Cédric Le Goater Reviewed-by: Joel Stanley > --- > configs/evb-ast2500_defconfig | 5 - > 1 file changed, 4 insertions(+), 1 deletion(-) &g

Re: [PATCH 2/2] tpm: add support for TPMv2.x I2C chips

m_tis_open, > + .close = tpm_tis_close, > + .get_desc = tpm_tis_get_desc, > + .send = tpm_tis_send, > + .recv = tpm_tis_recv, > + .cleanup = tpm_tis_cleanup, > +}; > + > +static const struct tpm_tis_chip_data tpm_tis_std_chip_data = { >

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