Dne sobota, 14. oktober 2023 ob 19:02:36 CEST je Andre Przywara napisal(a):
> The original H616 DDR3 ODT configuration code wrote board specific values
> into a sequence of paired registers.
> For LPDDR3 support we needed to special-case one group of registers,
> because for that DRAM type we need
On Saturday, October 21, 2023 1:38:39 AM CEST Andre Przywara wrote:
> On Mon, 02 Oct 2023 20:59:34 +0200
> Jernej Škrabec wrote:
>
> Hi Jernej,
>
> > Dne ponedeljek, 02. oktober 2023 ob 14:42:40 CEST je Gunjan Gupta
napisal(a):
> > > > &g
On Saturday, October 21, 2023 3:10:23 AM CEST Andre Przywara wrote:
> There are quite some functions in the Allwinner H6 DRAM "driver", some
> of them actually change the parameters in the structure passed to them,
> but many are actually not.
>
> To increase the optimisation potential for the cod
On Saturday, October 21, 2023 3:10:24 AM CEST Andre Przywara wrote:
> Currently there is one DRAM parameter struct for the Allwinner H6 DRAM
> "driver". It contains many fields that are compile time constants
> (set by Kconfig variables), though there are also some fields that are
> probed and chan
On Saturday, October 21, 2023 3:10:25 AM CEST Andre Przywara wrote:
> For accessing MMIO registers, we must not rely on the compiler to
> realise every access to a struct which we made point to some MMIO base
> address. From a compiler's point of view, those writes could be
> considered pointless,
On Monday, October 16, 2023 7:34:41 AM CEST Mikhail Kalashnikov wrote:
> From: iuncuim
>
> The H616 SoC family has support for several types of DRAM: DDR3,
> LPDDR3, DDR4 and LPDDR4.
> At the moment, the driver only supports DDR3 and LPDDR3 memory.
> Let's extend the driver to support the LPDDR4
On Wednesday, October 18, 2023 5:50:12 PM CEST Andre Przywara wrote:
> So far we have a convoluted #ifdef mesh that guards the early AXP PMIC
> setup in board.c. That combination of &&, || and negations is very hard
> to read, maintain and especially to extend.
>
> Fortunately we have those same c
On Wednesday, October 18, 2023 5:50:13 PM CEST Andre Przywara wrote:
> On boards using the AXP313 PMIC, the DRAM rail is often not setup
> correctly at reset time, so we have to program the PMIC very early in
> the SPL, before running the DRAM initialisation.
>
> Add a simple AXP313 PMIC driver th
On Wednesday, October 18, 2023 5:50:14 PM CEST Andre Przywara wrote:
> The X-Powers AXP313a is a small PMIC with just three buck converters and
> three LDOs, one of which is actually fixed (so not modelled here).
>
> Add the compatible string and the respective regulator ranges to allow
> drivers
On Friday, October 20, 2023 2:26:05 AM CEST Andre Przywara wrote:
> This updates the devicetree files to match the Linux kernel repository
> as of v6.6-rc6.
> Mostly cosmetic changes, but we gain some new board files and the T113s
> board .dtsi files, which are needed for the pending U-Boot patches
Hi Mikhail,
I have some notes on LPDDR4 from a long time ago. It mostly matches to your
code, but please take a look at comments below.
Note that I have extra code, not included in this patch, for
mctl_phy_read_training(). At the very beginning, before any other register
access is done, this s
Dne sobota, 08. april 2023 ob 02:26:38 CEST je Andre Przywara napisal(a):
> From: Samuel Holland
>
> This abstracts away the CCU register layout, which is necessary for
> supporting new SoCs like H6 with a reorganized CCU. One of the resets is
> referenced from the PHY node instead of the control
Dne sobota, 08. april 2023 ob 02:26:39 CEST je Andre Przywara napisal(a):
> From: Samuel Holland
>
> The HDMI PHY depends on the HVCC supply being enabled. So far we have
> relied on it being enabled by an earlier firmware stage (SPL or TF-A).
> Attempt to enable the regulator here, so we can rem
Dne sreda, 05. april 2023 ob 16:27:30 CEST je Andre Przywara napisal(a):
> To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need
> to program the 64-bit start code address into an MMIO mapped register
> that shadows the architectural RVBAR register.
> This address is SoC specific,
Dne sreda, 05. april 2023 ob 16:27:31 CEST je Andre Przywara napisal(a):
> In the early days of the Allwinner A64 U-Boot support, we relied on a
> vendor provided "boot0" binary to perform the DRAM initialisation. This
> replaced the SPL, and required to equip the U-Boot (proper) binary with
> a ve
Dne sreda, 05. april 2023 ob 22:30:11 CEST je Andre Przywara napisal(a):
> Some SoCs of the H616 family use a die variant, that puts some CPU power
> and reset control registers at a different address. There are examples
> of two instances of the same board, using different die revisions of the
> o
Dne torek, 11. april 2023 ob 12:13:04 CEST je Andre Przywara napisal(a):
> On Mon, 10 Apr 2023 10:21:13 +0200
>
> Jernej Skrabec wrote:
> > Vendor DRAM settings use TPR10 parameter to enable various features.
> > There are many mores features that just those that are currently
> > mentioned. Sinc
Dne ponedeljek, 02. oktober 2023 ob 13:26:26 CEST je Andre Przywara napisal(a):
> On Sun, 1 Oct 2023 21:43:32 +0530
> Gunjan Gupta wrote:
>
> (fixing Jernej's email)
>
> Hi Gunjan,
>
> thanks for sending a patch!
>
> > On some H6 boards like Orange Pi 3 LTS, some times U-Boot fails to detec
Dne ponedeljek, 02. oktober 2023 ob 14:42:40 CEST je Gunjan Gupta napisal(a):
> > > bool mctl_mem_matches(u32 offset)
> > > {
> > > + dsb();
> > This looks a bit odd, do you have an explanation for that? And are you
> > sure that is really needed?
> > I understand why we need the DSB after th
Hi Andre!
Dne sreda, 21. april 2021 ob 11:27:12 CEST je Andre Przywara napisal(a):
> Import updated devicetree file from Linux v5.12-rc8.
>
> Besides some node and audio port renames this changes the PHY modes to
> either rgmii-id or rgmii-txid. From the board files the Pinephone sees
> a lot of
Dne sreda, 21. april 2021 ob 11:27:12 CEST je Andre Przywara napisal(a):
> Import updated devicetree file from Linux v5.12-rc8.
>
> Besides some node and audio port renames this changes the PHY modes to
> either rgmii-id or rgmii-txid. From the board files the Pinephone sees
> a lot of updates.
>
Dne ponedeljek, 26. april 2021 ob 14:14:46 CEST je Andre Przywara napisal(a):
> We hardcode the pinctrl setting for the MMC controllers in boards.c,
> since we need them also in the SPL, where there is no DT yet.
>
> Add the respective setting for the H616 SoC, to enable eMMC on boards
> with this
Hi!
Dne sreda, 28. april 2021 ob 12:05:55 CEST je Andre Przywara napisal(a):
> The "n" factor of the PLL_PERIPH0 clock is using the usual +1 encoding,
> so we need to adjust the register value before doing the calculation.
>
> This fixes the MMC clock setup on those SoCs, which could be slightly
Hi!
Dne petek, 30. april 2021 ob 15:34:28 CEST je Andre Przywara napisal(a):
> On Fri, 30 Apr 2021 14:02:52 +0200 (CEST)
> Mark Kettenis wrote:
>
> Hi Mark,
>
> thanks for the reply!
>
> (CC:ing Alex and Heinrich for the UEFI questions below)
>
> > > Date: Fri, 30 Apr 2021 12:21:21 +0100
> >
Dne nedelja, 11. december 2022 ob 17:32:13 CET je Jernej Skrabec napisal(a):
> Part of the code, previously known as "unknown feature" also doesn't
> have constant values. They are derived from TPR0 parameter in vendor
> DRAM code. Introduce that parameter here too, to ease adding new boards.
>
>
Hi Andre,
Dne ponedeljek, 12. december 2022 ob 02:04:51 CET je Andre Przywara
napisal(a):
> On Sun, 11 Dec 2022 17:32:05 +0100
> Jernej Skrabec wrote:
>
> Hi Jernej,
>
> many thanks for putting this together!
> I will have a more elaborate look at each patch later.
>
> > Current H616 DRAM dri
Hi,
Dne ponedeljek, 12. december 2022 ob 18:50:44 CET je Andre Przywara
napisal(a):
> On Sun, 11 Dec 2022 17:32:09 +0100
> Jernej Skrabec wrote:
>
> Hi,
>
> > Vendor DRAM settings use TPR10 parameter to enable various features.
> > There are many mores features that just those that are current
Dne torek, 13. december 2022 ob 17:51:35 CET je Andre Przywara napisal(a):
> On Tue, 13 Dec 2022 17:23:12 +0100
>
> Jernej Škrabec wrote:
> > Hi,
> >
> > Dne ponedeljek, 12. december 2022 ob 18:50:44 CET je Andre Przywara
> >
> > napisal(a):
&
Hi Andre!
Dne sreda, 04. januar 2023 ob 01:47:16 CET je Andre Przywara napisal(a):
> On Sun, 11 Dec 2022 17:32:05 +0100
> Jernej Skrabec wrote:
>
> Hi Jernej,
>
> > Current H616 DRAM driver is completely customized to Orange Pi Zero2
> > board, which is currently the only H616 board supported b
Dne sreda, 04. januar 2023 ob 01:37:17 CET je Andre Przywara napisal(a):
> On Sun, 11 Dec 2022 17:32:10 +0100
>
> Jernej Skrabec wrote:
> > Vendor H616 DRAM code always configure part which we call ODT
> > configuration. Let's reflect that here too.
>
> I wonder if we need this patch at all. "de
Dne sreda, 04. januar 2023 ob 01:37:47 CET je Andre Przywara napisal(a):
> On Sun, 11 Dec 2022 17:32:12 +0100
> Jernej Skrabec wrote:
>
> Hi Jernej,
>
> > These values are highly board specific and thus make sense to add
> > parameter for them. To ease adding support for new boards, let's make
>
Dne sreda, 04. januar 2023 ob 01:38:12 CET je Andre Przywara napisal(a):
> On Sun, 11 Dec 2022 17:32:13 +0100
>
> Jernej Skrabec wrote:
> > Part of the code, previously known as "unknown feature" also doesn't
> > have constant values. They are derived from TPR0 parameter in vendor
> > DRAM code.
Dne torek, 30. januar 2024 ob 15:16:42 CET je Andre Przywara napisal(a):
> The OrangePi Zero 2W is a tiny development board featuring the Allwinner
> H618 SoC, shipping with up to 4GB of LPDDR4 DRAM, a mini-HDMI connector,
> two USB Type-C sockets and a 16MB SPI NOR flash.
> There is an FPC connect
Dne sobota, 11. november 2023 ob 08:43:22 CET je Mikhail Kalashnikov napisal(a):
> Hi Jernej,
>
> On 04.11.2023 11:31, Jernej Škrabec wrote:
> > Hi Mikhail,
> >
> > I have some notes on LPDDR4 from a long time ago. It mostly matches to your
> > code, but ple
Dne sobota, 11. november 2023 ob 10:10:00 CET je Mikhail Kalashnikov napisal(a):
> From: iuncuim
>
> The H616 SoC family has support for several types of DRAM: DDR3,
> LPDDR3, DDR4 and LPDDR4.
> At the moment, the driver only supports DDR3 and LPDDR3 memory.
> Let's extend the driver to support t
Dne nedelja, 26. november 2023 ob 13:33:51 CET je Andre Przywara napisal(a):
> On Sun, 26 Nov 2023 11:32:35 +
> Bob McChesney wrote:
>
> Hi Bob,
>
> thanks for the reply!
>
> CC:ing Jernej for the THS SRAM issue and the HDMI support mentioned
> below.
>
> > On Thu, Nov 23, 2023 at 03:17:09
Dne ponedeljek, 15. april 2024 ob 02:22:45 GMT +2 je Andre Przywara napisal(a):
> On Sat, 13 Apr 2024 21:43:52 +0800
> da...@189.cn wrote:
>
> Hi,
>
> thanks for sending a patch!
>
> > From: lalakii
> >
> > Add "DRAM_SUN50I_H616_TRIM_SIZE" option for 1.5gb board.
> >
> > Signed-off-by: lalaki
Dne nedelja, 03. januar 2021 ob 10:56:52 CET je Jernej Skrabec napisal(a):
> This series introduces Tanix TX6 TV box support based on Allwinner H6
> SoC. First patch syncs H6 DT files from Linux 5.11-rc1 release and
> second one adds support for Tanix TX6 board.
>
> Please take a look.
>
> Best r
append console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait
> >
> > This code makes usage of a new variable called fdtoverlay_addr_r used to
> > load the overlay files without overwritting anything important.
> >
> > Cc: Tom Rini
> > Cc: Andre Heider
> > Cc: Jerne
Dne ponedeljek, 04. januar 2021 ob 11:35:41 CET je André Przywara napisal(a):
> On 03/01/2021 23:43, Samuel Holland wrote:
>
> Hi Jernej,
>
> thanks for that patch, that's a nice solution to avoid those long #ifdef
> chains!
>
> > On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> >> It turns out that t
Dne ponedeljek, 04. januar 2021 ob 03:33:12 CET je Samuel Holland napisal(a):
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> > This port is needed for communication with PMIC. SPL uses it to set DRAM
> > voltage on H616 boards.
> >
> > Signed-off-by: Jernej Skrabec
> > ---
> >
> > arch/arm/includ
Dne ponedeljek, 04. januar 2021 ob 03:39:52 CET je Samuel Holland napisal(a):
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> > Allwinner H616 supports many types of DRAM. Most notably it supports
> > LPDDR4. However, all commercially available boards at this time use
> > only DDR3, so this commit add
Dne ponedeljek, 04. januar 2021 ob 03:47:06 CET je Samuel Holland napisal(a):
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> > H616 is very similar to H6 so most of the infrastructure can be reused.
> > However, two big differences are that it doesn't have functional SRAM A2
> > which is usually used
Dne sreda, 06. januar 2021 ob 16:41:02 CET je André Przywara napisal(a):
> On 03/01/2021 10:00, Jernej Skrabec wrote:
> > Updated H6 DT files are based on Linux 5.11-rc1 release.
> >
> > Signed-off-by: Jernej Skrabec
>
> That looks alright, but it seems like the OrangePi One Plus .dts is not
> u
Dne sreda, 06. januar 2021 ob 16:51:09 CET je André Przywara napisal(a):
> On 03/01/2021 10:00, Jernej Skrabec wrote:
> > This commit adds support for Tanix TX6 TV box, based on H6. It's low end
> > H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
> > peripherals.
> >
> > DT fil
Dne sreda, 06. januar 2021 ob 10:24:35 CET je Andre Przywara napisal(a):
> Hi,
>
> a small update fixing the strncpy bug and addressing too long DT names
> properly. Thanks to Samuel for pointing this out.
> ==
>
> So far creating a bootable SPL image for Allwinner based boards us
Dne petek, 08. januar 2021 ob 03:01:42 CET je André Przywara napisal(a):
> On 03/12/2020 17:46, Jernej Skrabec wrote:
> > It turns out that in rare cases, current analytical approach to detect
> > correct DRAM bus width and rank on H6 doesn't work. On some TV boxes
> > with DDR3, incorrect DRAM con
Dne nedelja, 10. januar 2021 ob 20:29:39 CET je Jernej Skrabec napisal(a):
> From: Andre Heider
>
> dts file is taken from Linux 5.11-rc1 tag.
>
> The Bluetooth controller of this device ships with a default address,
> use the new CONFIG_FIXUP_BDADDR option to fix it up.
>
> akonadi:?collection
Dne ponedeljek, 04. januar 2021 ob 01:03:17 CET je Samuel Holland napisal(a):
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> > There was no need to have prcm definitions for H6 and similar SoCs till
> > now. However, support R_I2C will be needed soon in SPL.
> >
> > Move old definitions to prcm_sun6
Dne ponedeljek, 04. januar 2021 ob 03:02:03 CET je Samuel Holland napisal(a):
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> > From: Andre Przywara
> >
> > H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
> > driver and need for PMIC configuration, which pull several drivers w
Dne ponedeljek, 11. januar 2021 ob 02:03:03 CET je Andre Przywara napisal(a):
> Hi,
>
> I came up with those three patches to prepare for the H616.
> Patch 1 simplifies the MMC driver, so the H616 support becomes a
> one-liner.
> Patch 2 cleans up the Ethernet driver, so we can support the same
>
Dne ponedeljek, 11. januar 2021 ob 01:02:07 CET je André Przywara napisal(a):
> On 03/01/2021 09:26, Jernej Skrabec wrote:
> > This PMIC can be found on H616 boards and it's very similar to AXP805
> > and AXP806.
> >> Signed-off-by: Jernej Skrabec
>
> The existing sunxi PMIC code is the typical U
Dne ponedeljek, 11. januar 2021 ob 21:11:32 CET je Jernej Skrabec napisal(a):
> This series introduces H616 support. Later patches add also OrangePi
> Zero2 support but since H616 DT is not merged into Linux yet, I don't
> expect them to land yet.
>
> Most patches are ready to land, except those w
Dne torek, 19. januar 2021 ob 02:05:20 CET je Andre Przywara napisal(a):
> The #ifdef CONFIG_xxxPWR conditionals were not working as expected, as
> string Kconfig symbols are always "defined" from the preprocessor's
> perspective. This lead to unnecessary calls to the GPIO routines, but
> also alwa
Hi!
Dne četrtek, 27. maj 2021 ob 01:49:48 CEST je Andre Przywara napisal(a):
> On Wed, 5 May 2021 13:53:05 +0100
> Andre Przywara wrote:
>
> Hi,
>
> > Most clock factors and dividers in the H6 PLLs use a "+1 encoding",
> > which we were missing on two occasions.
>
> can someone please confirm
Dne ponedeljek, 07. junij 2021 ob 19:42:45 CEST je Jernej Skrabec napisal(a):
> OrangePi PC2 board has DRAM with ODT, so enable it. ZQ value is also
> slightly different in vendor images, so update it as well. H5 SoC is
> also connected to voltage regulator. It's default value is pretty low,
> so i
Dne sobota, 12. junij 2021 ob 07:50:27 CEST je Jernej Škrabec napisal(a):
> Dne ponedeljek, 07. junij 2021 ob 19:42:45 CEST je Jernej Skrabec
napisal(a):
> > OrangePi PC2 board has DRAM with ODT, so enable it. ZQ value is also
> > slightly different in vendor images, so update it
Dne petek, 22. januar 2021 ob 02:17:30 CET je Andre Przywara napisal(a):
> On Mon, 11 Jan 2021 21:11:40 +0100
>
> Jernej Skrabec wrote:
> > H616 has mostly the same clocks as H6 with some small differences. Just
> > reuse H6 clocks for H616 and handle differences with macros.
> >
> > Reviewed-by
Hi!
Dne nedelja, 24. januar 2021 ob 09:27:02 CET je Heinrich Schuchardt
napisal(a):
> On 1/24/21 3:03 AM, Simon Glass wrote:
> > On Fri, 22 Jan 2021 at 05:05, Andre Przywara
wrote:
> >> When "bootefi bootmgr" is run, it switches the CPU into non-secure
> >> state. This breaks platforms like 32-
Dne nedelja, 24. januar 2021 ob 09:33:15 CET je Jernej Škrabec napisal(a):
> Hi!
>
> Dne nedelja, 24. januar 2021 ob 09:27:02 CET je Heinrich Schuchardt
>
> napisal(a):
> > On 1/24/21 3:03 AM, Simon Glass wrote:
> > > On Fri, 22 Jan 2021 at 05:05, Andre Przywara
&g
Dne sreda, 27. januar 2021 ob 02:06:35 CET je Andre Przywara napisal(a):
> The first two patches prepare the sun8i-emac driver to deal with the
> EMAC as integrated into the H616 SoC. This IP block is compatible with
> the A64 version, but the current driver prevents us from using that:
> - The EPH
Dne ponedeljek, 01. februar 2021 ob 01:46:22 CET je Andre Przywara napisal(a):
> On Sun, 31 Jan 2021 21:25:39 +0100
> Jernej Skrabec wrote:
>
> Hi Jernej,
>
> > It turns out that there is a magic bit in PRCM region which seemingly
> > makes PLLs work if it's enabled. Sadly, there is no documenta
Dne petek, 05. februar 2021 ob 02:07:48 CET je Andre Przywara napisal(a):
> From: Jagan Teki
>
> DM_VIDEO migration deadline is already expired, but around
> 80 Allwinner boards are still using video in a legacy way.
>
> = WARNING ==
> This board does not
Hi!
Dne torek, 23. februar 2021 ob 21:46:26 CET je Jernej Skrabec napisal(a):
> Now that bit meanings are somewhat known, rework PHY initialization.
> This is modelled after Linux driver.
>
> Signed-off-by: Jernej Skrabec
> ---
> drivers/video/sunxi/sunxi_dw_hdmi.c | 411 +++
Dne četrtek, 04. marec 2021 ob 02:42:08 CET je Andre Przywara napisal(a):
> On Tue, 23 Feb 2021 21:46:18 +0100
>
> Jernej Skrabec wrote:
> > It turns out that even though A64, H3 and H5 have custom PHY, standard
> > hot plug detection for DW-HDMI works just fine.
>
> But the generic code looks f
Hi!
Dne četrtek, 04. marec 2021 ob 02:42:21 CET je Andre Przywara napisal(a):
> On Tue, 23 Feb 2021 21:46:19 +0100
> Jernej Skrabec wrote:
>
> > No Allwinner boards with DW-HDMI controller use separate I2C bus for
> > EDID read. Remove that check.
>
> Apparently the Cubieboard 4 has (as the onl
Dne četrtek, 04. marec 2021 ob 02:41:45 CET je Andre Przywara napisal(a):
> On Tue, 23 Feb 2021 21:46:16 +0100
>
> Jernej Skrabec wrote:
> > Code which searches for valid detailed timing entry will be used in more
> > places. Extract it.
> >
> > Signed-off-by: Jernej Skrabec
> > ---
> >
> > c
Dne nedelja, 07. marec 2021 ob 02:32:52 CET je Andre Przywara napisal(a):
> On Sat, 6 Mar 2021 20:54:27 +0100
>
> Jernej Skrabec wrote:
> > Currently DE2 driver uses functions which are defined in internal
> > headers. They are not meant to be used outside of uclass framework.
> > Switch DE2 dri
Dne torek, 09. marec 2021 ob 01:40:32 CET je Andre Przywara napisal(a):
> On Sun, 07 Mar 2021 08:35:23 +0100
> Jernej Škrabec wrote:
>
> Hi,
>
> > Dne nedelja, 07. marec 2021 ob 02:32:52 CET je Andre Przywara napisal(a):
> > > On Sat, 6 Mar 2021 20:54:27 +01
Dne ponedeljek, 08. marec 2021 ob 08:57:31 CET je Jagan Teki napisal(a):
> On Sun, Mar 7, 2021 at 1:25 AM Jernej Skrabec
wrote:
> > This commit adds standalone driver for DW HDMI PHY. It deprecates code
> > which is included in sunxi dw-hdmi platform driver.
> >
> > Signed-off-by: Jernej Skrabec
Dne nedelja, 26. januar 2020 ob 15:03:55 CET je Jagan Teki napisal(a):
> On Sun, Jan 26, 2020 at 6:09 PM Jernej Skrabec
wrote:
> > Orange Pi Win has gigabit ethernet port, but default U-Boot
> > configuration for that board didn't enable it.
> >
> > Fix that.
>
> The missing one is ethernet phy
Hi Andre,
Dne sreda, 12. oktober 2022 ob 18:26:10 CEST je Andre Przywara napisal(a):
> The X96 Mate TV box is a TV box with the Allwinner H616 SoC. It is
> available with up to 4GB of DRAM and 64GB eMMC.
> The DRAM chips require a different configuration when compared to the
> OrangePi Zero2, we m
Hi Andre,
Dne sreda, 12. oktober 2022 ob 18:34:53 CEST je Andre Przywara napisal(a):
> Traditionally we assumed that every Allwinner board would come with at
> least 256 MB of DRAM, and set our DRAM layout accordingly. This affected
> both the default load addresses, but also U-Boot's own address
Hi Andre,
Dne sreda, 12. oktober 2022 ob 18:34:54 CEST je Andre Przywara napisal(a):
> The default load addresses for the various payloads (kernel, DT,
> ramdisk) on systems with just 32MB of DRAM have some issues:
> For a start the preceding comment doesn't match the actual values:
> apparently t
Hi Andre,
Dne sreda, 12. oktober 2022 ob 18:34:55 CEST je Andre Przywara napisal(a):
> So far we stated the lack of a lowlevel() init function for the F1C100s
> board by defining the respective SKIP_* symbol in the board's
> defconfig. However we don't expect any *board* to employ such low level
>
Hi Andre,
Dne sreda, 12. oktober 2022 ob 18:34:56 CEST je Andre Przywara napisal(a):
> Some boards use UART1 for its debug UART, so define the pins for the SPL
> and the pinmux name and mux value for U-Boot proper.
>
> Signed-off-by: Andre Przywara
> ---
> arch/arm/mach-sunxi/board.c
Hi Andre,
Dne sreda, 12. oktober 2022 ob 18:34:57 CEST je Andre Przywara napisal(a):
> The F1Cx00 SoCs connect the first PortA pins to UART1.
>
> Add this to the SoC .dtsi, so boards can reference UART1 pins.
>
> Signed-off-by: Andre Przywara
Reviewed-by: Jernej Skrabec
Best regards,
Jernej
Dne ponedeljek, 26. september 2022 ob 12:34:38 CEST je Andre Przywara
napisal(a):
> On Wed, 14 Sep 2022 00:40:02 +0100
> Andre Przywara wrote:
>
> Hi,
>
> can someone please have a look and confirm that this is legit? Could be as
> easy as just diff'ing against what's in the kernel tree and che
Dne torek, 18. oktober 2022 ob 11:23:41 CEST je Andre Przywara napisal(a):
> On 12/10/2022 22:42, Jernej Škrabec wrote:
>
> Hi Jernej,
>
> many thanks for the review of this series, that's much appreciated!
>
> > Dne sreda, 12. oktober 2022 ob 18:34:56 CES
Hi Samuel!
Dne ponedeljek, 28. november 2022 ob 08:02:23 CET je Samuel Holland
napisal(a):
> This series starts converting the DE2 video driver to use devicetree for
> MMIO addresses and clock/reset/regulator consumers. This is necessary
> for adding new SoC support (H6, D1, etc.) and will also b
Dne sreda, 23. november 2022 ob 23:51:17 CET je Andre Przywara napisal(a):
> Commit 08574ed339fb ("Convert CONFIG_SYS_MONITOR_LEN to Kconfig") moved
> the definition of said config variable from the common sunxi header to
> *every board's* defconfig.
> This is a platform choice, not board specific,
Hi!
Dne četrtek, 21. julij 2022 ob 13:28:59 CEST je Andre Przywara napisal(a):
> On 21/07/2022 12:03, Da Xue wrote:
>
> Hi Da,
>
> > Users were reporting non-boot on our H5 boards (ALL-H3-CC-H5). u-boot
> > gets stuck in SPL with this message for SD/eMMC respectively.
> >
> > Trying to boot fro
Dne četrtek, 21. julij 2022 ob 21:56:35 CEST je Da Xue napisal(a):
> On Thu, Jul 21, 2022 at 11:14 AM Jernej Škrabec
>
> wrote:
> > Hi!
> >
> > Dne četrtek, 21. julij 2022 ob 13:28:59 CEST je Andre Przywara napisal(a):
> > > On 21/07/2022 12:
Dne četrtek, 21. julij 2022 ob 22:33:09 CEST je Da Xue napisal(a):
> On Thu, Jul 21, 2022 at 4:05 PM Jernej Škrabec
wrote:
> > Dne četrtek, 21. julij 2022 ob 21:56:35 CEST je Da Xue napisal(a):
> > > On Thu, Jul 21, 2022 at 11:14 AM Jernej Škrabec
> > >
Dne četrtek, 21. julij 2022 ob 23:23:28 CEST je Da Xue napisal(a):
> On Thu, Jul 21, 2022 at 4:58 PM Da Xue wrote:
> > On Thu, Jul 21, 2022 at 4:49 PM Jernej Škrabec
wrote:
> > > Dne četrtek, 21. julij 2022 ob 22:33:09 CEST je Da Xue napisal(a):
> > > > On Thu,
Dne petek, 22. julij 2022 ob 18:55:14 CEST je Andre Przywara napisal(a):
> On 21/07/2022 23:08, Da Xue wrote:
>
> Hi,
>
> > Some users experienced problems booting u-boot from SPL hanging here:
> >
> > Trying to boot from MMC1 or Trying to boot from MMC2
> >
> > This seems to occur with both Mi
Hi Andre,
thanks for working on this!
Dne petek, 20. november 2020 ob 10:42:15 CET je André Przywara napisal(a):
> On 19/11/2020 19:59, Priit Laes wrote:
> > On Thu, Nov 19, 2020 at 10:54:42AM +, Andre Przywara wrote:
> >> So far we did not support the BootROM based FEL USB debug mode on the
Hi,
Dne sreda, 17. oktober 2018 ob 17:03:23 CEST je Vasily Khoruzhick napisal(a):
> On Tuesday, October 16, 2018 10:09:30 PM PDT Vasily Khoruzhick wrote:
> > Updates the device tree file from the the Linux tree as of v4.19-rc4,
> > exactly Linux commit:
> >
> > commit 7876320f8880 (tag: v4.19-rc4
Hi!
Dne sreda, 17. oktober 2018 ob 17:13:42 CEST je Vasily Khoruzhick napisal(a):
> On Tuesday, October 16, 2018 10:09:32 PM PDT Vasily Khoruzhick wrote:
> > Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
> > USB-connected touchpad and an eDP LCD panel connected via a RGB-eD
Hi!
Dne sreda, 01. marec 2017 ob 08:04:40 CET je Chen-Yu Tsai napisal(a):
> According to the BSP released by Banana Pi, the R40 (sun8iw11p1) has
> an extra "PLL lock control" register in the CCU, which controls whether
> the individual PLL lock status bits in each PLL's control register work
> or
sunxi_display.depth);
> > + lcdc_enable((struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE, 0);
>
> That one is suspicious. Shouldn't sunxi_composer_enable be left, and
> lcdc_enable called only once?
Uh, missed that. Probably fixup error. It will be
Hi Nickey,
Dne petek, 10. marec 2017 ob 03:19:44 CET je Nickey.Yang napisal(a):
> Hi Jernej,
>
> 在 2017年03月09日 07:34, Jernej Skrabec 写道:
> > Designware HDMI controller and phy are used in other SoCs as well. Split
> > out platform independent code.
> >
> > DW HDMI has 8 bit registers but they ca
Hi,
Dne ponedeljek, 13. marec 2017 ob 13:33:43 CET je Simon Glass napisal(a):
> Hi,
>
> On 8 March 2017 at 16:34, Jernej Skrabec wrote:
> > This is needed for HDMI, which will be added later.
> >
> > Signed-off-by: Jernej Skrabec
> > ---
> >
> > arch/arm/include/asm/arch-sunxi/clock_sun6i.h
Hi,
Dne torek, 21. marec 2017 ob 20:34:33 CET je Maxime Ripard napisal(a):
> Hi,
>
> On Mon, Mar 20, 2017 at 11:01:25PM +0100, Jernej Skrabec wrote:
> > diff --git a/include/configs/sun50i.h b/include/configs/sun50i.h
> > index 1b7bfb6c22..146f7f4e1b 100644
> > --- a/include/configs/sun50i.h
> >
Hi,
Dne sreda, 22. marec 2017 ob 08:45:48 CET je Maxime Ripard napisal(a):
> On Tue, Mar 21, 2017 at 11:26:46PM +0100, Jernej Škrabec wrote:
> > Hi,
> >
> > Dne torek, 21. marec 2017 ob 20:34:33 CET je Maxime Ripard napisal(a):
> > > Hi,
> > >
> &g
Hi Kever,
Dne petek, 24. marec 2017 ob 03:38:16 CET je Kever Yang napisal(a):
> Hi Jernej,
>
> On 03/24/2017 08:11 AM, Jernej Skrabec wrote:
> > MiQi is rk3288 based development board with 1 or 2 GB SDRAM, 16 GB eMMC,
> > micro SD card interface, 4 USB 2.0 ports, HDMI, gigabit Ethernet and
> > ex
Dne petek, 24. marec 2017 ob 16:53:07 CET je Maxime Ripard napisal(a):
> On Wed, Mar 22, 2017 at 06:19:12PM +0100, Jernej Škrabec wrote:
> > Hi,
> >
> > Dne sreda, 22. marec 2017 ob 08:45:48 CET je Maxime Ripard napisal(a):
> > > On Tue, Mar 21, 2017 at 11:26:46
Dne sobota, 01. april 2017 ob 06:20:52 CEST je Simon Glass napisal(a):
> Hi Jernej,
>
> On 20 March 2017 at 16:01, Jernej Skrabec wrote:
> > This series implements support for HDMI output. This is done using
> > DM video framework and sharing the HDMI controller code with RK3288.
> >
> > Patch 1
Hi,
Dne nedelja, 09. april 2017 ob 21:28:47 CEST je Simon Glass napisal(a):
> Hi,
>
> On 28 March 2017 at 16:39, Jernej Skrabec wrote:
> > I2C_EDID currently selects DM_I2C. However, it is not needed. I2C_EDID
> > is used for building edid.c, which doesn't even use I2C bus, and by I2C
> > comman
Dne petek, 21. april 2017 ob 09:04:13 CEST je Maxime Ripard napisal(a):
> Hi Jernej,
>
> On Mon, Mar 27, 2017 at 07:22:28PM +0200, Jernej Skrabec wrote:
> > This series implements support for HDMI output. This is done using
> > DM video framework and sharing the HDMI controller code with RK3288.
>
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