This series adds the r5 and a72 defconfigs for 2 platforms:
- J7200 HS
- J721S2 HS
Andrew Davis (1):
configs: Add configs for J7200 High Security EVM
Jayesh Choudhary (1):
configs: Add configs for j721s2 High Security EVM
MAINTAINERS | 4 +
configs
ew configs from GP variant which were missing]
Signed-off-by: Jayesh Choudhary
---
MAINTAINERS| 2 +
configs/j7200_hs_evm_a72_defconfig | 208 +
configs/j7200_hs_evm_r5_defconfig | 172
3 files changed, 382 insertions(
27;
CONFIG_BOOTCOMMAND uses FIT images for booting
Signed-off-by: Jayesh Choudhary
---
MAINTAINERS | 2 +
configs/j721s2_hs_evm_a72_defconfig | 217
configs/j721s2_hs_evm_r5_defconfig | 178 +++
3 files changed,
Some firewalls enabled by ROM are still left on. So some
address space is inaccessible to the bootloader. For example,
in OSPI boot mode we get an exception and the system hangs.
Therefore, disable all the firewalls left on by the ROM.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3
Introduce the basic functions and definitions needed to properly
initialize TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/Kconfig | 7 +-
arch/arm/mach-k3/Makefile
Include the static DMA channel data for using DMA at SPL stage
for J722S SoC family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
drivers/firmware/ti_sci_static_data.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/firmware
Introduce the basic files needed to support the TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
board/ti/j722s/Kconfig | 26 +
board/ti/j722s/MAINTAINERS |9 +
board/ti/j722s/Makefile
Introduce the initial configs needed to support the J722S SoC family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
configs/j722s_evm_a53_defconfig | 177
configs/j722s_evm_r5_defconfig | 137
include/configs
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary
---
doc/board/ti/j722s_evm.rst | 260 +
doc/board/ti/k3.rst| 1 +
2 files changed, 261 insertions(+)
create mode 100644 doc/board/ti/j722s_evm.rst
diff --git a/doc
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/dts/Makefile |2 +
arch/arm/dts/k3-j722s-binman.dtsi | 172 ++
arch/arm/dts/k3-j722s
Hello Andrew,
On 29/05/24 20:36, Andrew Davis wrote:
On 5/29/24 8:24 AM, Jayesh Choudhary wrote:
Include the part number for TI's j722s family of SoC
to identify it during boot.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/hardware.
Hello Andrew,
On 29/05/24 20:35, Andrew Davis wrote:
On 5/29/24 8:24 AM, Jayesh Choudhary wrote:
Sort CONFIG_SOC* and K3_SOC_ID alphabetically.
Why? I kinda like the chronological order we have today, helps me remember
what are the newer/older parts. Which then helps in seeing where the line
Hello Andrew,
Thanks for the review.
On 29/05/24 20:47, Andrew Davis wrote:
On 5/29/24 8:24 AM, Jayesh Choudhary wrote:
Introduce the basic functions and definitions needed to properly
initialize TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Hello Neha,
Thanks for the review.
On 30/05/24 08:15, Neha Malcom Francis wrote:
Hi Jayesh
On 29/05/24 18:54, Jayesh Choudhary wrote:
Introduce the basic functions and definitions needed to properly
initialize TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by
Hello Tom, Andrew,
On 23/05/24 04:36, Tom Rini wrote:
On Wed, May 22, 2024 at 10:21:28AM -0500, Andrew Davis wrote:
On 5/22/24 6:37 AM, Jayesh Choudhary wrote:
QoS bit mapping are common across all K3 SoCs so move those defines
to common header file (k3_qos.h).
This ensures that we do not
Hello Andrew,
On 22/05/24 21:14, Andrew Davis wrote:
On 5/22/24 6:37 AM, Jayesh Choudhary wrote:
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 7
Sort CONFIG_SOC* and K3_SOC_ID alphabetically.
Signed-off-by: Jayesh Choudhary
Reviewed-by: Andrew Davis
Reviewed-by: Neha Malcom Francis
---
arch/arm/mach-k3/include/mach/hardware.h | 37
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach
Include the part number for TI's j722s family of SoC
to identify it during boot.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/hardware.h | 2 ++
drivers/soc/soc_ti_k3.c | 3 +++
2 files changed, 5 insertions(+)
diff --
Use IS_ENABLED macro for the platform clock-data list and add them
in alphabetical order.
Reviewed-by: Bryan Brattlof
Signed-off-by: Jayesh Choudhary
---
drivers/clk/ti/clk-k3.c | 41 +
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a
ll/20240529074849.363281-1-n-fran...@ti.com/
[6]: https://lore.kernel.org/all/20240510202124.794448-1-...@ti.com/
[7]:
https://patchwork.ozlabs.org/project/uboot/patch/20240529132448.459330-10-j-choudh...@ti.com/#3319318
[8]:
https://patchwork.ozlabs.org/project/uboot/patch/20240529132448.459330-10-j-
Add the power domain platform data entries in alphabetical order.
Signed-off-by: Jayesh Choudhary
Reviewed-by: Neha Malcom Francis
---
drivers/power/domain/ti-power-domain.c | 36 +-
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/power/domain/ti
Add JTAG_ID_PARTNO_* in alphabetical order.
Signed-off-by: Jayesh Choudhary
Reviewed-by: Neha Malcom Francis
---
drivers/soc/soc_ti_k3.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index
Add the entries in alphabetical order.
Signed-off-by: Jayesh Choudhary
Reviewed-by: Neha Malcom Francis
---
arch/arm/mach-k3/r5/Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
index 1cfc8e3ade
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Bryan Brattlof
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5
The J722S family of SoCs uses the same DDR controller as found on the
AM62A family. Enable this option when building for the J722S family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
Reviewed-by: Neha Malcom Francis
---
drivers/ram/Kconfig | 2 +-
1 file changed, 1
Introduce the basic functions and definitions needed to properly
initialize TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/Kconfig | 7 +-
arch/arm/mach-k3/Makefile
Include the static DMA channel data for using DMA at SPL stage
for J722S SoC family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
drivers/firmware/ti_sci_static_data.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/firmware
Introduce the basic files needed to support the TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
board/ti/j722s/Kconfig | 26 +
board/ti/j722s/MAINTAINERS |9 +
board/ti/j722s/Makefile
Introduce the initial configs needed to support the J722S SoC family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
configs/j722s_evm_a53_defconfig | 172
configs/j722s_evm_r5_defconfig | 131
include/configs
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary
Reviewed-by: Neha Malcom Francis
---
doc/board/ti/j722s_evm.rst | 260 +
doc/board/ti/k3.rst| 1 +
2 files changed, 261 insertions(+)
create mode 100644 doc/board/ti
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/dts/Makefile |2 +
arch/arm/dts/k3-j722s-binman.dtsi | 172 ++
arch/arm/dts/k3-j722s
chwork.ozlabs.org/project/uboot/patch/20240522113726.302908-2-j-choudh...@ti.com/#3315446
[2]:
https://patchwork.ozlabs.org/project/uboot/patch/20240522113726.302908-3-j-choudh...@ti.com/#3315467
Jayesh Choudhary (8):
arm: mach-k3: am62a_qos: Move common bit MACROS to k3_qos header file
ar
QoS bit mapping are common across all K3 SoCs so move those defines
to common header file (k3_qos.h).
This ensures that we do not define these for each SoC.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/k3-qos.h | 74 ++
arch/arm/mach-k3/r5/am62ax
am62a_qos_uboot file.
Suggested-by: Andrew Davis
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/k3-qos.h | 86
arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c | 24 +++---
2 files changed, 28 insertions(+), 82 deletions(-)
diff --git a/arch/arm/mach-k3/include
() function call that sets the threadmap for NBSS
registers. (Section 10.2.10.1.2 "NB Parameters" in TRM[0])
Section 3.3.2 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruil1
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k
() function call that sets the threadmap for NBSS
registers. (Section 10.2.9.2.10 "Quality of Service" in TRM[0])
Section 3.2.1 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj28
Signed-off-by: Jayesh Choudhary
---
arc
() function call that sets the threadmap for NBSS
registers. (Section 10.2.9.2.10 "Quality of Service" in TRM[0])
Section 3.2.1 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj52
Signed-off-by: Jayesh Choudhary
---
arc
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j721e_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index 37d582b775..ffaf21d499 100644
--- a/configs
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j721s2_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index 7413ddd081..df5910a48f 100644
--- a/configs
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j784s4_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j784s4_evm_r5_defconfig b/configs/j784s4_evm_r5_defconfig
index f5fe743220..d1bcf792d7 100644
--- a/configs
, 10-15. Here we are
mapping first two groups as NRT and 10-15 as RT for both NAVSS0_NBSS_NB0
and NAVSS0_NBSS_NB1.
[0]: https://lore.kernel.org/all/20230414072725.8802-1-a-bhat...@ti.com/
Jayesh Choudhary (7):
arm: mach-k3: am62a_qos: Move common bit MACROS to k3_qos header file
arm: mach-k3
QoS bit mapping are common across all K3 SoCs so move those defines
to common header file (k3_qos.h).
This ensures that we do not define these for each SoC.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/k3-qos.h | 74 ++
arch/arm/mach-k3/r5/am62ax
of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruil1
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/j721e/j721e_init.c | 28 +
arch/arm/mach-k3/r5/j721e/Makefile | 1 +
arch/arm/mach-k3/r5/j721e/j721e_qos.h | 96 +
lity of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj28
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/j721s2/j721s2_init.c | 30 +
arch/arm/mach-k3/r5/j721s2/Makefile | 1 +
arch/arm/mach-k3/r5/j721s2/j721
lity of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj52
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/j784s4/j784s4_init.c | 30 +
arch/arm/mach-k3/r5/j784s4/Makefile | 1 +
arch/arm/mach-k3/r5/j784s4/j784
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j721e_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index cea48b2613..5d48f48367 100644
--- a/configs
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j721s2_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index 3c958cafbe..d53c5e33d6 100644
--- a/configs
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j784s4_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j784s4_evm_r5_defconfig b/configs/j784s4_evm_r5_defconfig
index f5fe743220..d1bcf792d7 100644
--- a/configs
Sort CONFIG_SOC* and K3_SOC_ID alphabetically.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/hardware.h | 37
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-k3/include/mach/hardware.h
b/arch/arm/mach-k3/include/mach
2124.794448-1-...@ti.com/
Jayesh Choudhary (14):
arm: mach-k3: Sort CONFIG_SOC* and K3_SOC_ID entries
soc: ti: k3-socinfo: Fix SOC JTAG entry order
soc: add info to identify the J722S SoC family
clk: ti: clk-k3: use IS_ENABLED macro and fix the clock-data order
power: domain: ti: Fix the
Add JTAG_ID_PARTNO_* in alphabetical order.
Signed-off-by: Jayesh Choudhary
---
drivers/soc/soc_ti_k3.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index b585e47d46..0838808515 100644
--- a
Include the part number for TI's j722s family of SoC
to identify it during boot.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/hardware.h | 2 ++
drivers/soc/soc_ti_k3.c | 3 +++
2 files changed, 5 insertions(+)
diff --
Use IS_ENABLED macro for the platform clock-data list and add them
in alphabetical order.
Reviewed-by: Bryan Brattlof
Signed-off-by: Jayesh Choudhary
---
drivers/clk/ti/clk-k3.c | 41 +
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a
Add the power domain platform data entries in alphabetical order.
Signed-off-by: Jayesh Choudhary
---
drivers/power/domain/ti-power-domain.c | 36 +-
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/power/domain/ti-power-domain.c
b/drivers/power
Add the entries in alphabetical order.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/r5/Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
index 1cfc8e3ade..f1e61c8548 100644
--- a/arch/arm/mach
The J722S family of SoCs uses the same DDR controller as found on the
AM62A family. Enable this option when building for the J722S family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
drivers/ram/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Bryan Brattlof
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5
ates which is *NOT SUPPOSED TO BE MERGED*
Jayesh Choudhary (15):
DO-NOT-MERGE: dts: upstream: src: Necessary pulls from upstream dts
arm: mach-k3: Sort CONFIG_SOC* and K3_SOC_ID entries
soc: ti: k3-socinfo: Fix SOC JTAG entry order
soc: add info to identify the J722S SoC family
clk: ti: clk-
Include the part number for TI's j722s family of SoC
to identify it during boot.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/hardware.h | 2 ++
drivers/soc/soc_ti_k3.c | 3 +++
2 files changed, 5 insertions(+)
diff --
Add the power domain platform data entries in alphabetical order.
Signed-off-by: Jayesh Choudhary
---
drivers/power/domain/ti-power-domain.c | 36 +-
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/power/domain/ti-power-domain.c
b/drivers/power
Add JTAG_ID_PARTNO_* in alphabetical order.
Signed-off-by: Jayesh Choudhary
---
drivers/soc/soc_ti_k3.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index 3a4e58bba6..bcc11e6bff 100644
--- a
Use IS_ENABLED macro for the platform clock-data list and add them
in alphabetical order.
Signed-off-by: Jayesh Choudhary
---
drivers/clk/ti/clk-k3.c | 41 +
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/drivers/clk/ti/clk-k3.c b/drivers
Add the entries in alphabetical order.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/r5/Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
index 1cfc8e3ade..f1e61c8548 100644
--- a/arch/arm/mach
Sort CONFIG_SOC* and K3_SOC_ID alphabetically.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/hardware.h | 37
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-k3/include/mach/hardware.h
b/arch/arm/mach-k3/include/mach
j722s dts support that needs to be pulled from devicetree-rebasing
tree. The whole series depends on this support.
Signed-off-by: Jayesh Choudhary
---
dts/upstream/Bindings/arm/ti/k3.yaml | 6 +
dts/upstream/src/arm64/ti/k3-j722s-evm.dts | 383 +
dts/upstream/src
The J722S family of SoCs uses the same DDR controller as found on the
AM62A family. Enable this option when building for the J722S family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
drivers/ram/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5/j722s/Makefile | 6 +
arch
Introduce the basic functions and definitions needed to properly
initialize TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/Kconfig | 7 +-
arch/arm/mach-k3/Makefile
Include the static DMA channel data for using DMA at SPL stage
for J722S SoC family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
drivers/firmware/ti_sci_static_data.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/firmware
Introduce the basic files needed to support the TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
board/ti/j722s/Kconfig | 26 +
board/ti/j722s/MAINTAINERS |9 +
board/ti/j722s/Makefile
Introduce the initial configs needed to support the J722S SoC family.
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
configs/j722s_evm_a53_defconfig | 177
configs/j722s_evm_r5_defconfig | 137
include/configs
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary
---
doc/board/ti/j722s_evm.rst | 262 +
doc/board/ti/k3.rst| 1 +
2 files changed, 263 insertions(+)
create mode 100644 doc/board/ti/j722s_evm.rst
diff --git a/doc
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/dts/Makefile |2 +
arch/arm/dts/k3-j722s-binman.dtsi | 171 ++
arch/arm/dts/k3-j722s
Hello Sumit,
On 05/04/24 10:27, Sumit Garg wrote:
Hi Jayesh,
On Thu, 4 Apr 2024 at 14:30, Jayesh Choudhary wrote:
j722s dts support that needs to be pulled from devicetree-rebasing
tree. The whole series depends on this support.
Which devicetree-rebasing tag does this patch depend upon
Hello Andrew,
On 04/04/24 21:19, Andrew Davis wrote:
On 4/4/24 4:00 AM, Jayesh Choudhary wrote:
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary
---
doc/board/ti/j722s_evm.rst | 262 +
doc/board/ti/k3.rst | 1
Hi,
On 04/04/24 20:59, Andrew Davis wrote:
On 4/4/24 4:00 AM, Jayesh Choudhary wrote:
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/dts/Makefile
Remove the main_cpsw0_qsgmii_phyinit variable from the boot
command as there is no ethernet firmware in j721s2.
Fixes: 8886341aa670 ('configs: j721s2_evm_a72_defconfig: Add A72 specific
defconfig')
Signed-off-by: Jayesh Choudhary
---
configs/j721s2_evm_a72_defconfig | 2 +-
1 file
From: Udit Kumar
J722S SOC have two variants as HS-FS and HS-SE.
Add binman support for HS-SE variant.
Signed-off-by: Udit Kumar
[j-choudh...@ti.com: Fix load-dm-data entry and indentation]
Signed-off-by: Jayesh Choudhary
---
arch/arm/dts/k3-j722s-binman.dtsi | 50
-off-by: Vaishnav Achath
Reviewed-by: Jayesh Choudhary
---
Test logs (CSI capture + RM config dump):
https://gist.github.com/vachath/7b37cd288ef16ad8a2ac6ff5710d1e9a
board/ti/j722s/rm-cfg.yaml | 48 ++---
board/ti/j722s/tifs-rm-cfg.yaml | 28
Hello All,
On 06/11/24 12:09, Jayesh Choudhary wrote:
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 7.
The C7x and VPAC can overwhelm the DSS&#
y DDR accesses. This can cause flickering in
display with certain edgeAI models running parallely if the DSS traffic
is being serviced through non-RT queue.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/am62px/am62p5_init.c| 2 +
arch/arm/mach-k3/r5/am62px/Makefile | 1 +
Add QOS support for DSS in TI K3 SoC to route the DSS traffic through
RT queue by setting orderID as 15:
- J722S
- AM62P
Jayesh Choudhary (4):
arm: mach-k3: j722s: Add QoS support for DSS
arm: mach-k3: am62p: Add QoS support for DSS
configs: j722s_evm_r5_defconfig: Enable CONFIG_K3_QOS
y DDR accesses. This can cause flickering in
display with certain edgeAI models running parallely if the DSS traffic
is being serviced through non-RT queue.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/j722s/j722s_init.c | 1 +
arch/arm/mach-k3/r5/j722s/Makefile | 1 +
arc
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/am62px_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/am62px_evm_r5_defconfig b/configs/am62px_evm_r5_defconfig
index 4f7be44cfb..edff75de74 100644
--- a/configs
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j722s_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig
index e574be9e19..d119e46ff1 100644
--- a/configs
their higher frequency DDR accesses. This can cause
flickering in display with certain applications running parallely if
the DSS traffic is being serviced through non-RT queue.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/am62px/am62p5_init.c| 2 +
arch/arm/mach-k3/r5/am62px/Mak
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/j722s_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig
index a3c13fedef..0f7cd4bf37 100644
--- a/configs
ti.com/>
Jayesh Choudhary (4):
arm: mach-k3: j722s: Add QoS support for DSS
arm: mach-k3: am62p: Add QoS support for DSS
configs: j722s_evm_r5_defconfig: Enable CONFIG_K3_QOS
configs: am62p_evm_r5_defconfig: Enable CONFIG_K3_QOS
arch/arm/mach-k3/am62px/am62p5_init.c| 2 +
arch/ar
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary
---
configs/am62px_evm_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/am62px_evm_r5_defconfig b/configs/am62px_evm_r5_defconfig
index a93c33c1d9..a0eaa128f4 100644
--- a/configs
y DDR accesses. This can cause flickering in
display with certain edgeAI models running parallely if the DSS traffic
is being serviced through non-RT queue.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/j722s/j722s_init.c | 1 +
arch/arm/mach-k3/r5/j722s/Makefile | 1 +
arc
Hello Andrew,
On 06/01/25 20:42, Andrew Davis wrote:
On 1/6/25 4:04 AM, Jayesh Choudhary wrote:
The default value for the mux to select the parent clock,
AUDIO_REFCLK1_CTRL_CLK_SEL is '1' (31) but the mux input for 31
is marked as 'Reserved' so the ti-sci-clk call
get rid of the linux failures during boot-time like:
"[1.573193] ti-sci-clk 44083000.system-controller:clock-controller:
get-parent failed for dev=157, clk=34, ret=-19"
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/j784s4/j784s4_init.c | 5 +
1 file changed, 5 insertions(
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