On 14/07/2021 23:52, Gowtham Tammana wrote:
Add pmic lp876411 node needed for CPU AVS support.
Signed-off-by: Gowtham Tammana
---
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 26 +++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-boa
drivers/dma/ti/k3-udma.c| 281
drivers/soc/ti/k3-navss-ringacc.c | 161 +-
include/linux/soc/ti/k3-navss-ringacc.h | 4 +
3 files changed, 254 insertions(+), 192 deletions(-)
Thank you.
Reviewed-by: Grygorii Strashko
--
Best regards
On 06/07/2020 11:06, Vignesh Raghavendra wrote:
Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 74 +--
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 +++
/net/ti/am65-cpsw-nuss.c | 15 ++--
5 files changed, 167 insertions(+), 134 deletions(-)
Thank you - minor coment.
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
-framework.rst
create mode 100644 drivers/soc/soc-uclass.c
create mode 100644 drivers/soc/soc_sandbox.c
create mode 100644 drivers/soc/soc_ti_k3.c
create mode 100644 include/soc.h
create mode 100644 test/dm/soc.c
Thank you.
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
On 11/02/2020 10:11, Michal Simek wrote:
On 10. 02. 20 13:07, Grygorii Strashko wrote:
On 07/02/2020 13:31, Michal Simek wrote:
There is no reason to check sgmii branch again when it is clear that phy
interface is rgmii.
Signed-off-by: Michal Simek
---
drivers/net/phy/dp83867.c | 4
On 13/02/2020 08:23, Michal Simek wrote:
On 12. 02. 20 21:24, Grygorii Strashko wrote:
On 11/02/2020 10:11, Michal Simek wrote:
On 10. 02. 20 13:07, Grygorii Strashko wrote:
On 07/02/2020 13:31, Michal Simek wrote:
There is no reason to check sgmii branch again when it is clear that
dings/net/ti,dp83867.txt
Based on my talk with Grygorii Strashko better will be to remove it.
Also Linux kernel bindings are being converted to yaml that's another
reason to do it only at one place.
Signed-off-by: Michal Simek
---
I agree and see no reason to duplicate bindings in u
On 13/02/2020 18:05, Michal Simek wrote:
On 13. 02. 20 16:49, Grygorii Strashko wrote:
On 13/02/2020 08:23, Michal Simek wrote:
On 12. 02. 20 21:24, Grygorii Strashko wrote:
On 11/02/2020 10:11, Michal Simek wrote:
On 10. 02. 20 13:07, Grygorii Strashko wrote:
On 07/02/2020 13:31
ata = data;
pdata->iobase = dev_read_addr(dev);
data->version = CPSW_CTRL_VERSION_2;
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
On 14/11/2019 17:04, Alex Marginean wrote:
Adds an optional mdio-handle property which identifies a MDIO bus which can
be scanned to find the relevant PHY. The property is ignored if phy-handle
is also present.
Signed-off-by: Alex Marginean
---
doc/device-tree-bindings/net/ethernet.txt | 2
On 14/11/2019 11:14, Vignesh Raghavendra wrote:
On K3 SoCs, DMA channels are shared across multiple entities, therefore
U-Boot DMA driver needs to query resource range from centralised
resource management controller i.e SystemFirmware and use DMA channels
allocated for A72 host. Add support for
hi
The intention of this series is to sync TI DP83867 driver with mainline Linux
kernel and ensure that proper PHY configuration in "rgmii-rxid" mode, which
is done in the Patch 8.
It also some code refactoring and optimization: patches 2,7.
Grygorii Strashko (8):
net: phy: ti: rena
Move static, one-time initialization to .probe() callback.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 7509936465
The driver ti.c is actually driver for TI DP83867x PHYs, so rename it
accordingly.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/Makefile| 2 +-
drivers/net/phy/{ti.c => dp83867.c} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename drivers/net/phy/{ti.c => dp8
that PHY's default setting will be left as is if the property
is omitted.
Signed-off-by: Grygorii Strashko
---
doc/device-tree-bindings/net/ti,dp83867.txt | 6 --
include/dt-bindings/net/ti-dp83867.h| 3 ++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/doc/device
ently converted into DP83867_CLK_O_SEL_REF_CLK.
Change this so they generate an error.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 53 ++-
1 file changed, 36 insertions(+), 17 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net
ks if the board is strapped to have a delay and is configured to use
"rgmii" mode and warning is generated that "rgmii-id" should have been
used.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 76 ---
1 file changed, 64 insert
GMII delay block.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 1721f6892b..f9bb925646 100644
--- a/drivers/net/phy/dp83867.c
+++
Refactor SGMII configuration to group all settings together and reduce
number of MDIO transactions.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 75 +++
1 file changed, 36 insertions(+), 39 deletions(-)
diff --git a/drivers/net/phy
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.
Signed-off-by: Grygorii Strashko
---
arch/arm/dt
Move BOOTP_DNS2 and PHY_TI from dra7xx_evm.h to
dra7xx_evm_defconfig.
Signed-off-by: Grygorii Strashko
---
configs/dra7xx_evm_defconfig| 2 ++
configs/dra7xx_hs_evm_defconfig | 2 ++
configs/dra7xx_hs_evm_usb_defconfig | 2 ++
include/configs/dra7xx_evm.h| 2 --
4 files
On 19/11/2019 01:31, Alexandru Marginean wrote:
On 11/18/2019 8:11 PM, Grygorii Strashko wrote:
On 14/11/2019 17:04, Alex Marginean wrote:
Adds an optional mdio-handle property which identifies a MDIO bus which can
be scanned to find the relevant PHY. The property is ignored if phy
On 20/11/2019 06:30, Lokesh Vutla wrote:
On 20/11/19 12:14 AM, Grygorii Strashko wrote:
Move BOOTP_DNS2 and PHY_TI from dra7xx_evm.h to
dra7xx_evm_defconfig.
Signed-off-by: Grygorii Strashko
---
configs/dra7xx_evm_defconfig| 2 ++
configs/dra7xx_hs_evm_defconfig | 2
On 19/11/2019 20:58, Grygorii Strashko wrote:
On 19/11/2019 01:31, Alexandru Marginean wrote:
On 11/18/2019 8:11 PM, Grygorii Strashko wrote:
On 14/11/2019 17:04, Alex Marginean wrote:
Adds an optional mdio-handle property which identifies a MDIO bus which can
be scanned to find the
Move BOOTP_DNS2 and PHY_TI from dra7xx_evm.h to
dra7xx_evm_defconfig.
Signed-off-by: Grygorii Strashko
---
configs/dra7xx_evm_defconfig| 2 ++
configs/dra7xx_hs_evm_defconfig | 2 ++
configs/dra7xx_hs_evm_usb_defconfig | 2 ++
include/configs/dra7xx_evm.h| 2 --
4 files
On 21/11/2019 12:36, Alexandru Marginean wrote:
On 11/20/2019 10:51 AM, Grygorii Strashko wrote:
On 19/11/2019 20:58, Grygorii Strashko wrote:
On 19/11/2019 01:31, Alexandru Marginean wrote:
On 11/18/2019 8:11 PM, Grygorii Strashko wrote:
On 14/11/2019 17:04, Alex Marginean wrote
On 18/11/2019 12:59, Vignesh Raghavendra wrote:
This patch enables networking support for TI's J721e SoC.
Patch 1 adds a new interface to DMA uclass to get channel specific
private/configuration data. Patch 2 to 4 use this interface to pass data
from J721e's UDMA driver to CPSW ethernet driver.
On 21/04/2020 14:48, Dan Murphy wrote:
Michal
On 4/21/20 2:57 AM, Michal Simek wrote:
On 20. 04. 20 20:53, Dan Murphy wrote:
Add a TI Generic init file that will initialize TI PHYs that follow that
not require special handling. These PHYs can connect with the standard
MII register set. Th
W_MACSL_CTL_REG_FULL_DUPLEX;
if (phy->speed == 100)
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
Hi Joe, Tom
On 19/09/2019 11:16, Grygorii Strashko wrote:
Hi All,
This series introduces set of fixes and improvements for TI CPSW and AM654x
CPSW networking drivers.
Patch 1 - Enables support of 10Mbit link speeds for TI CPSW driver.
Patch 3 - Adds support of standard Ethernet "max-spee
); \
}
Thank you.
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
,
.ale_entries= 1024,
- .bd_ram_ofs = 0x2000,
.mac_control= 0x20,
.active_slave = 0,
.mdio_base = 0x4a101000,
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
00644 drivers/dma/ti/k3-psil.c
create mode 100644 drivers/dma/ti/k3-psil.h
delete mode 100644 include/dt-bindings/dma/k3-udma.h
Thank you.
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
On 23/07/2020 11:47, Lokesh Vutla wrote:
Add an api soc_is_j721e(), and use it to enable certain functionality
that is available only on j721e.
Signed-off-by: Lokesh Vutla
Signed-off-by: Suman Anna
---
arch/arm/mach-k3/common.c | 10 ++
arch/arm/mach-k3/include/ma
arch/arm/dts/k3-j7200.dtsi| 6 +-
board/ti/j721e/evm.c | 30
8 files changed, 371 insertions(+), 2 deletions(-)
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
work.
The patch is cleaning this bit when PHYCR value is composed.
Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards.
Fixes: 37d6265f2bfa ("net: phy: dp83867: refactor rgmii configuration")
Signed-off-by: Michal Simek
---
Reviewed-by: Grygorii Strashko
drivers/net/phy/dp83867
On 07/02/2020 13:31, Michal Simek wrote:
There is no reason to check sgmii branch again when it is clear that phy
interface is rgmii.
Signed-off-by: Michal Simek
---
drivers/net/phy/dp83867.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/phy/dp83867.c
Hi Dario,
On 06/09/2020 15:08, Dario Binacchi wrote:
The series was born from the need to manage the PWM backlight of the
display connected to my beaglebone board. To hit the target, I had to
develop drivers for PWM management which in turn relied on drivers for
managing timers and clocks, all
Thank you.
Reviewed-by: Grygorii Strashko
--
Best regards,
grygorii
On 17/09/2020 22:23, Dario Binacchi wrote:
Hi Grygorii,
Il 17/09/2020 08:57 Grygorii Strashko ha scritto:
Hi Dario,
On 06/09/2020 15:08, Dario Binacchi wrote:
The series was born from the need to manage the PWM backlight of the
display connected to my beaglebone board. To hit the
will be out unresponsive next few month due to personal
reasons,
but hope this will be moved forward eventually.
>
> ===
>
> v9: Separate generic dma channels support from bmips enet support
> v8: Sync with latest u-boot.
> v7: From Grygorii Strashko:
> - copyright fixed as
On 08/22/2018 01:08 AM, Janine Hagemann wrote:
> Add the ability to read the phy-handle node of the
> gmac. Upon reading this handle the phy-id
> can be stored based on the reg node in the DT.
>
> The phy-handle also needs to be stored and passed
> to the phy to access any phy data that is avai
net/phy/ti.c| 91 -
include/dt-bindings/net/ti-dp83867.h| 15 +
3 files changed, 108 insertions(+), 1 deletion(-)
Reviewed-by: Grygorii Strashko
But might also want to port commit
252ae53 Documentation: devicetree: Add PHY no l
configs/am335x_evm_defconfig | 1 +
drivers/net/cpsw.c | 29
include/cpsw.h | 1 +
4 files changed, 109 insertions(+)
Reviewed-by: Grygorii Strashko
--
regards,
-grygorii
___
U-Boot mailing list
U-Boot
On 08/28/2018 01:25 AM, Janine Hagemann wrote:
Add the ability to read the phy-handle node of the
gmac. Upon reading this handle the phy-id
can be stored based on the reg node in the DT.
The phy-handle also needs to be stored and passed
to the phy to access any phy data that is available.
Si
Hi All,
I have question about uclass to be used for SoC devices (./drivers/soc/).
Now there is only ./drivers/soc/keystone/keystone_serdes.c which is not DM
converted,
but we are going to add more drivers for SoC specific components soon and
internally I've used UCLASS_MISC for now. Is it accepta
Current implementation of find_next_zero_bit() is incompatible with arm64.
Hence fix it by using BITS_PER_LONG define instead of constants and
use generic ffz() implementation.
Signed-off-by: Grygorii Strashko
---
arch/arm/include/asm/bitops.h | 41 +
1
Fix build with CONFIG_DMA enabled
drivers/mtd/spi/spi_flash.c:376: undefined reference to `dma_memcpy'
Signed-off-by: Grygorii Strashko
---
drivers/mtd/spi/spi_flash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_fl
From: Murali Karicheri
The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
supported (see note below Table 5 (4-Level Strap Pins)).
It further advises that if a board has this pin strapped in mode 1 and
mode 2, then b
dp83867 to use ofnode API.
[1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf
Grygorii Strashko (1):
net: phy: dp83867: switch to use ofnode api
Murali Karicheri (1):
net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap
drivers/net/phy/ti.c | 34
Switch to use more generic ofnode API instead of FDT API.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/ti.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
index f1c9f7b..98c36ab 100644
--- a
linx_phy.c changes only build tested.
Dependency:
This series has dependency from
https://patchwork.ozlabs.org/cover/936370/
due to possible merge conflicts
PS: Not sure if any other Net drivers need to be updated,
at least I've not found any.
Grygorii Strashko (5):
net: phy: add ofnode
Use PHY API phy_get_ofnode() helper to get PHY DT node.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/ti.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
index 98c36ab..d4a7e39 100644
--- a/drivers/net/phy/ti.c
+++ b
Use PHY API phy_get_ofnode() helper to get PHY DT node.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/xilinx_phy.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c
index 004cfcf..3aa8891 100644
rs and used by PHY drivers, so
overwriting can be avoided. Also add helper function phy_get_ofnode()
which will check and return phy_device->node or dev_ofnode(phydev->dev) for
backward compatibility with existing drivers.
Signed-off-by: Grygorii Strashko
---
include/phy.h | 13 +
1
Now zynq_gem driver will overwrite UCLASS_ETH node when PHY is
connected and configured which is not correct.
Use struct phydev->node instead.
Signed-off-by: Grygorii Strashko
---
drivers/net/zynq_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/zynq_gem.
Now CPSW driver will overwrite UCLASS_ETH node when PHY is
connected and configured which is not correct.
Use struct phydev->node instead.
Signed-off-by: Grygorii Strashko
---
drivers/net/cpsw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/cpsw.c b/drivers/
On 07/02/2018 04:10 PM, Joe Hershberger wrote:
On Thu, Jun 28, 2018 at 2:47 PM, Grygorii Strashko
wrote:
Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in
case of Ethernet PHYs which are linked to UCLASS_ETH device using
"phy-handle"
Use PHY API phy_get_ofnode() helper to get PHY DT node.
Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
---
drivers/net/phy/xilinx_phy.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c
index
Now CPSW driver will overwrite UCLASS_ETH node when PHY is
connected and configured which is not correct.
Use struct phydev->node instead.
Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
---
drivers/net/cpsw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
Use PHY API phy_get_ofnode() helper to get PHY DT node.
Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
---
drivers/net/phy/ti.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
index 98c36ab..d4a7e39 100644
--- a
rs and used by PHY drivers, so
overwriting can be avoided. Also add helper function phy_get_ofnode()
which will check and return phy_device->node or dev_ofnode(phydev->dev) for
backward compatibility with existing drivers.
Signed-off-by: Grygorii Strashko
---
Changes in v2:
- struct phy_device->node
Now zynq_gem driver will overwrite UCLASS_ETH node when PHY is
connected and configured which is not correct.
Use struct phydev->node instead.
Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
---
drivers/net/zynq_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
nx_phy.c changes only build tested.
Changes in v2:
- struct phy_device->node field initialization added to phy_device_create()
Dependency:
This series has dependency from
https://patchwork.ozlabs.org/cover/936370/
due to possible merge conflicts
PS: Not sure if any other Net drivers need t
On 07/06/2018 05:10 AM, Siva Durga Prasad Paladugu wrote:
This patch adds support for livetree by using
dev_.. calls instead of fdtdec_..
Signed-off-by: Siva Durga Prasad Paladugu
---
drivers/net/phy/ti.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/
On 07/06/2018 05:10 AM, Siva Durga Prasad Paladugu wrote:
This patch adds support for livetree by using dev_..
calls instead of fdtdec_.. .
Signed-off-by: Siva Durga Prasad Paladugu
---
drivers/net/phy/xilinx_phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/dri
On 07/16/2018 03:56 AM, Jagan Teki wrote:
> On Fri, Jun 29, 2018 at 12:56 AM, Grygorii Strashko
> wrote:
>> Fix build with CONFIG_DMA enabled
>> drivers/mtd/spi/spi_flash.c:376: undefined reference to `dma_memcpy'
>>
>> Signed-off-by: Grygorii Strashko
>
On 07/18/2018 03:46 AM, Janine Hagemann wrote:
The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
supported (see note below Table 5 (4-Level Strap Pins)).
There are some boards which have the pin strapped this way
On 07/18/2018 03:46 AM, Janine Hagemann wrote:
- Remove 0004-Net-phy-ti-Fix-fifo_depth-register-write.patch because
of the change from 0005-net-phy-ti-Recover-from-port-mirroring-
N-A-MODE4.patch it isn't needed anymore. Before, the MII_DP83867_
PHYCTRL-register wasn't write correctly
On 07/18/2018 03:46 AM, Janine Hagemann wrote:
> Add the ability to read the phy-handle node of the
> gmac. Upon reading this handle the phy-id
> can be stored based on the reg node in the DT.
>
> The phy-handle also needs to be stored and passed
> to the phy to access any phy data that is avai
On 07/23/2018 04:29 AM, Janine Hagemann wrote:
Unfortunately the v1-patches were only send to the maintainers and not
to the official mailinglist.
Could you separate "net: phy: ti: " patches in standalone series pls?
[...]
--
regards,
-grygorii
__
From: Álvaro Fernández Rojas
Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.
Reviewed-by: Simon Glass
Signed-off-by: Álvaro Fernández Rojas
---
drivers/dma/dma-uclass.c | 2 +-
drivers/dma/ti-edma
cket*/
- return buffer back to DAM channel
ret = dma_prepare_rcv_buf(&dma_rx,
net_rx_packets[rx_next],
RX_BUF_SIZE);
Grygorii Strashko (2):
test: dma: add dma-uclass test
net: ethernet: ti: introduc
Add a sandbox DMA driver implementation (provider) and corresponding DM
test.
Signed-off-by: Grygorii Strashko
---
arch/sandbox/dts/test.dts | 8 ++
configs/sandbox_defconfig | 3 +
drivers/dma/Kconfig| 7 +
drivers/dma/Makefile | 1 +
drivers/dma/sandbox
From: Vignesh R
Add support for K3 AM65x UDMA with only support pktmode MEM_TO_MEM
transfers and DEV_TO_MEM/MEM_TO_DEV through DMA channels.
Signed-off-by: Peter Ujfalusi
Signed-off-by: Vignesh R
Signed-off-by: Grygorii Strashko
---
drivers/dma/Kconfig |2 +
drivers/dma
()
dma_prepare_rcv_buf()
dma_receive()
dma_send()
Signed-off-by: Álvaro Fernández Rojas
[grygorii.stras...@ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(),
minor clean up]
Signed-off-by: Grygorii Strashko
---
drivers/dma/Kconfig | 7
internal Communications
Port Programming Interface (CPPI) port (Host port 0).
Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX
channels and 8 RX channels operating by TI am654 NAVSS Unified DMA
Peripheral Root Complex (UDMA-P) controller.
Signed-off-by: Grygorii Strashko
Update TI CPSW driver to re-use common mdio lib
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/cpsw.c | 134 +++---
1 file changed, 6 insertions(+), 128 deletions(-)
diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c
index fe43d14
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
drivers.
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/Makefile| 2 +-
drivers/net/ti/cpsw_mdio.c | 205
Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.
Signed-off-by: Grygorii Strashko
---
arch/arm/mach-davinci/dp83848.c | 2 +-
arch/arm/mach-davinci/et1011c.c | 2 +-
arch/arm/mach-davinci/ksz8873.c | 2 +-
arch/arm/mach-davinci/lxt
Update TI Keystone 2 driver to re-use common mdio lib.
Signed-off-by: Grygorii Strashko
---
arch/arm/include/asm/ti-common/keystone_net.h | 13 ---
drivers/net/ti/Makefile | 2 +-
drivers/net/ti/keystone_net.c | 118 --
3 files
Convert DRIVER_TI_KEYSTONE_NET to Kconfig.
Signed-off-by: Grygorii Strashko
---
configs/k2e_evm_defconfig| 1 +
configs/k2e_hs_evm_defconfig | 1 +
configs/k2g_evm_defconfig| 1 +
configs/k2g_hs_evm_defconfig | 1 +
configs/k2hk_evm_defconfig
Update to use SPDX license identifier.
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/cpsw.c | 12 ++--
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c
index 8e2a48c..fe43d14 100644
--- a/drivers/net/ti/cpsw.c
+++ b
Networking support for all TI K2 boards converted to use DM model and
CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop
unused non DM K2 networking code.
Signed-off-by: Grygorii Strashko
---
arch/arm/include/asm/ti-common/keystone_net.h | 14 --
board/ti/ks2_evm/board.c
be
re-worked to use common TI MDIO support library and network PHYs framework.
Unfortunately, I have no HW to work with.
Grygorii Strashko (7):
driver: net: consolidate ti's code in separate folder
configs: net: convert DRIVER_TI_KEYSTONE_NET kconfig
drivers: net: keystone_net: drop n
On 10/29/18 2:40 PM, Joe Hershberger wrote:
On Mon, Oct 29, 2018 at 8:04 AM Hannes Schmelzer wrote:
On 10/26/18 5:38 AM, Grygorii Strashko wrote:
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
Update to use SPDX license identifier.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/cpsw.c | 12 ++--
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c
index 8e2a48c
Update TI CPSW driver to re-use common mdio lib
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/cpsw.c | 134 +++---
1 file changed, 6 insertions(+), 128 deletions(-)
diff --git a/drivers/net/ti
Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
arch/arm/mach-davinci/dp83848.c | 2 +-
arch/arm/mach-davinci/et1011c.c | 2 +-
arch/arm/mach-davinci/ks
Update TI Keystone 2 driver to re-use common mdio lib.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
arch/arm/include/asm/ti-common/keystone_net.h | 13 ---
drivers/net/ti/Makefile | 2 +-
drivers/net/ti/keystone_net.c
delay, mdio_free
TODO: TODO: As per code and documentation davinci_emac.c seems also can be
re-worked to use common TI MDIO support library and network PHYs framework.
Unfortunately, I have no HW to work with.
Grygorii Strashko (7):
driver: net: consolidate ti's code in separate folder
co
Convert DRIVER_TI_KEYSTONE_NET to Kconfig.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
configs/k2e_evm_defconfig| 1 +
configs/k2e_hs_evm_defconfig | 1 +
configs/k2g_evm_defconfig| 1 +
configs/k2g_hs_evm_defconfig
Networking support for all TI K2 boards converted to use DM model and
CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop
unused non DM K2 networking code.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
arch/arm/include/asm/ti-common
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
drivers.
Reviewed-by: Tom Rini
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/Makefile| 2 +-
drivers/net/ti/cpsw_mdio.c | 201
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
drivers.
Reviewed-by: Tom Rini
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/Makefile| 2 +-
drivers/net/ti/cpsw_mdio.c | 203
Networking support for all TI K2 boards converted to use DM model and
CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop
unused non DM K2 networking code.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
arch/arm/include/asm/ti-common
Update TI CPSW driver to re-use common mdio lib
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/cpsw.c | 134 +++---
1 file changed, 6 insertions(+), 128 deletions(-)
diff --git a/drivers/net/ti
Update TI Keystone 2 driver to re-use common mdio lib.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
arch/arm/include/asm/ti-common/keystone_net.h | 13 ---
drivers/net/ti/Makefile | 2 +-
drivers/net/ti/keystone_net.c
Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
Signed-off-by: Grygorii Strashko
---
arch/arm/mach-davinci/dp83848.c | 2 +-
arch/arm/mach-davinci/et1011c.c | 2 +-
arch/arm/mach-davinci/ks
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