a random value instead of NULL to start off,
so it isn't called and adma_addr is not populated correctly?
Thanks,
Greg
--
Greg Malysa
Timesys Corporation
of the v4
support? What about mirroring the kernel's dynamic behavior by
checking the combination of capabilities and control registers to
figure out which mode to use rather than hardcoding it?
--
Greg Malysa
Timesys Corporation
On Tue, Apr 30, 2024 at 3:42 AM Francesco Dolcini wrote:
>
> On Mon, Apr 29, 2024 at 03:39:53PM -0500, Judith Mendez wrote:
> > A patch in this series caused a regression for AM62x SK with the
> > following error:
>
> +1, this affects also Verdin AM62.
Hi, please try
https://patchwork.ozlabs.org
> >
> > If you have access to the hardware that has a 4.20a dwc2 controller,
> > maybe you can help testing the patch above patch as well?
My hardware unfortunately only has a 4.00a controller so I cannot test
the 4.20a reset functionality. However, Kongyang Liu's patch works for
me as a replaceme
-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Greg Malysa
---
---
MAINTAINERS| 1 +
drivers/pinctrl/Kconfig| 8 ++
drivers/pinctrl/Makefile | 1
Signed-off-by: Arturs Artamonovs
Signed-off-by: Greg Malysa
---
MAINTAINERS | 1 +
drivers/gpio/Kconfig | 9 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/gpio-adi-adsp.c | 179 +++
4 files changed, 190 insertions(+)
create
From: Nathan Barrett-Morrison
This adds support for the ADP588 GPIO expander from Analog Devices. It
is accessed over I2C and provides up to 18 pins. It is largely a port of
the Linux driver developed by Michael Hennerich
Signed-off-by: Ian Roberts
Signed-off-by: Greg Malysa
Signed-off-by
From: Nathan Barrett-Morrison
This adds support for the MUSB-based USB controller found in the
Analog Devices SC57x and SC58x SoCs.
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Angelo Dureghello
Signed-off-by: Angelo Dureghello
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by
: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Greg Malysa
---
MAINTAINERS | 1 +
drivers/net/Kconfig | 7 +++
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c | 6 ++
drivers/net
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Greg Malysa
---
MAINTAINERS | 1 +
drivers/dma/Kconfig | 7 ++
drivers/dma/Makefile | 1 +
drivers/dma/adi_dma.c | 255 ++
4
time through the U-Boot interface.
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Piotr Wojtaszczyk
Signed-off-by: Piotr Wojtaszczyk
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off
Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Angelo Dureghello
Signed-off-by: Angelo Dureghello
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Piotr Wojtaszczyk
Signed-off-by: Piotr Wojtaszczyk
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Nathan Barrett-Morrison
at times and currently passes CI.
Greg Malysa (4):
pinctrl: Add support for ADI SC5XX-family pinctrl
gpio: Add support for SC5XX-family processor GPIO driver
net: Add support for ADI SC5xx SoCs with DWC QoS ethernet
dma: Add driver for ADI SC5xx-family SoC MDMA functionality
Nathan
Configure the BAR - discover bank cmds and read current bank */
> nor->addr_width = 3;
> + set_4byte(nor, info, 0);
> ret = read_bar(nor, info);
> if (ret < 0)
> return ret;
> --
> 2.37.6
>
Thanks,
Greg
--
Greg Malysa
Timesys Corporation
orithm doesn't appear to re-calibrate the read capture
delay register, which is required whenever the clock or IO mode
changes.
At Timesys we have a set of patches that implement DDR and PHY
calibration for the same Cadence IP that presents different solutions
to the above issues. However, our
From: Ian Roberts
ISSI IS25*x series SPIflash chips are capable of Octal IO and DDR.
Add spi-nor support to enable and operate in these modes.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
drivers
From: Ian Roberts
The Cadence octal SPI IP read instruction register requires a bit to be
set to indicate if the read opcode is a compliant DDR read command.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
drivers/spi/cadence_qspi.h | 1 +
drivers/spi/cadence_qspi_apb.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
index 72e92cc997
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
drivers/spi/cadence_qspi_apb.c | 66 +-
1 file changed, 49 insertions(+), 17 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi
read commands and all enabled fast IO modes.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
---
doc/device-tree-bindings/spi/spi-bus.txt | 4 +
drivers/mtd/spi/Kconfig | 12
this feature for now.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
drivers/spi/cadence_qspi_apb.c | 46 ++
1 file changed, 24 insertions(+), 22 deletions(-)
diff --git a
From: Ian Roberts
It is not possible to configure the Cadence SPI IP block to use a zero
length address in DMA read or write commands.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
drivers/spi
added later for platforms that need it.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
drivers/spi/cadence_qspi.c | 47
drivers/spi/cadence_qspi.h | 31 +--
drivers/spi
-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
doc/device-tree-bindings/spi/spi-cadence.txt | 2 ++
drivers/spi/cadence_qspi.c | 9 -
drivers/spi/cadence_qspi.h | 2 ++
3 files changed, 12 insertions(+), 1
Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
drivers/spi/cadence_qspi.c | 6 ++
drivers/spi/cadence_qspi.h | 1 -
drivers/spi/cadence_qspi_apb.c | 27 ---
3 files changed, 14 insertions
: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
doc/device-tree-bindings/spi/spi-cadence.txt | 9 +
drivers/spi/cadence_qspi.c | 392 +--
drivers/spi/cadence_qspi.h | 77 ++--
drivers/spi/cadence_qspi_apb.c
This series introduces support for DTR mode for the Cadence QSPI/OSPI
IP. We have been developing it against the SC594/SC598 from ADI, so
there are some limitations specific to our hardware's capabilities.
Ideally this series could be enhanced with features introduced in a
patch series submitted
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Nathan Barrett-Morrison
From: Nathan Barrett-Morrison
This adds support for the SC5XX clock trees which are required for reading
clock speeds on the SoCs. This is largely a port of the same support for
Linux, which has not yet been submitted upstream.
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co
This series adds support for the ADI SC5xx machine type and includes two
core drivers that are required for being able to boot any board--a UART
driver and the clock tree driver. Our corresponding Linux support relies
on u-boot configuring the clocks correctly before booting, so it is not
possibl
reused by all boards
- Early initialization for system clocks and DDR controller
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
on
them--possibly it was just necessary for the initial set of init code
we started with. I believe we're not using the mach type constants
anywhere so that will be straightforward to drop as well.
Thanks,
Greg
On Thu, Apr 11, 2024 at 7:58 PM Tom Rini wrote:
>
> On Thu, Apr 11, 2024 a
I'm afraid I have to admit I don't know. I'll work with our IT team to
make sure we can run CI locally, and when v2 comes around the answer
will be yes.
On Thu, Apr 11, 2024 at 7:52 PM Tom Rini wrote:
>
> On Thu, Apr 11, 2024 at 07:37:27PM -0400, Greg Malysa wrote:
>
Hi Mattijs,
> Please avoid top-posting when replying, it makes following the
> discussion more difficult:
> https://www.kernel.org/doc/html/latest/process/submitting-patches.html#use-trimmed-interleaved-replies-in-email-discussions
Will do. Sorry about that; I'm still learning about this approach
y.
There is no CONFIG_SPL_SDHCI_ADMA_HELPERS so CONFIG_IS_ENABLED fails
while building the SPL version of sdhci-adma.o as the structure
definition is different. This only appears on platforms which have
CONFIG_SPL_MMC enabled, which our platform did not, so I missed this
interaction earlier. I apologize for this mistake.
This will be fixed in v2 by changing the #if back to #ifdef
CONFIG_MMC_SDHCI_ADMA_HELPERS, which I will submit after CI finishes
running to verify on all platforms.
Thanks,
Greg
--
Greg Malysa
Timesys Corporation
developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
Changes in v2:
- Switch from #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) to #ifdef
CONFIG_MMC_SDHCI_ADMA_HELPERS, as CONFIG_I
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Co-developed-by: Angelo Dureghello
Signed-off-by: Angelo Dureghello
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Greg Malysa
---
Changes in v2:
- Added gptimer driver to this series
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Nathan Barrett-Morrison
---
(no
From: Nathan Barrett-Morrison
This adds support for the SC5XX clock trees which are required for reading
clock speeds on the SoCs. This is largely a port of the same support for
Linux, which has not yet been submitted upstream.
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co
iewed #include usage and pruned unnecessary files
- Passes gitlab CI run locally
- Added gptimer driver to this series because a minimal system can't
boot without it
Greg Malysa (1):
drivers: timer: Add in driver support for ADI SC5XX-family GP timer
peripheral
Nathan Barrett-Morrison (
reused by all boards
- Early initialization for system clocks and DDR controller
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
did not need to be updated
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Ian Roberts
Signed-off-by: Greg Malysa
---
Kconfig | 9 -
Makefile | 2 +-
scripts/Makefile.spl | 5 +
3 files changed, 14 insertions
did not need to be created.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Ian Roberts
Signed-off-by: Greg Malysa
---
Changes in v2:
- Add HAS_LDR prerequisite to avoid prompting for LDR_CPU on unrelated
platforms
- Fixed accidentally moving
developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
---
drivers/mmc/fsl_esdhc.c | 2 +-
drivers/mmc/sdhci-adma.c | 41 +++-
drivers/mmc/sdhci.c | 8 +---
includ
transaction larger than
actual_max_transfer is issued.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by: Greg Malysa
Signed-off-by: Ian Roberts
---
---
include/sdhci.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/include
number of platforms
where these statements are not equivalent.
Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
From: Nathan Barrett-Morrison
This adds the Synopsys device id for version 4xx of the designware
IP block and extends the version check to include it to permit
new hardware to run. It does not add any 4xx-specific features.
Signed-off-by: Ian Roberts
Signed-off-by: Greg Malysa
Signed-off-by
spective subsystem maintainers, but
it seems rude to have a 20-element patch series that gets resubmitted
each time feedback comes in for one component. If we break it down
into separate patches for each piece, what would be the best way to
ensure that all of the dependencies are merged in order?
50 AM Marek Vasut wrote:
>
> On 3/26/24 3:32 AM, Greg Malysa wrote:
> > From: Nathan Barrett-Morrison
> >
> > This adds the Synopsys device id for version 4xx of the designware
> > IP block and extends the version check to include it to permit
> > new hardware
Hi Vas,
Last time this series was submitted we received some good feedback from
Christophe
(https://patchwork.ozlabs.org/project/uboot/patch/20240515215837.14028-11-greg.mal...@timesys.com/),
but I don't see the changes applied (or justifications for why they should not
be applied). Let's get
Signed-off-by: Greg Malysa
---
(no changes since v1)
MAINTAINERS | 2 +
.../pinctrl/adi,adsp-pinctrl.yaml | 73 +++
include/dt-bindings/pinctrl/adi-adsp.h| 21 ++
3 files changed, 96 insertions(+)
create mode 100644 doc
Changes in v2:
- Clean up some whitespace errors
- Modify Kconfigs to reflect changes to mach-sc5xx/Kconfig
Greg Malysa (5):
pinctrl: Add support for ADI SC5XX-family pinctrl
doc: Add dt-bindings and descriptions for ADI SC5xx-family pinctrl
gpio: Add support for SC5XX-family processor GPIO driver
Signed-off-by: Arturs Artamonovs
Signed-off-by: Oliver Gaskell
Signed-off-by: Greg Malysa
---
(no changes since v1)
MAINTAINERS | 1 +
drivers/gpio/Kconfig | 9 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/gpio-adi-adsp.c | 179
-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Oliver Gaskell
Signed-off-by: Greg Malysa
---
Changes in v3:
- Add check if PORT peripheral base address was mapped successfully
Changes in v2:
- Clean up some
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Greg Malysa
Signed-off-by: Oliver Gaskell
---
Changes in v3:
- replace readl/writel with ioread32 and iowrite32 and friends
MAINTAINERS | 1 +
drivers/dma/Kconfig | 7
time through the U-Boot interface.
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Piotr Wojtaszczyk
Signed-off-by: Piotr Wojtaszczyk
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Angelo Dureghello
Signed-off-by: Angelo Dureghello
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Oliver Gaskell
Signed-off-by
From: Nathan Barrett-Morrison
This adds support for the MUSB-based USB controller found in the
Analog Devices SC57x and SC58x SoCs.
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Oliver Gaskell
Signed-off-by
From: Nathan Barrett-Morrison
This adds support for the ADP588 GPIO expander from Analog Devices. It
is accessed over I2C and provides up to 18 pins. It is largely a port of
the Linux driver developed by Michael Hennerich
Signed-off-by: Ian Roberts
Signed-off-by: Greg Malysa
Signed-off-by
Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Angelo Dureghello
Signed-off-by: Angelo Dureghello
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Piotr Wojtaszczyk
Signed-off-by: Piotr Wojtaszczyk
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed
: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Oliver Gaskell
Signed-off-by: Greg Malysa
---
Changes in v3:
- replace readl/writel with ioread32 and iowrite32 and friends
- update for compatibility with changes to dwc qos driver between
My previous address is no longer accessible, but I will continue to be
involved in maintaining the ADI sc5xx platforms. This updates my contact
information to avoid bouncing emails from other developers.
Signed-off-by: Greg Malysa
---
.mailmap| 1 +
MAINTAINERS | 2 +-
2 files changed, 2
The sc5xx machine code includes implementations of board_init and
board_early_init_f which should not be included in the base soc support
code, as they should be implemented by a board where necessary.
This removes the default empty implementations of both from mach-sc5xx.
Signed-off-by: Greg
My previous address is no longer accessible, but I will continue to be
involved in maintaining the ADI sc5xx platforms. This updates my contact
information and hopefully avoids bouncing emails from other developers.
Signed-off-by: Greg Malysa
---
Changes in v2:
- Fix missing > at the end of
The arm library includes an implementation of bss_clear that is already
called from crt0.S. This re-clearing of BSS should not be performed in
the machine code and should therefore be removed.
Signed-off-by: Greg Malysa
---
arch/arm/mach-sc5xx/soc.c | 26 --
1 file
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