[U-Boot] AM335x: enabling datacache in SPL slows down system?

I'm trying to optimize the boottime for an AM335x based board. Currently we're loading the kernel from SPL directly (falcon mode). Loading the kernel from flash to ram takes roughly 3 seconds. When doing this from U-boot itself with 'nand read .., it only takes 1.8 seconds. It seems that U-boot ha

Re: [U-Boot] AM335x: enabling datacache in SPL slows down system?

Hi Jeroen, After debugging a bit more, I found that in our code, we didn't set the RAM size correctly (so no real RAM section was setup for caching). Fixing this fixed our time to 2.4 seconds (U-boot still took 1.8 sec). Adding your SRAM patch (modified, since AM335x has more SRAM), The load time

[U-Boot] [PATCH] ARM: FIX for dcache_disable() for ARM926ej-s

the cache also needs to be invalidated, not just flushed, Since re-enabling it, can cause inconsistent data without invalidation. Signed-off-by: Bas van den Berg --- arch/arm/lib/cache.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/lib/cache.c b/arch/arm

[U-Boot] [PATCH] FIX for dcache_disable() for ARM926ej-s

the cache also needs to be invalidated, not just flushed, Since re-enabling it, can cause inconsistent data without invalidation. See example below. in c-file: static int num = 1; void test() { num = 1; dcache_enable(); printf("Cache on, num=%d\n", num); num = 2; dcache_disabl