Re: [U-Boot] [PATCH v2 2/9] riscv: import the supervisor binary interface header file

2019-03-06 Thread Atish Patra
BI_REMOTE_SFENCE_VMA, hart_mask); +} + +static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, + unsigned long start, + unsigned long size, + unsigned long asid) +{

Re: [U-Boot] [PATCH v2 3/9] riscv: implement IPI platform functions using SBI

2019-03-06 Thread Atish Patra
+ */ + +#include +#include + +int riscv_send_ipi(int hart) +{ + ulong mask; + + mask = 1UL << hart; + sbi_send_ipi(&mask); + + return 0; +} + +int riscv_clear_ipi(int hart) +{ + sbi_clear_ipi(); + + return 0; +} LGTM. Reviewed-by: Atish Patra Rega

Re: [U-Boot] [PATCH v2 7/9] riscv: do not rely on hart ID passed by previous boot stage

2019-03-06 Thread Atish Patra
@@ .section .text .globl _start _start: +#ifdef CONFIG_RISCV_MMODE + csrra0, mhartid +#endif + /* save hart id and dtb pointer */ mv s0, a0 mv s1, a1 Reviewed-by: Atish Patra Regards, Atish ___ U-Boot

Re: [U-Boot] [PATCH] qemu-riscv64_smode, sifive-fu540: fix extlinux (define preboot)

2019-08-28 Thread Atish Patra
On Wed, 2019-08-21 at 12:07 -0700, David Abdurachmanov wrote: > Commit 37304aaf60bf92a5dc3ef222ba520698bd862a44 removed preboot > commands in RISC-V targets and broke extlinux support as reported > by Fu Wei . > > The patch finishes migration of CONFIG_USE_PREBOOT and CONFIG_REBOOT > to Kconfig. >

[U-Boot] FDT placement in OpenSBI + U-Boot + Linux kernel issue for RISC-V

2019-09-08 Thread Atish Patra
Hi All, I noticed following issues around U-Boot fdt location in Unleashed and Qemu virt machine. OpenSBI copies the FDT to following addresses for respective platforms Qemu: 0x8220 Unleashed: 0x8800 As CONFIG_PRIOR_STAGE is set for both platforms, fdt is first copied to

Re: [U-Boot] FDT placement in OpenSBI + U-Boot + Linux kernel issue for RISC-V

2019-09-10 Thread Atish Patra
to fdt_addr_r 2. setenv fdt_addr $fdt_addr_r In this way, U-Boot will not have any direct dependancies on OpenSBI. As long as U-Boot is configured with a fdt_addr_r, it should work. It will be still valid for loading fdt from tftp server to fdt_addr_r as well. > * Scenario 3: fdt blob i

[U-Boot] [PATCH] RISC-V: Align boot image header with Linux.

2019-10-08 Thread Atish Patra
header, there is no compatibility issue between new U-boot (with this patch) and older kernel. Signed-off-by: Atish Patra --- arch/riscv/lib/image.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c index d063beb7dfbe

[U-Boot] [U-Boot PATCH v2] RISC-V: Align boot image header with Linux

2019-10-09 Thread Atish Patra
header, there is no compatibility issue between new U-Boot (with this patch) and older kernel. Signed-off-by: Atish Patra --- arch/riscv/lib/image.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c index d063beb7dfbe

Re: [U-Boot] [PATCH] RISC-V: Align boot image header with Linux.

2019-10-09 Thread Atish Patra
On Wed, 2019-10-09 at 09:47 +0800, Bin Meng wrote: > On Wed, Oct 9, 2019 at 9:15 AM Atish Patra > wrote: > > nits: please remove the ending period in the commit summary > > > The release linux boot image header in v5.3 is different from the > > nits: Linux > &g

[U-Boot] [RFC/RFT U-Boot PATCH] image: Add Image.gz parsing support in booti.

2019-10-10 Thread Atish Patra
two additional environment variables kernel_gz_addr_r and kernel_gz_size to make Image.gz work. Tested on HiFive Unleashed and Qemu for RISC-V. Signed-off-by: Atish Patra --- I could not test this patch on any ARM64 devices due to lack of access to any ARM64 board. If anybody can test it on ARM64

Re: Status of the various RISC-V specification and policy

2021-09-28 Thread Atish Patra
On Tue, Sep 28, 2021 at 11:34 AM Palmer Dabbelt wrote: > > On Mon, 27 Sep 2021 08:57:15 PDT (-0700), markhimelst...@riscv.org wrote: > > the words in this document : > > > > https://wiki.riscv.org/plugins/servlet/mobile?contentId=13098230#content/view/13098230 > > > > make it very clear when chang

Re: Status of the various RISC-V specification and policy

2021-09-28 Thread Atish Patra
On Tue, Sep 28, 2021 at 3:43 PM Palmer Dabbelt wrote: > > On Tue, 28 Sep 2021 13:05:53 PDT (-0700), ati...@atishpatra.org wrote: > > On Tue, Sep 28, 2021 at 11:34 AM Palmer Dabbelt wrote: > >> > >> On Mon, 27 Sep 2021 08:57:15 PDT (-0700), markhimelst...@riscv.org wrote: > >> > the words in this

Re: [U-Boot] [RFC/RFT PATCH v4 3/3] image: Add compressed Image parsing support in booti.

2019-11-22 Thread Atish Patra
On Wed, 2019-11-13 at 11:47 -0800, Atish Patra wrote: > On Wed, 2019-11-13 at 15:36 +0200, David Abdurachmanov wrote: > > On Sat, Nov 9, 2019 at 2:14 AM Atish Patra > > wrote: > > > Add compressed Image parsing support so that booti can parse both > > > flat a

Re: [PATCH v2 5/7] riscv: dts: Add device tree for Microchip Icicle Kit

2020-10-26 Thread Atish Patra
On Mon, Oct 26, 2020 at 6:14 AM Bin Meng wrote: > > On Thu, Oct 22, 2020 at 3:23 PM Padmarao Begari > wrote: > > > > Add device tree for Microchip PolarFire SoC Icicle Kit. > > > > Signed-off-by: Padmarao Begari > > --- > > arch/riscv/dts/Makefile | 1 + > > arch/riscv/dt

Re: [PATCH] riscv: Fix efi header for RV32

2020-11-12 Thread Atish Patra
On Wed, Nov 11, 2020 at 12:26 AM Leo Liang wrote: > > Hi Atish and Heinrich, > > On Tue, Oct 13, 2020 at 12:23:31PM -0700, Atish Patra wrote: > > RV32 should use PE32 format instead of PE32+ as the efi header format. > > This requires following changes > > 1. A diff

Re: [PATCH v3 5/7] riscv: dts: Add device tree for Microchip Icicle Kit

2020-11-12 Thread Atish Patra
On Tue, Nov 10, 2020 at 5:40 AM Bin Meng wrote: > > On Tue, Nov 10, 2020 at 6:46 PM Padmarao Begari > wrote: > > > > Add device tree for Microchip PolarFire SoC Icicle Kit. > > > > Signed-off-by: Padmarao Begari > > Reviewed-by: Anup Patel > > --- > > arch/riscv/dts/Makefile

Re: [PATCH 2/2] riscv: Enable CONFIG_OF_BOARD_FIXUP by default

2020-06-02 Thread Atish Patra
On Mon, Jun 1, 2020 at 11:51 PM Rick Chen wrote: > > Hi Bin > > Bin Meng 於 2020年6月2日 週二 下午2:33寫道: > > > > Hi Rick, > > > > On Tue, Jun 2, 2020 at 2:16 PM Rick Chen wrote: > > > > > > Hi Bin > > > > > > Bin Meng 於 2020年6月2日 週二 下午2:13寫道: > > > > > > > > Hi Rick, > > > > > > > > On Tue, Jun 2, 202

Re: [PATCH v2 2/3] riscv: Expand the DT size before copy reserved memory node

2020-06-02 Thread Atish Patra
On Thu, May 28, 2020 at 1:47 AM Bin Meng wrote: > > From: Bin Meng > > The FDT blob might not have sufficient space to hold a copy of > reserved memory node. Expand it before the copy. > > Reported-by: Rick Chen > Signed-off-by: Bin Meng > --- > > arch/riscv/lib/fdt_fixup.c | 6 ++ > 1 fil

Re: [PATCH 2/2] riscv: Enable CONFIG_OF_BOARD_FIXUP by default

2020-06-02 Thread Atish Patra
On Mon, Jun 1, 2020 at 11:51 PM Rick Chen wrote: > > Hi Bin > > Bin Meng 於 2020年6月2日 週二 下午2:33寫道: > > > > Hi Rick, > > > > On Tue, Jun 2, 2020 at 2:16 PM Rick Chen wrote: > > > > > > Hi Bin > > > > > > Bin Meng 於 2020年6月2日 週二 下午2:13寫道: > > > > > > > > Hi Rick, > > > > > > > > On Tue, Jun 2, 202

Re: [PATCH 2/2] riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01

2020-06-02 Thread Atish Patra
; > To: Rick Jian-Zhi Chen(陳建志); U-Boot Mailing List > > > > Cc: Atish Patra; Bin Meng > > > > Subject: [PATCH 2/2] riscv: sbi: Move sbi_probe_extension() out of > > > > CONFIG_SBI_V01 > > > > > > > > From: Bin Meng > > > >

RISC-V MC schedule is out

2021-09-16 Thread Atish Patra
The official schedule RISC-V MC at Plumbers is available now. https://linuxplumbersconf.org/event/11/sessions/114/#20210921 We have many interesting topics that will be discussed including the following draft specifications. [1] RISC-V Platform specification (https://github.com/riscv/riscv-platfor

Re: [PATCH] riscv: Fix setting no-map in reserved memory nodes

2021-09-17 Thread Atish Patra
if (fdt_getprop(src, node, "no-map", NULL)) { > rmem_offset = fdt_node_offset_by_phandle(dst, > phandle); > fdt_setprop_empty(dst, rmem_offset, "no-map"); > } > -- > 2.31.1 > Thanks for catching it. Reviewed-by: Atish Patra -- Regards, Atish

Status of the various RISC-V specification and policy

2021-09-21 Thread Atish Patra
Hi All, Please find the below email from Stephano about the freeze announcement for various RISC-V specifications that will be part of privilege specification v1.12. All the review discussions are happening in the isa-dev mailing list. The review period will be open for 45 days ending Sunday Octobe

CFP open for RISC-V MC at Linux Plumbers Conference 2023

2023-06-19 Thread Atish Patra
The CFP for topic proposals for the RISC-V micro conference[1] 2023 is open now. Please submit your proposal before it's too late! The Linux plumbers event will be both in person and remote (hybrid)virtual this year. More details can be found here [2]. We will start accepting proposals after 15th

Re: CFP open for RISC-V MC at Linux Plumbers Conference 2023

2023-06-26 Thread Atish Patra
On Mon, Jun 26, 2023 at 9:08 PM Drew Fustini wrote: > > On Mon, Jun 19, 2023 at 12:55:39PM -0700, Atish Patra wrote: > > The CFP for topic proposals for the RISC-V micro conference[1] 2023 is open > > now. > > Please submit your proposal before it's too late! > &g

Re: [PATCH v3] dt-bindings: riscv: deprecate riscv,isa

2023-06-26 Thread Atish Patra
new property allows us to assign explicit meanings on a per vendor > > extension basis, backed up by a description of their meanings. > > How are vendor extension names allocated? Will any proposed name for a > vendor extension pass through linux-riscv@ before it shows up in the wil

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