× 25GE
4 × 10GE
Currently added support and tested below configurations in the driver:
4 × 25GE
4 × 10GE
Ashok Reddy Soma (3):
net: ethtool: Add ethernet speed macros for higher speeds
net: xilinx: axi_mrmac: Add MRMAC driver
xilinx: versal: Enable Xilinx AXI MRMAC
MAINTAINERS
and 25G on all 4 ports.
Signed-off-by: Ashok Reddy Soma
---
MAINTAINERS| 1 +
drivers/net/Kconfig| 9 +
drivers/net/Makefile | 1 +
drivers/net/xilinx_axi_mrmac.c | 525 +
drivers/net/xilinx_axi_mrmac.h | 192
Hi Simon,
Thanks for the review. I will address the review points and send V2.
Thanks,
Ashok
> -Original Message-
> From: Simon Glass
> Sent: Sunday, June 27, 2021 12:02 AM
> To: Ashok Reddy Soma
> Cc: U-Boot Mailing List ; Joe Hershberger
> ; Ramon Fried ; Mi
> -Original Message-
> From: Ramon Fried
> Sent: Monday, June 28, 2021 10:43 PM
> To: Michal Simek ; Simon Glass
> Cc: Ashok Reddy Soma ; U-Boot Mailing List b...@lists.denx.de>; Joe Hershberger ; Michal
> Simek ; git ;
> somaashokre...@gmail.com
> Subject:
Add speed macro's for higher ethernet speeds to be used in u-boot
networking drivers. Added Macros for speeds 14G, 20G, 25G, 40G, 50G,
56G, 100G and 200G inline with linux.
Signed-off-by: Ashok Reddy Soma
Reviewed-by: Simon Glass
Acked-by: Ramon Fried
---
(no changes since v1)
include/
Enable Xilinx AXI MRMAC for Versal platforms.
Signed-off-by: Ashok Reddy Soma
Reviewed-by: Simon Glass
---
(no changes since v1)
configs/xilinx_versal_virt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/xilinx_versal_virt_defconfig
b/configs
stead of 1 or -1
- Changed return type of isrxready() from int to bool
- Changed all printf's to log_warning, and debug to log_debug
- Added function headers with desciption
- Changed all capital hex numbers to small hex numbers
Ashok Reddy Soma (3):
net: ethtool: Add ethernet speed
and 25G on all 4 ports.
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- Changed all static allocations to dynamic and freed them.
- Used setbits_le32 and clrbits_le32 wherever applicable
- All return's are changed to proper error codes instead of 1 or -1
- Changed return type of isrx
and 25G on all 4 ports.
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- Changed all static allocations to dynamic and freed them.
- Used setbits_le32 and clrbits_le32 wherever applicable
- All return's are changed to proper error codes instead of 1 or -1
- Changed return type of isrx
d function headers with desciption
- Changed all capital hex numbers to small hex numbers
Ashok Reddy Soma (3):
net: ethtool: Add ethernet speed macros for higher speeds
net: xilinx: axi_mrmac: Add MRMAC driver
xilinx: versal: Enable Xilinx AXI MRMAC
MAINTAINERS
Add speed macro's for higher ethernet speeds to be used in u-boot
networking drivers. Added Macros for speeds 14G, 20G, 25G, 40G, 50G,
56G, 100G and 200G inline with linux.
Signed-off-by: Ashok Reddy Soma
Reviewed-by: Simon Glass
Acked-by: Ramon Fried
---
(no changes since v1)
include/
Enable Xilinx AXI MRMAC for Versal platforms.
Signed-off-by: Ashok Reddy Soma
Reviewed-by: Simon Glass
---
(no changes since v1)
configs/xilinx_versal_virt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/xilinx_versal_virt_defconfig
b/configs
and 25G on all 4 ports.
Signed-off-by: Ashok Reddy Soma
---
Changes in v3:
- In V2 by mistake changed return type of isrxready() of xilinx_axi_emac
driver instead of xilinx_axi_mrmac driver. Fixed it in V3.
Changes in v2:
- Changed all static allocations to dynamic and freed them.
- Used
Please drop this patch V2 2/3. Will send updated one. Apologies for the
trouble.
On Fri, Jul 2, 2021, 3:51 PM Ashok Reddy Soma
wrote:
> Add support for xilinx multirate(MRMAC) ethernet driver.
> This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC.
> Added support for 4
values and
in this case u-boot has to re-configure required tap values(including zero)
based on the operating mode.
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b
vice-versa.
Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6
bits for OTAP for ZynqMP.
Signed-off-by: Ashok Reddy Soma
---
board/xilinx/zynqmp/tap_delays.c | 73 +---
drivers/mmc/zynq_sdhci.c | 10 -
include/zynqmp_tap_delay.h
_set_phase'
drivers/mmc/zynq_sdhci.c:467: warning: contents before sections
Signed-off-by: Michal Simek
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c
drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared.
Should it be static?
Signed-off-by: Michal Simek
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers
set_phase() functions are not modifying the ret value and returning
the same uninitialized ret, return 0 instead.
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c
local structures as static structures
Ashok Reddy Soma (4):
mmc: zynq_sdhci: Resolve uninitialized return value
mmc: zynq_sdhci: Allow configuring zero Tap values
mmc: zynq_sdhci: Use Mask writes for Tap delays
mmc: zynq_sdhci: Split set_tapdelay function to in and out
Michal Simek (2):
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits
for otap) before writing to the tap delay register.
Clear ITAP and OTAP delay bits before updating with the new tap value
for Versal platform.
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 58
Hi Jaehoon,
> -Original Message-
> From: Jaehoon Chung
> Sent: Friday, July 9, 2021 3:08 PM
> To: Ashok Reddy Soma ; u-boot@lists.denx.de
> Cc: peng@nxp.com; git ; mon...@monstr.eu;
> somaashokre...@gmail.com
> Subject: Re: [PATCH 1/6] mmc: zynq_sdhci: Resolve
Hi Jaehoon,
> -Original Message-
> From: Jaehoon Chung
> Sent: Friday, July 9, 2021 3:12 PM
> To: Ashok Reddy Soma ; u-boot@lists.denx.de
> Cc: peng@nxp.com; git ; mon...@monstr.eu;
> somaashokre...@gmail.com; Michal Simek
> Subject: Re: [PATCH 5/6] mmc: zynq_
set_phase() functions are not modifying the ret value and returning
the same uninitialized ret, return 0 instead.
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- Changed "@degree" to "@degrees:" in function descriptions of tap
delay functions
drivers/m
sections
drivers/mmc/zynq_sdhci.c:467: warning: contents before sections
Signed-off-by: Michal Simek
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- Removed @degree warning from commit description since it is fixed in
patch 1/6.
drivers/mmc/zynq_sdhci.c | 20 ++--
1
values and
in this case u-boot has to re-configure required tap values(including zero)
based on the operating mode.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
drivers/mmc/zynq_sdhci.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers
local structures as static structures
Changes in v2:
- Changed "@degree" to "@degrees:" in function descriptions of tap
delay functions
- Removed @degree warning from commit description since it is fixed in
patch 1/6.
Ashok Reddy Soma (4):
mmc: zynq_sdhci: Resolve uniniti
Reviewed-by: Ashok Reddy Soma
> -Original Message-
> From: Brandon Maier
> Sent: Wednesday, January 20, 2021 10:10 PM
> To: u-boot@lists.denx.de
> Cc: bmeng...@gmail.com; Brandon Maier
> ; ja...@amarulasolutions.com; Michal
> Simek ; Ashok Reddy Soma
>
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits
for otap) before writing to the tap delay register.
Clear ITAP and OTAP delay bits before updating with the new tap value
for Versal platform.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
drivers/mmc
drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared.
Should it be static?
Signed-off-by: Michal Simek
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
drivers/mmc/zynq_sdhci.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
d
vice-versa.
Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6
bits for OTAP for ZynqMP.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
board/xilinx/zynqmp/tap_delays.c | 73 +---
drivers/mmc/zynq_sdhci.c | 10 -
include
Hi Jaehoon,
> -Original Message-
> From: Jaehoon Chung
> Sent: Friday, July 9, 2021 4:21 PM
> To: Ashok Reddy Soma ; u-boot@lists.denx.de
> Cc: peng@nxp.com; git ; mon...@monstr.eu;
> somaashokre...@gmail.com
> Subject: Re: [PATCH 1/6] mmc: zynq_sdhci: Resolve
HI Michal,
> -Original Message-
> From: Michal Simek
> Sent: Friday, July 9, 2021 4:37 PM
> To: Ashok Reddy Soma ; u-boot@lists.denx.de
> Cc: peng@nxp.com; jh80.ch...@samsung.com; git ;
> mon...@monstr.eu; somaashokre...@gmail.com
> Subject: Re: [PATCH v2 3/6]
Hi Michal,
> -Original Message-
> From: Michal Simek
> Sent: Friday, July 9, 2021 4:35 PM
> To: Ashok Reddy Soma ; u-boot@lists.denx.de
> Cc: peng@nxp.com; jh80.ch...@samsung.com; git ;
> mon...@monstr.eu; somaashokre...@gmail.com
> Subject: Re: [PATCH v2
in function descriptions of tap
delay functions
- Removed @degree warning from commit description since it is fixed in
patch 1/6.
Ashok Reddy Soma (4):
mmc: zynq_sdhci: Resolve uninitialized return value
mmc: zynq_sdhci: Allow configuring zero Tap values
mmc: zynq_sdhci: Use Mask writ
vice-versa.
Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6
bits for OTAP for ZynqMP.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
board/xilinx/zynqmp/tap_delays.c | 73 +---
drivers/mmc/zynq_sdhci.c | 10 -
include
drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared.
Should it be static?
Signed-off-by: Michal Simek
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
drivers/mmc/zynq_sdhci.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
d
egrees'
not described in 'sdhci_versal_sampleclk_set_phase'
drivers/mmc/zynq_sdhci.c:467: warning: contents before sections
Signed-off-by: Michal Simek
Signed-off-by: Ashok Reddy Soma
---
Changes in v3:
- Change "@degree" to "@degrees:" in sdhci_zynqmp_sampleclk_set_phase()
and sd
values and
in this case u-boot has to re-configure required tap values(including zero)
based on the operating mode.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
drivers/mmc/zynq_sdhci.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits
for otap) before writing to the tap delay register.
Clear ITAP and OTAP delay bits before updating with the new tap value
for Versal platform.
Signed-off-by: Ashok Reddy Soma
---
Changes in v3:
- Updated macro's wit
set_phase() functions are not modifying the ret value and returning
the same uninitialized ret, return 0 instead.
Keep the return type as int to return errors when the tapdelay's are
set via xilinx_pm_request() in future.
Signed-off-by: Ashok Reddy Soma
---
Changes in v3:
- Updated co
ariable is absent.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
test/py/tests/test_tpm2.py | 28
1 file changed, 28 insertions(+)
diff --git a/test/py/tests/test_tpm2.py b/test/py/tests/test_tpm2.py
index 70f906da51..bb147d4e88 100644
--- a/tes
driver and remove
tap_dealy.c and zynqmp_tap_delay.h
- Change variable name from deviceid to node_id in couple of functions
for consistancy
- Add a workaround for sd card detect stable issue for Versal platforms
- Use set_control_reg from sdhci.c
Ashok Reddy Soma (4):
mmc: zynq_sdhci: Use
after OTAP (release DLL) to avoid issues
in some cases. Also handle error return where possible.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
board/xilinx/zynqmp/tap_delays.c | 89 +++-
drivers/mmc/zynq_sdhci.c | 72
Since set_control_reg is available in sdhci.c, use it and remove
arasan_sdhci_set_control_reg().
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc
From: T Karthik Reddy
Add enums for pm node id's, pm ioctl id's, tapdelay types, dll reset types
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
include/zynqmp_firmware.h | 127 ++
1 file changed, 127 insertions(+)
diff --git
nqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 17 +
1 file changed, 17 insertions(+)
diff --g
arasan_sdhci_set_tapdelay() and also for
set_delay() in sdhci_ops structure.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/sdhci.c | 8 ++--
drivers/mmc/zynq_sdhci.c | 21 -
include/sdhci.h | 2 +-
3 files changed, 23 insertions(+), 8
zynqmp_tap_delay.h files.
Signed-off-by: Ashok Reddy Soma
---
board/xilinx/zynqmp/Makefile | 2 --
board/xilinx/zynqmp/tap_delays.c | 26
drivers/mmc/zynq_sdhci.c | 21 +++-
include/zynqmp_tap_delay.h | 34
4 files
Change deviceid to node_id in arasan_zynqmp_dll_reset() and also in
tapdelay related static inline functions to reflect proper name and
for consistency.
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
Hi Jaehoon,
Thanks for the review.
> -Original Message-
> From: Jaehoon Chung
> Sent: Monday, July 26, 2021 3:18 AM
> To: Ashok Reddy Soma ; u-boot@lists.denx.de
> Cc: peng@nxp.com; faiz_ab...@ti.com; s...@chromium.org;
> mich...@walle.cc; git ; mon...@monstr
set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.
Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- T
- Remove mmc->dev->seq_ and use priv->deviceid instead
- Changed return error from -EIO to -ETIMEDOUT in arasan_sdhci_probe()
in card detect state stable workaround
Ashok Reddy Soma (6):
mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelay
mmc: sdhci: Change prototype of set
Change deviceid to node_id in arasan_zynqmp_dll_reset() and also in
tapdelay related static inline functions to reflect proper name and
for consistency.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
drivers/mmc/zynq_sdhci.c | 14 +++---
1 file changed, 7 insertions(+), 7
From: T Karthik Reddy
Add enums for pm node id's, pm ioctl id's, tapdelay types, dll reset types
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
include/zynqmp_firmware.h | 127 ++
1 file changed, 127
after OTAP (release DLL) to avoid issues
in some cases. Also handle error return where possible.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- Added comment for why 1ms delay is needed between DLL assert and
release
- Remove mmc->dev->seq_ and us
Since set_control_reg is available in sdhci.c, use it and remove
arasan_sdhci_set_control_reg().
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
drivers/mmc/zynq_sdhci.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/drivers/mmc
Change return type of arasan_sdhci_set_tapdelay() to int, to facilitate
returning errors. Get return values from input and output set clock phase
functions inside arasan_sdhci_set_tapdelay() and return those errors.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
Changes in
nqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- Changed return error from -EIO to -ETIMEDOUT in arasan_sdhci_probe()
in
zynqmp_tap_delay.h files.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
board/xilinx/zynqmp/Makefile | 2 --
board/xilinx/zynqmp/tap_delays.c | 26
drivers/mmc/zynq_sdhci.c | 21 +++-
include/zynqmp_tap_delay.h | 34
Reviewed-by: Jaehoon Chung
Sorry, Forgot to add Reviewed-by:
https://patchwork.ozlabs.org/project/uboot/patch/20210724081009.15761-5-ashok.reddy.s...@xilinx.com/
Thanks,
Ashok
> -Original Message-
> From: Ashok Reddy Soma
> Sent: Tuesday, July 27, 2021 6:07 PM
>
Reviewed-by: Jaehoon Chung
Sorry, Forgot to add Reviewed-by:
https://patchwork.ozlabs.org/project/uboot/patch/20210724081009.15761-6-ashok.reddy.s...@xilinx.com/
Thanks,
Ashok
> -Original Message-
> From: Ashok Reddy Soma
> Sent: Tuesday, July 27, 2021 6:07 PM
>
Reviewed-by: Jaehoon Chung
Sorry, Forgot to add Reviewed-by:
https://patchwork.ozlabs.org/project/uboot/patch/20210724081009.15761-8-ashok.reddy.s...@xilinx.com/
Thanks,
Ashok
> -Original Message-
> From: Ashok Reddy Soma
> Sent: Tuesday, July 27, 2021 6:07 PM
>
eng
> ; Patrick Delaunay ;
> Pragnesh Patel ; Frédéric Danis
> ; Reuben Dowle ;
> Yangbo Lu ; Stefan Bosch ; Ashok
> Reddy Soma ; Nicolas Saenz Julienne
> ; Pali Rohár ; u-boot@lists.denx.de
> Subject: [PATCH] mmc: Add support for enumerating MMC card in a given
> mode using
HI Aswath,
> -Original Message-
> From: Aswath Govindraju
> Sent: Friday, July 30, 2021 10:41 AM
> To: Ashok Reddy Soma
> Cc: Lokesh Vutla ; Vignesh Raghavendra
> ; Kishon Vijay Abraham I ; Peng Fan
> ; Jaehoon Chung ; Simon
> Glass ; Heinrich Schuchardt ; Bin
&
om -EIO to -ETIMEDOUT in arasan_sdhci_probe()
in card detect state stable workaround
Ashok Reddy Soma (5):
mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelay
mmc: sdhci: Change prototype of set_delay to return errors
mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelays
mmc:
From: T Karthik Reddy
Add enums for pm node id's, pm ioctl id's, tapdelay types, dll reset types
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
(no changes since v1)
include/zynqmp_firmware.h | 127 ++
1 file changed, 127
set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.
Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.
Signed-off-by: Ashok Reddy Soma
---
(no changes since v2
Change return type of arasan_sdhci_set_tapdelay() to int, to facilitate
returning errors. Get return values from input and output set clock phase
functions inside arasan_sdhci_set_tapdelay() and return those errors.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
Changes in
DLL resets in regular flow(EL2).
Host driver should explicitly request DLL reset before ITAP (assert DLL)
and after OTAP (release DLL) to avoid issues in some cases. Also handle
error return where possible.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
Changes in v3:
- As
Move tapdelay function calls to zynq_sdhci.c and make them static
inline. zynqmp_tap_delay.h has function prototypes for the functions
defined in tap_delays.c, which will not be needed anymore.
Remove tap_delays.c and zynqmp_tap_delay.h files.
Signed-off-by: Ashok Reddy Soma
---
Changes in v3
nqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
(no changes since v2)
Changes in v2:
- Changed return error from -EIO to -ETIMEDOU
Since set_control_reg is available in sdhci.c, use it and remove
arasan_sdhci_set_control_reg().
Signed-off-by: Ashok Reddy Soma
Reviewed-by: Jaehoon Chung
---
(no changes since v1)
drivers/mmc/zynq_sdhci.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff
Hi Faiz,
> -Original Message-
> From: Faiz Abbas
> Sent: Wednesday, May 27, 2020 12:28 PM
> To: Jaehoon Chung ; Michal Simek
> ; u-boot@lists.denx.de; git
> Cc: Ashok Reddy Soma ; Heinrich Schuchardt
> ; Lokesh Vutla ; Marek Vasut
> ; Masahiro Yamada ;
&g
Hi Jaehoon,
> -Original Message-
> From: Jaehoon Chung
> Sent: Wednesday, June 10, 2020 4:07 PM
> To: Ashok Reddy Soma ; Faiz Abbas
> ; Michal Simek ; u-
> b...@lists.denx.de; git
> Cc: Heinrich Schuchardt ; Lokesh Vutla
> ; Marek Vasut ; Masahiro
> Yamada ;
Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.
Signed-off-by: Ashok Reddy Soma
---
drivers/mmc/zynq_sdhci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/driver
request for node of the IP's based on
DT.
- Load pmufw config object dynamically based on DT.
Ashok Reddy Soma (5):
firmware: zynqmp: Change prototype of
zynqmp_pmufw_load_config_object()
firmware: zynqmp: Load config overlay for core0 to pmufw
arm64: zynqmp: Enable power d
zynqmp_pmufw_load_config_object() has some error cases and it is better
to return those errors. Change prototype of this function to return
errors.
Signed-off-by: Ashok Reddy Soma
---
drivers/firmware/firmware-zynqmp.c | 8 +---
include/zynqmp_firmware.h | 2 +-
2 files changed, 6
Try loading pmufw config overlay for core0, if it doesn't return any
error it means pmufw is accepting nodes for other IP's. Otherwise dont
try to load config object for any other IP, just return from
zynqmp_pmufw_node function.
Signed-off-by: Ashok Reddy Soma
---
drivers/firmwar
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.
Signed-off-by: Ashok Reddy Soma
---
configs/xilinx_zynqmp_virt_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/xilinx_zynqmp_virt_defconfig
b/co
Mailbox driver might be need for Versal and other future platforms.
To remove the dependency, move struct zynqmp_ipi_msg to
zynqmp_firmware.h so that mailbox driver compiles for other platforms
easily.
Signed-off-by: Ashok Reddy Soma
---
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 5
ff-by: Ashok Reddy Soma
---
configs/xilinx_versal_virt_defconfig | 4
drivers/mailbox/Kconfig | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/configs/xilinx_versal_virt_defconfig
b/configs/xilinx_versal_virt_defconfig
index 0419992be4..a2d4debbf5 100644
This patch series does below things
- Add child preprobe function
- Use dummy buswidth in dummy byte calculation
- Add support for zynq_qspi_mem_exec_op
- Fix qspi speed issue
Ashok Reddy Soma (2):
spi: zynq_qspi: Add support for zynq_qspi_mem_exec_op
spi: zynq_qspi: Fix programming
From: Siva Durga Prasad Paladugu
Add child pre probe function in the driver. Update max_hz of priv from
spi_slave structure.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Ashok Reddy Soma
---
drivers/spi/zynq_qspi.c | 12
1 file changed, 12 insertions(+)
diff --git
From: T Karthik Reddy
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
drivers/spi/zynq_
Add support_ops function zynq_qspi_mem_exec_op to check controller
supported operations by spi-mem framework. Current default support ops
function does not allow dummy buswidth no more than 1, unless we are
using buswidth is 4 for TX.
Signed-off-by: Ashok Reddy Soma
---
drivers/spi/zynq_qspi.c
: Ashok Reddy Soma
---
drivers/spi/zynq_qspi.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 52db7b3f21..00e3ffcd1d 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -622,15 +622,12
Add configuration file for mini u-boot configuration which runs on a
smaller footprint from on chip memory(OCM). This configuration has
required CONFIG's enabled to support qspi flash and uses DCC terminal
for console output.
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
- Removed co
g and updated mini config to align with latest
Kconfig layout
- Run savedefconfig and updated mini config for ospi to align with
latest Kconfig layout
Ashok Reddy Soma (2):
arm64: versal: Add qspi flash mini u-boot configuration
arm64: versal: Add octal spi flash mini u-boot configur
Add configuration file for mini u-boot configuration which runs on a
smaller footprint from on chip memory(OCM). This configuration has
required CONFIG's enabled to support octal spi flash and uses DCC terminal
for console output.
Signed-off-by: Ashok Reddy Soma
---
Changes in v2:
Add support to switch to EL1 and load an EL1 app from U-Boot which is
executing at EL2 or EL3 in aarch64 mode.
Signed-off-by: Ashok Reddy Soma
---
board/xilinx/versal/board.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/board/xilinx/versal/board.c b/board/xilinx
d and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.
Signed-off-by: Algapally Santosh Sagar
Signed-off-by: Ashok Reddy Soma
---
board/xilinx/zynqmp/Kconfig | 1 +
drivers/clk/Kconfig | 4 ++--
drivers/fpga/Kco
moved configs/xilinx_* from MAINTAINERS as, it is already taken care.
- Run savedefconfig and updated mini config to align with latest Kconfig
layout
- Run savedefconfig and updated mini config for ospi to align with
latest Kconfig layout
Ashok Reddy Soma (3):
arm64: versal: Add qspi flash m
ff-by: Ashok Reddy Soma
---
Changes in v3:
- Added dts files for qspi mini configuration
- Added CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe
to fix compilation error.
Changes in v2:
- Removed configs/xilinx_* from MAINTAINERS as, it is already
When cadence_qspi_versal_flash_reset() function is called in mini
u-boot where there is no firmware support, it is missing defines for
macro's BOOT_MODE_POR_0 & BOOT_MODE_POR_1. Remove them and replace with
already define macro's which have same values as these.
Signed-off-by: As
ation.
Signed-off-by: Ashok Reddy Soma
---
Changes in v3:
- Add dts files for octal flash mini u-boot.
- Add below configs to fix compilation error.
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xFFFE
Changes in v2:
- Run savedefconfig and updated mini config for
ck to work properly.
Signed-off-by: Algapally Santosh Sagar
Signed-off-by: Ashok Reddy Soma
---
drivers/mtd/spi/spi-nor-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 78de3c5281..1ea8363d9f 10
From: T Karthik Reddy
Update GQSPI_LPBK_DLY_ADJ_DLY_1 tapdelay value for Versal for
frequencies above 100MHz.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
drivers/spi/zynqmp_gqspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi
From: T Karthik Reddy
The driver was using an incorrect value for GQSPI_LPBK_DLY_ADJ_DLY_1
tapdelay for Versal for frequencies above 100MHz. Change it from 2 to 1
based on the recommended value in IP spec.
Signed-off-by: T Karthik Reddy
Signed-off-by: Ashok Reddy Soma
---
Changes in v2
cadence_qspi_apb_enable_linear_mode() has a weak function defined, so no
need to gaurd this under if (CONFIG_IS_ENABLED(ARCH_VERSAL)).
In cadence_qspi_apb_write_execute(), enable linear mode is called twice by
mistake, remove extra one.
Signed-off-by: Ashok Reddy Soma
---
drivers/spi
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