On 1/19/24 11:50 AM, Apurva Nandan wrote:
From: Dasnavis Sabiya
Add config fragments for am69_sk A72 and R5 configuration.
This applies on to:
j784s4_evm_a72_defconfig -> am69_sk_a72.config
j784s4_evm_r5_defconfig -> am69_sk_r5.config
The usage model (with the fragment) would be:
make j784s4_
On 1/23/24 8:39 AM, Apurva Nandan wrote:
Hi Andrew,
On 20/01/24 00:43, Andrew Davis wrote:
On 1/19/24 11:50 AM, Apurva Nandan wrote:
From: Dasnavis Sabiya
Add config fragments for am69_sk A72 and R5 configuration.
This applies on to:
j784s4_evm_a72_defconfig -> am69_sk_a72.con
On 1/24/24 11:43 PM, Dhruva Gole wrote:
On Jan 24, 2024 at 12:08:13 -0600, Nishanth Menon wrote:
On 23:07-20240124, Dhruva Gole wrote:
On Jan 24, 2024 at 10:39:10 -0600, Nishanth Menon wrote:
On 18:38-20240124, Dhruva Gole wrote:
On Jan 24, 2024 at 16:42:12 +0530, Kamlesh Gurudasani wrote:
D
On 1/29/24 12:26 PM, Apurva Nandan wrote:
On 23/01/24 20:31, Andrew Davis wrote:
On 1/23/24 8:39 AM, Apurva Nandan wrote:
Hi Andrew,
On 20/01/24 00:43, Andrew Davis wrote:
On 1/19/24 11:50 AM, Apurva Nandan wrote:
From: Dasnavis Sabiya
Add config fragments for am69_sk A72 and R5
:
On Thu, Oct 05, 2023 at 09:19:48AM -0500, Andrew Davis wrote:
On 10/4/23 8:54 AM, Nishanth Menon wrote:
On 08:48-20231004, Andrew Davis wrote:
On 10/4/23 8:23 AM, Roger Quadros wrote:
ti_mmc is not a valid boot_target for standard boot flow so
Is there some way to make it into a valid
On 11/6/23 11:47 AM, Simon Glass wrote:
Hi Andrew,
On Mon, 6 Nov 2023 at 10:27, Andrew Davis wrote:
On 11/6/23 9:31 AM, Tom Rini wrote:
On Mon, Nov 06, 2023 at 11:23:51AM +0530, Manorit Chawdhry wrote:
Hi Simon,
On 11:22-20231005, Simon Glass wrote:
Hi Nishanth,
On Thu, 5 Oct 2023 at 11
On 11/7/23 10:18 AM, Thomas Richard wrote:
During the boot a copy of DM-Firmware is done in a reserved memory
area before it starts.
When resuming, R5 SPL uses this copy of DM-Firmware instead of the fit
image.
TF-A which saved itself in this same memory area, is restored in
SRAM by R5 SPL.
Base
On 11/9/23 5:29 AM, Thomas Richard wrote:
On 11/8/23 18:30, Andrew Davis wrote:
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
typedef void __noreturn (*image_entry_noargs_t)(void);
@@ -235,6 +241,32 @@ void __noreturn jump_to_image_no_args(struct
On 11/9/23 11:37 AM, Nishanth Menon wrote:
On 11:09-20231109, Joao Paulo Goncalves wrote:
Enable the am625 instruction cache on SPL and U-boot earlier for the A53
to execute code a bit faster. For normal boot flow, it was possible to
gain about 2 seconds on boot time.
Signed-off-by: Joao Paulo
The kconfig option SPL means this build supports SPL but not that
this build is SPL, nor that this build is the SPL running on R5.
For options that are for R5 SPL use CPU_V7R.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions
This makes it clear these are only to be used by the R5 builds of SPL.
And this will be used to later more cleanly split the two builds.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Makefile | 6 +-
arch/arm/mach-k3/r5/Makefile | 13
SYSFW is only ever loaded by the R5 core, move the code into that
directory. While here also move the related Kconfig symbols.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Kconfig | 51 ++--
arch/arm/mach-k3/Makefile| 1 -
arch/arm/mach
question, why was `ti-secure` not factored out of `dm` nodes like
it was for `atf`/`tee` nodes? Guessing it has to do with not all SoCs
needing this blob and signing nothing results in something, which
messes up the 0 size check when loading it, but it wasn't clear to me.
Anyway,
Acked-by: A
On 11/17/23 8:27 AM, Romain Naour wrote:
Hello Andrew, All,
Le 03/11/2023 à 20:20, Andrew Davis a écrit :
On 11/3/23 2:06 PM, Nishanth Menon wrote:
On 13:51-20231103, Andrew Davis wrote:
On 11/2/23 7:38 PM, Nishanth Menon wrote:
Add defconfig fragments for J721E based BeagleBone AI-64 and
These are leftover definitions. While here cleanup some leftover comments.
Signed-off-by: Andrew Davis
---
include/configs/ti_armv7_keystone2.h | 22 --
1 file changed, 22 deletions(-)
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
This is a hacky way to have this file included in all source files that
include common.h, instead just include from the files that need it.
Signed-off-by: Andrew Davis
---
drivers/memory/ti-aemif.c| 1 +
drivers/soc/ti/keystone_serdes.c | 1 +
include/configs/ti_armv7_keystone2
Signed-off-by: Andrew Davis
---
arch/arm/mach-keystone/clock.c| 1 -
arch/arm/mach-keystone/cmd_clock.c| 2 +-
arch/arm/mach-keystone/cmd_mon.c | 1 -
arch/arm/mach-keystone/cmd_poweroff.c | 1 -
arch/arm/mach-keystone/ddr3.c | 2
On 11/17/23 4:40 PM, Tom Rini wrote:
On Fri, Nov 17, 2023 at 04:38:28PM -0600, Andrew Davis wrote:
This is a hacky way to have this file included in all source files that
include common.h, instead just include from the files that need it.
Signed-off-by: Andrew Davis
---
drivers/memory/ti
someone to go fix it. :)
This series depends on this[0].
Thanks,
Andrew
[0]
https://patchwork.ozlabs.org/project/uboot/patch/20231106165205.22066-1-...@ti.com/
Andrew Davis (2):
arm: mach-k3: Remove non-cached memory map areas
arm: mach-k3: Merge initial memory maps
arch/arm/mach-k3/arm64
to the nature of the K3 coherency
architecture. Plus these are board specific carveouts and instead
should have been added at the board level, not here in the SoC common
code area.
Remove these non-cached memory map areas.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/arm64-mmu.c | 48
The Device vs Normal memory map is the same for all K3 SoCs. Merge
the SoC specific maps into one.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/arm64-mmu.c | 211 +--
1 file changed, 2 insertions(+), 209 deletions(-)
diff --git a/arch/arm/mach-k3/arm64-mmu.c
On 10/4/23 1:06 PM, Nishanth Menon wrote:
On 23:22-20231004, Apurva Nandan wrote:
[...]
+ .virt = 0x5UL,
+ .phys = 0x5UL,
+ .size = 0x4UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PT
On 11/22/23 2:48 PM, Tom Rini wrote:
On Mon, Nov 06, 2023 at 10:52:05AM -0600, Andrew Davis wrote:
NR_MMU_REGIONS is a copy/paste from another platform that extends
this list later. We do not do that, so let the list be the size
of the initializer list.
Signed-off-by: Andrew Davis
---
arch
NR_MMU_REGIONS is a copy/paste from another platform that extends
this list later. We do not do that, so let the list be the size
of the initializer list.
Signed-off-by: Andrew Davis
---
Changes for v2:
- Made same change for plats now in -next
arch/arm/mach-k3/arm64-mmu.c | 35
This file is common for all K3, move it out of board/ directory and
into mach-k3. As we need to change the path in k3-binman.dtsi let's
take this opportunity to switch to absolute paths which makes adding
non-TI boards (like Toradex Verdin) not need to override these paths.
Signed-off-by: A
-bys
- Rebase on latest -next
Thanks,
Andrew
[0] https://lore.kernel.org/all/20231122211218.607757-1-...@ti.com/
Andrew Davis (3):
arm: mach-k3: Let the compiler size the mem_map lists
arm: mach-k3: Remove non-cached memory map areas
arm: mach-k3: Merge initial memory maps
arch/arm/mach
NR_MMU_REGIONS is a copy/paste from another platform that extends
this list later. We do not do that, so let the list be the size
of the initializer list.
Signed-off-by: Andrew Davis
Reviewed-by: Nishanth Menon
Tested-by: Nishanth Menon
---
arch/arm/mach-k3/arm64-mmu.c | 35
to the nature of the K3 coherency
architecture. Plus these are board specific carveouts and instead
should have been added at the board level, not here in the SoC common
code area.
Remove these non-cached memory map areas.
Signed-off-by: Andrew Davis
Reviewed-by: Nishanth Menon
Tested-by
The Device vs Normal memory map is the same for all K3 SoCs. Merge
the SoC specific maps into one.
Signed-off-by: Andrew Davis
Reviewed-by: Nishanth Menon
Tested-by: Nishanth Menon
---
arch/arm/mach-k3/arm64-mmu.c | 197 +--
1 file changed, 2 insertions(+), 195
On 11/27/23 9:47 AM, Nishanth Menon wrote:
On 23:04-20231123, Vignesh Raghavendra wrote:
On 11/23/2023 10:52 PM, Andrew Davis wrote:
@@ -219,16 +177,9 @@ struct mm_region am62_mem_map[] = {
}, {
.virt = 0x8000UL,
.phys = 0x8000UL
:
- Included dependency patch from here[0] into this series
- Add Tested-bys
- Rebase on latest -next
Thanks,
Andrew
[0] https://lore.kernel.org/all/20231122211218.607757-1-...@ti.com/
Andrew Davis (4):
arm: mach-k3: Let the compiler size the mem_map lists
arm: mach-k3: Do not map ATF and
arm64-mmu: do not map ATF and OPTEE
regions in A53 MMU")
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/arm64-mmu.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index d872ed714c4..5c858ae0
NR_MMU_REGIONS is a copy/paste from another platform that extends
this list later. We do not do that, so let the list be the size
of the initializer list.
Signed-off-by: Andrew Davis
Reviewed-by: Nishanth Menon
Tested-by: Nishanth Menon
---
arch/arm/mach-k3/arm64-mmu.c | 35
The Device vs Normal memory map is the same for all K3 SoCs. Merge
the SoC specific maps into one.
Signed-off-by: Andrew Davis
Reviewed-by: Nishanth Menon
Tested-by: Nishanth Menon
---
arch/arm/mach-k3/arm64-mmu.c | 228 +--
1 file changed, 2 insertions(+), 226
to the nature of the K3 coherency
architecture. Plus these are board specific carveouts and instead
should have been added at the board level, not here in the SoC common
code area.
Remove these non-cached memory map areas.
Signed-off-by: Andrew Davis
Reviewed-by: Nishanth Menon
Tested-by
On 11/29/23 2:00 AM, Manorit Chawdhry wrote:
Hi Andrew,
On 28/11/23 22:35, Andrew Davis wrote:
ATF and OPTEE regions may be firewalled from non-secure entities. To
prevent access to this area we leave a hole there in the MMU map. This
is the same idea as [0] but we complete that patch by
The base address of extended DDR does not change across the K3 family.
Setting this per SoC is not needed. Remove this definition to help
remove the last bits from K3 include/configs/*.h files.
Signed-off-by: Andrew Davis
---
board/ti/am65x/evm.c | 4 ++--
board/ti/j721e/evm.c
On 11/30/23 5:55 AM, Apurva Nandan wrote:
Add board files for J784S4 EVM.
Signed-off-by: Hari Nagalla
[ add env and board specific yaml files for binman ]
Signed-off-by: Neha Malcom Francis
[ cleaned up the env files ]
Signed-off-by: Manorit Chawdhry
Signed-off-by: Dasnavis Sabiya
Signed-off
On 11/30/23 5:55 AM, Apurva Nandan wrote:
Add board-cfg, rm-cfg, pm-cfg, sec-cfg, tifs-rm-cfg yaml for buidling
u-boot sysfw data.
Signed-off-by: Apurva Nandan
---
board/ti/j784s4/board-cfg.yaml | 37 +
board/ti/j784s4/pm-cfg.yaml | 13 +
board/ti/j784s4/rm-cfg.yaml | 3058 +
On 11/30/23 5:55 AM, Apurva Nandan wrote:
Introduce the base dts files needed for u-boot or to augment the linux
dtbs for use in the u-boot-spl and u-boot binaries.
Signed-off-by: Hari Nagalla
[ add binman and ddr dtsi files ]
Signed-off-by: Neha Malcom Francis
Signed-off-by: Dasnavis Sabiya
On 11/30/23 5:55 AM, Apurva Nandan wrote:
Add maintainership for new J784S4 files added.
Signed-off-by: Apurva Nandan
---
board/ti/j784s4/MAINTAINERS | 25 +
1 file changed, 25 insertions(+)
create mode 100644 board/ti/j784s4/MAINTAINERS
diff --git a/board/ti/j784s
HS-SE SR2.0 generation
Looks good to me now,
Reviewed-by: Andrew Davis
arch/arm/dts/k3-j721e-binman.dtsi | 90 ++-
1 file changed, 89 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi
b/arch/arm/dts/k3-j721e-binman.dtsi
index
release (IIRC), but for completeness this is fine to
have supported,
Reviewed-by: Andrew Davis
Reported-by: Suman Anna
Reported-by: Aniket Limaye
Signed-off-by: Neha Malcom Francis
---
arch/arm/dts/k3-j7200-binman.dtsi | 95 ++-
1 file changed, 94 insertions(+), 1
Each SoC now has a directory in mach-k3, let's move the SoC specific
files into their respective directories.
Signed-off-by: Andrew Davis
---
Changes for v2:
- Rebased on latest -next
arch/arm/mach-k3/Makefile | 24 ++---
arch/arm/mach-k3/am62ax/Mak
On 5/10/24 3:47 AM, Santhosh Kumar K wrote:
From: Neha Malcom Francis
Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis
---
drivers/ram/Kconfig | 11 +++
1 file changed, 11 insertions
On 5/15/24 1:21 PM, Tom Rini wrote:
On Fri, May 03, 2024 at 11:44:29AM -0500, Bryan Brattlof wrote:
The am62x-lp-sk is a package and reference board spin of the am62x-sk to
showcase the low-power features of the am62x SoC family. Because it so
closely resembles the am62x-sk board, use the prepr
On 5/22/24 6:37 AM, Jayesh Choudhary wrote:
QoS bit mapping are common across all K3 SoCs so move those defines
to common header file (k3_qos.h).
This ensures that we do not define these for each SoC.
Signed-off-by: Jayesh Choudhary
---
arch/arm/mach-k3/include/mach/k3-qos.h | 74
On 5/22/24 6:37 AM, Jayesh Choudhary wrote:
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 7.
ATYPE 3 is selected so that the traffic takes non-cohere
On 5/22/24 1:36 AM, MD Danish Anwar wrote:
Add remoteproc-name property for PRU cores.
Signed-off-by: MD Danish Anwar
---
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 44 +++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
b/arch/arm/d
{} nodes when the
loaded address does not match the address in DT.
Reported-by: Andrew Davis
Signed-off-by: Bryan Brattlof
---
Hello everyone,
This is a little fixup to avoid any confusion once we're in the kernel.
Because TF-A can be configured in U-Boot to be anywhere we want, we need
up u
w
[0] https://lore.kernel.org/lkml/20240326223730.54639-1-...@ti.com/
Andrew Davis (2):
firmware: ti_sci: Bind sysreset driver when enabled
arm: dts: k3: Remove unneeded ti,sci-sysreset binding and nodes
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 7 -
.../k3-am625-phyboard-lyra-
This extra binding is non-standard and now unneeded as we bind the
sysreset driver automatically. This matches what is done in Linux
and allows us to more closely match the DTBs. Remove the binding
and all users.
Signed-off-by: Andrew Davis
---
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 7
The sysreset TI-SCI API is available with TI-SCI always, there is no need
for a DT node to describe the availability of this. If the sysreset driver
is available then bind it during ti-sci probe.
Remove the unneeded device tree matching.
Signed-off-by: Andrew Davis
---
drivers/firmware
On 4/3/24 1:37 AM, Neha Malcom Francis wrote:
Hi Andrew,
On 02/04/24 21:39, Andrew Davis wrote:
This extra binding is non-standard and now unneeded as we bind the
sysreset driver automatically. This matches what is done in Linux
and allows us to more closely match the DTBs. Remove the binding
On 4/4/24 4:00 AM, Jayesh Choudhary wrote:
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
---
arch/arm/dts/Makefile |2 +
arch/arm/dts/k3-j722s-binman.dts
On 4/4/24 4:00 AM, Jayesh Choudhary wrote:
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary
---
doc/board/ti/j722s_evm.rst | 262 +
doc/board/ti/k3.rst| 1 +
2 files changed, 263 insertions(+)
create mode 100644
Fix this by using a variable length file handle for dirfh.
[1] https://www.rfc-editor.org/rfc/rfc1813.html#page-106
Fixes: b0baca982048 ("net: NFS: Add NFSv3 support")
Signed-off-by: Sébastien Szymanski
---
Fixes NFS boot for me, thanks!
Tested-by: Andrew Davis
net/nfs.c | 18 ++
On 4/5/24 2:18 AM, Jayesh Choudhary wrote:
Hi,
On 04/04/24 20:59, Andrew Davis wrote:
On 4/4/24 4:00 AM, Jayesh Choudhary wrote:
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
On 4/8/24 10:34 PM, Heinrich Schuchardt wrote:
On 4/8/24 23:33, Jonathan Humphreys wrote:
EFI signature list using TI dummy keys.
Adding vendor public keys into the code base to lock down generated
binaries to the vendors unpublished private key does not match well with
the intent of the GNU p
On 4/9/24 2:26 PM, Heinrich Schuchardt wrote:
On 4/9/24 14:14, Andrew Davis wrote:
On 4/8/24 10:34 PM, Heinrich Schuchardt wrote:
On 4/8/24 23:33, Jonathan Humphreys wrote:
EFI signature list using TI dummy keys.
Adding vendor public keys into the code base to lock down generated
binaries
On 4/8/24 5:17 PM, Jonathan Humphreys wrote:
Signed-off-by: Jonathan Humphreys
---
arch/arm/dts/k3-j721e-binman.dtsi | 32 +++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi
b/arch/arm/dts/k3-j721e-binman.dtsi
index 75a6e9599b9..9
On 4/10/24 4:38 AM, Ilias Apalodimas wrote:
On Tue, 9 Apr 2024 at 23:14, Andrew Davis wrote:
On 4/9/24 2:26 PM, Heinrich Schuchardt wrote:
On 4/9/24 14:14, Andrew Davis wrote:
On 4/8/24 10:34 PM, Heinrich Schuchardt wrote:
On 4/8/24 23:33, Jonathan Humphreys wrote:
EFI signature list
On 4/10/24 1:24 PM, Jon Humphreys wrote:
Andrew Davis writes:
On 4/8/24 5:17 PM, Jonathan Humphreys wrote:
Signed-off-by: Jonathan Humphreys
---
arch/arm/dts/k3-j721e-binman.dtsi | 32 +++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/k3-j721e
When we find a certificate on an image to be booted on a GP device we
print out a message explaining that the certificate is being skipped.
This message is rather long and is printed for every image. Shorten
the message and make the long version into a debug message.
Signed-off-by: Andrew Davis
driver allowing do_reset() to again function as expected.
Reported-by: Jonathan Humphreys
Fixes: fc5d40283483 ("firmware: ti_sci: Bind sysreset driver when enabled")
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/am642_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
On 4/22/24 4:40 PM, Neha Malcom Francis wrote:
J721E has SR1.1 and SR2.0 having three variants of each GP, HS-FS and
HS-SE. Current build does not generate HS-SE SR2.0 and HS-FS SR1.1 so
add support for them.
Reported-by: Suman Anna
Signed-off-by: Neha Malcom Francis
---
arch/arm/dts/k3-j721
Each SoC now has a directory in mach-k3, let's move the SoC specific
files into their respective directories.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Makefile | 27 ++---
arch/arm/mach-k3/am62ax/Makefile| 7 ++
arch/arm/ma
s/ENTENDED/EXTENDED
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/am62a7_init.c | 2 +-
arch/arm/mach-k3/include/mach/am62a_hardware.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
index
Sync with kernel v6.8-rc1 and sync up the u-boot dts files accordingly.
Signed-off-by: Andrew Davis
---
arch/arm/dts/k3-am64-main.dtsi| 22 +-
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 21 +
arch/arm/dts/k3-am642-evm.dts | 12
From: Nishanth Menon
Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly.
Signed-off-by: Nishanth Menon
Signed-off-by: Andrew Davis
---
arch/arm/dts/k3-am64-main.dtsi| 37 ++---
arch/arm/dts/k3-am64-mcu.dtsi | 2 +
arch/arm/dts/k3-am64.dtsi
Loading ATF is only supported from the R5, move the Kconfig symbol
definition to match.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Kconfig| 7 ---
arch/arm/mach-k3/r5/Kconfig | 6 ++
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-k3/Kconfig b/arch
Currently we do this multiple times, instead just do it once after loading
SYSFW in R5 SPL.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/am62a7_init.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
Firewalls are only ever removed by the R5 core, move this code into
the R5 directory.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/common.c| 44
arch/arm/mach-k3/r5/common.c | 44
2 files changed, 44 insertions
Like we did with R5, move ARM64 code into a specific directory to make
it clear what code is only meant to run on each core type.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Makefile| 3 +--
arch/arm/mach-k3/arm64/Makefile | 6 ++
arch/arm/mach-k3/{ => ar
The disable_linefill_optimization() function is only ever loaded by the
R5 core, move the code into the R5 directory.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/common.c| 25 -
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5/common.c | 35
ATF, OPTEE, DM (tispl.bin) loading is only ever done by the R5 core,
move the code into the R5 directory.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/common.c| 248 +-
arch/arm/mach-k3/r5/common.c | 249 +++
2 files
On 1/31/24 9:06 PM, Bryan Brattlof wrote:
Include the uboot device tree files needed to boot the board.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/Makefile |2 +
arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800
arch/arm/dts/k3-am62p-sk-bin
On 2/2/24 10:28 AM, Bryan Brattlof wrote:
Hi Andrew!
On February 2, 2024 thus sayeth Andrew Davis:
On 1/31/24 9:06 PM, Bryan Brattlof wrote:
Include the uboot device tree files needed to boot the board.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/Makefile |2
_K3_AM654 && !CLK_TI_SCI
&& !TI_SCI_POWER_DOMAIN
Always amusing to see how many SoCs get added to these lists before someone
realizes there is only one or two SoCs that are not on the list :)
BTW, this whole file is inside an "if ARCH_K3" block, so all symbols
depend on
On 2/6/24 2:56 AM, Aradhya Bhatia wrote:
Refactor common QoS code into a new common header file, and the soc
specific setup_qos functions into a common API.
Rename $(soc)_qos_count and $(soc)_qos_data variables to qos_count and
qos_data. When QoS settings of more SoCs are added, only one pair wi
On 2/6/24 6:21 AM, Manorit Chawdhry wrote:
Syncs the DT from Linux v6.8-rc1.
Remove udmap overrides and handle location change of chipid node.
Message doesn't match the patch. This patch should just be squashed
into the previous one anyway.
Andrew
Signed-off-by: Manorit Chawdhry
---
arc
On 7/25/23 12:41 PM, Tom Rini wrote:
On Tue, Jul 25, 2023 at 10:54:16AM -0500, Andrew Davis wrote:
These select/imply settings are common to the whole architecture not just
these boards, move these settings to the architecture config.
Signed-off-by: Andrew Davis
Reviewed-by: Tom Rini
Much like we have for ATF, OP-TEE has a standard address that we load
it too and run it from. Add a Kconfig item for this to remove some
hard-coding and allow this address to be more easily changed.
Signed-off-by: Andrew Davis
---
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 4 ++--
arch
above.
Add this fixup function, and enable it for AM62.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/am625_fdt.c | 2 ++
arch/arm/mach-k3/common_fdt.c | 52 +++
arch/arm/mach-k3/common_fdt.h | 2 ++
3 files changed, 56 insertions(+)
diff --git a/arch/arm
Hello all,
Explanation for this series is mostly in [4/6]. First 3
patches should be safe to take independent of the last 3.
Thanks,
Andrew
Andrew Davis (6):
arm: mach-k3: Add default ATF location for AM62/AM62a
arm: mach-k3: Add config option for setting OP-TEE address
arm: mach-k3: am62
There is a default ATF load address that is used for devices that have
ATF running in SRAM. For AM62 and AM62a, ATF runs from DRAM. Instead
of having to override the address in every defconfig, make add a
default for these ATF in DRAM devices.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3
Linux and is fully forward/backward compatible.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 55bb874d9aa..33f20f61f83 100644
--- a/arch/arm/mach-k3/Kconfig
The fixups provided by ft_system_setup() are applicable for all AM62 based
boards. Select this at the target selection level for all AM62 boards and
remove it from any specific defconfig.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/am62x/Kconfig| 3 +++
configs/verdin
The address we load TFA and OP-TEE to is configurable by
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are static. Fix that by updating this node when the loaded address
does not match the address in DT.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/Makefile
On 2/15/24 2:06 AM, Francesco Dolcini wrote:
Hello Andrew,
thanks for this series.
On Wed, Feb 14, 2024 at 10:30:09AM -0600, Andrew Davis wrote:
The current address of TF-A in DRAM is just below the 512MB address line.
This means if the DRAM in a system is 512MB then TF-A is right at the
end
On 2/28/24 5:20 AM, Neha Malcom Francis wrote:
Add defconfig for J721E SK R5 and A72 configuration.
This includes and modifies the J721E EVM defconfigs:
j721e_evm_r5_defconfig -> j721e_sk_r5_defconfig
j721e_evm_a72_defconfig -> j721e_sk_a72_defconfig
Signed-off-by: Neha Malcom Francis
---
bo
snavis Sabiya
Signed-off-by: Apurva Nandan
---
Reviewed-by: Andrew Davis
board/ti/j784s4/MAINTAINERS | 2 ++
configs/am69_sk_a72_defconfig | 9 +
configs/am69_sk_r5_defconfig | 10 ++
3 files changed, 21 insertions(+)
create mode 100644 configs/am69_sk_a72_def
On 6/13/22 9:20 AM, Tom Rini wrote:
On Mon, Jun 13, 2022 at 02:51:03PM +0200, LABBE Corentin wrote:
Le Fri, Jun 10, 2022 at 11:48:34AM -0400, Tom Rini a écrit :
On Fri, Jun 10, 2022 at 05:45:04PM +0200, LABBE Corentin wrote:
Le Fri, Jun 10, 2022 at 11:01:47AM -0400, Tom Rini a écrit :
On Fri,
ned-off-by: Corentin LABBE
---
If no one was using this data I wonder if the compiler could have removed
it with LTO enabled.. Something to think on.
Acked-by: Andrew Davis
board/ti/am335x/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/ti/am335x/board
On 6/15/22 1:47 AM, Neha Malcom Francis wrote:
For K3 devices that require a sysfw image, add entry for SYSFW. It can
contain system firmware image that can be packaged into sysfw.itb by
binman.
HS devices do this very differently, even an RFC without HS support
doesn't make much sense, this
This is no longer needed as the SA2UL can now be shared with Linux.
Leave the SA2UL DT node enabled.
Signed-off-by: Andrew Davis
---
board/ti/am65x/evm.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 7182a8cad1..8a0a506a3e
This matches what we did for pre-K3 devices. This allows us to build
boot commands that can check for our device type at runtime.
Signed-off-by: Andrew Davis
---
arch/arm/mach-k3/common.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3
The DMA'd memory area needs cleaned and invalidated after the DMA
write so that any stale cache lines do not mask new data.
Signed-off-by: Andrew Davis
---
drivers/dma/dma-uclass.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/dma-uclas
We should clean the caches before any DMA operation and clean+invalidate
after. This matches what the DMA framework does for us already but adds
it to the two functions here in this driver that don't yet go through the
new DMA framework.
Signed-off-by: Andrew Davis
---
drivers/dma/ti-ed
DMA operations should function on DMA addresses, not virtual addresses.
Although these are usually the same in U-Boot, it is more correct
to be explicit with our types here.
Signed-off-by: Andrew Davis
---
drivers/dma/dma-uclass.c | 2 +-
drivers/dma/sandbox-dma-test.c | 4 ++--
drivers
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