Signed-off-by: Jim Liu
---
.../dts/nuvoton-npcm845-yosemite4-pincfg.dtsi | 168 +
arch/arm/dts/nuvoton-npcm845-yosemite4.dts| 233 ++
2 files changed, 401 insertions(+)
create mode 100644 arch/arm/dts/nuvoton-npcm845-yosemite4-pincfg.dtsi
create mode 100644 arch/
AST2700 is the 7th generation of Aspeed BMC SoCs.
A 32-bits Ibex RISC-V core is integrated as the boot MCU to run the
first stage bootloader, SPL, for the platform initialization.
This patch series starts by revising RISC-V common code to relax certain
restrictions for finer platform resource tun
Make the Atomic (A) ISA extension selectable. Thus CPUs such as
Ibex without the A extension can be supported.
Signed-off-by: Chia-Wei Wang
---
arch/riscv/Kconfig | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fa3b016c52..c58
Add prompt for STACK_SIZE_SHIFT to make it configurable.
The default value remains 14 as usual.
Signed-off-by: Chia-Wei Wang
---
arch/riscv/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c5859c5c54..d0476f975c 100644
---
The _image_binary_end symbol was aligned to the 8-bytes boundary.
However, the SPL device tree (u-boot-spl.dtb) is concatenated right
after the binary (u-boot-spl-nodtb.bin) wihtout the consideration of
the 8-bytes alignment restriction.
After then, for the SPL_SEPARATE_BSS case, fdtdec_setup() se
AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU
for the first stage bootloader execution, namely SPL.
This patch implements the preliminary base to successfully run SPL
on this RV32-based MCU to the console banner message.
Signed-off-by: Chia-Wei Wang
---
arch/riscv/Kconfig
Add the driver for the AST2700 Ibex timer, which uses CPU
cycles as the timer count running at 200MHz.
Signed-off-by: Chia-Wei Wang
---
drivers/timer/Kconfig | 6 +
drivers/timer/Makefile | 1 +
drivers/timer/ast_ibex_timer.c | 45 ++
3 file
Define and parse the header of the First Mutable Code (FMC)
of AST2700 SoCs at runtime phase.
The FMC header contains the information to load prebuilt binaries
required for device initialization such as DRAM and VGA.
Signed-off-by: Chia-Wei Wang
---
arch/riscv/include/asm/arch-ast2700/fmc_hdr.h
Enable the driver support for the DRAM and timer devices.
Signed-off-by: Chia-Wei Wang
---
configs/ibex-ast2700_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/ibex-ast2700_defconfig b/configs/ibex-ast2700_defconfig
index 22629b9048..855615cc1e 100644
--- a/configs/ibex-a
Hi Raymond,
On 16/08/2024 17:46, Raymond Mao wrote:
Add common sysinfo driver for armv8 platforms containing all
necessary SMBIOS information (Type 1 to 4).
Signed-off-by: Raymond Mao
---
arch/arm/cpu/armv8/Makefile | 5 +
arch/arm/cpu/armv8/sysinfo.c | 203 ++
On 8/19/24 4:05 AM, jianfenga@sony.com wrote:
usb reset not working error log
dragonboard410c => usb reset
resetting USB...
Bus usb@78d9000: Port not available.
dragonboard410c =>
On 19/08/2024 13:21, Marek Vasut wrote:
On 8/19/24 4:05 AM, jianfenga@sony.com wrote:
usb reset not working error log
dragonboard410c => usb reset
resetting USB...
Bus usb@78d9000: Port not available.
dragonboard410c =>
On 09/08/2024 01:59, Caleb Connolly wrote:
Supporting the newer SM8550 and SM8650 SoCs unfortunately requires a
bump in complexity for us. Qualcomm changed a lot about how the memory
map is handed over to the "kernel", adding many holes, not mapping
certain regions, and adding regions with 0 size
On 09/08/2024 02:48, Caleb Connolly wrote:
We don't actually need any clocks to get UFS up and running, resets are
useful though.
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/Kconfig| 8 +++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock-qcom.h | 1 +
d
On 09/08/2024 02:48, Caleb Connolly wrote:
This soc doesn't have the generic compatible.
Signed-off-by: Caleb Connolly
---
drivers/iommu/qcom-hyp-smmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c
index 7b646d840dd4..1b5a0
On 09/08/2024 02:48, Caleb Connolly wrote:
Enable clocks on SC7280
Signed-off-by: Caleb Connolly
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 24b71ba7be29..1a079264a554 100644
--- a/configs/qcom_defconfig
Hi Raymond,
I haven't managed to root cause it yet, but this series seems to make
the RB3 Gen 2 Qualcomm board hang during relocation.
How early post-relocation does any code here get called?
On 16/08/2024 17:46, Raymond Mao wrote:
Motivations for changes:
Current SMBIOS library and command-
Hi,
I have a custom installation of openSUSE Tumbleweed which uses u-boot
and Grub.
To use secure boot on the RPI, one creates a boot.img containing the
kernel and other files which is signed, and the eeprom is locked to
only allow booting with this signature.
(https://github.com/raspberrypi/usbbo
Hi Marek,
Thank you for the patch.
On dim., août 18, 2024 at 22:04, Marek Vasut
wrote:
> In case CONFIG_USB_MUSB_HOST is set, the ux500_gadget_ops get overridden
> to musb_usb_ops . Simply set the ops one way or the other depending on
> whether CONFIG_USB_MUSB_HOST is set or not.
>
> Fixes: ac
Hi Lukasz,
did you test this? It does not work for me. When I try it, the U-Boot
hangs in SPL. Here is what I got:
From Host:
bhahn@llp-hahn:~/git-repos/u-boot$ sudo uuu -b spl build/mini/flash.bin
uuu (Universal Update Utility) for nxp imx chips -- lib1.4.193
Success 0 Failure 0
7:3
usb reset not working error log
dragonboard410c => usb reset
resetting USB...
Bus usb@78d9000: Port not available.
dragonboard410c =>
After commit ed8fbd2889fc
Hey,
> -Ursprüngliche Nachricht-
> Von: Simon Glass
> Gesendet: Samstag, 17. August 2024 17:58
> An: mailingli...@johanneskirchmair.de; Sean Anderson
>
> Cc: u-boot@lists.denx.de; tr...@konsulko.com; Johannes Kirchmair
>
> Betreff: Re: [PATCH] spl: fix error handling of spl_fit_read
>
Hi Simon, Hi Peter,
First of all, thanks a lot for your answers.
1. When I enable the i2c bus in the config.txt (which is parsed by the rpi
first stage bootloader), the overlay put this as compatible:"brcm,bcm2835".
I checked in the source of U-Boot and the driver is not available.
2. One solutio
Hello dear U-Boot maintainers and developers,
I hope you are all doing well.
During one of our assessments we found a low impact buffer overread
vulnerability in the DHCP implementation of U-Boot.
According to the policy of the project [0] the attached vulnerability
advisory is hereby disclo
Enabling CONFIG_DM_SEQ_ALIAS enables code which relies on
`trailing_strtol()` - which is only linked in SPL when CONFIG_SPL_STRTO
is enabled.
CONFIG_SPL_STRTO is not enabled by default - to ensure this function is
available in SPL, CONFIG_SPL_DM_SEQ_ALIAS should select
CONFIG_SPL_STRTO.
Signed-of
Hi Benjamin,
> Hi Lukasz,
> did you test this? It does not work for me. When I try it, the U-Boot
> hangs in SPL. Here is what I got:
> From Host:
>
> bhahn@llp-hahn:~/git-repos/u-boot$ sudo uuu -b spl
> build/mini/flash.bin uuu (Universal Update Utility) for nxp imx chips
> -- lib1.4.193
>
>
On 8/16/24 20:40, Tom Rini wrote:
> On Fri, Aug 16, 2024 at 06:21:24PM +0200, Jerome Forissier wrote:
>>
>>
>> On 8/7/24 22:44, Tom Rini wrote:
>>> On Wed, Aug 07, 2024 at 07:11:44PM +0200, Jerome Forissier wrote:
>>>
This is a rework of a patch series by Maxim Uvarov: "net/lwip: add lwip
>
From: Chris Morgan
Add support for the Anbernic RG35XX-2024.
This device is a handheld gaming console (series) based around the
Anbernic H700 SoC. It comes with 1GB of RAM and multiple face buttons
for input.
Add support for the simplest model for now, and then iterate later to
add board detect
From: Jernej Skrabec
Adjust H616 LPDDR4 DRAM settings to be in line with vendor driver.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c| 33 +--
.../dram_timings/h616_lpddr4_2133.c | 2 +-
2 files changed, 24
From: Jernej Skrabec
It seems that different dies need different PHY pin mapping. Select
alternatives based on "bond ID".
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c | 59 +++---
1 file changed, 44 insertions(+), 15 dele
From: Jernej Skrabec
When comparing configuration procedure to vendor driver, I noticed that
one command was out of order and that some delays were missing.
Fix that.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c | 10 +-
1 file chan
From: Jernej Skrabec
It's safer to start scanning for columns first and then rows. Columns
reside on LSB address pins, which means that second configuration will
already have all needed row pins active.
This is also preparation for introducing DDR4 support, which need scan
for banks and bank gro
From: Jernej Skrabec
CSI1 channel (22) is missing and IOMMU (25) has priority flag set in
vendor bootloader. Fix that.
While at it, replace bandwidth flag with priority since original flag has
always value "true".
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/
From: Chris Morgan
Correct the default TPR6 parameter based on suggestion from Mikhail
Kalashnikov. [1]
[1]
https://lore.kernel.org/u-boot/4c003cab-c8b8-484d-924d-084e71fe6...@gmail.com/
Fixes: 4b02f0120a4b ("sunxi: H616: add LPDDR4 DRAM support")
Suggested-by: Mikhail Kalashnikov
Signed-off-
From: Chris Morgan
Add pinctrl nodes for the r_i2c node. Without the pinmux defined the
r_i2c bus may fail to work, possibly if the bootloader uses rsb mode
for the PMIC.
Link:
https://lore.kernel.org/linux-sunxi/172252952262.1669767.7675865282122079154.b4...@csie.org/
[ upstream commit: 7c9ea
From: Chris Morgan
Change the Anbernic RG35XX series to use the r_i2c bus for the PMIC
instead of the r_rsb bus. This is to keep the device tree consistent
as there are at least 3 devices (the RG35XX-SP, RG28XX, and RG40XX-H)
that have an external RTC on the r_i2c bus.
Link:
https://lore.kernel
From: Chris Morgan
The Anbernic RG35XX series of devices are based around an Allwinner
H700 SoC with 1GB of RAM, 2 SD cards, and multiple input buttons.
This bootloader has been tested on the Anbernic RG35XX-2024 and
RG35XX-H, but should be suitable for the entire lineup of H700 based
devices.
From: Hiago De Franco
The Linux kernel documentation has transitioned from using
kconfig-language.txt to kconfig-language.rst. Therefore update all
occurrences of kconfig-language.txt.
Signed-off-by: Hiago De Franco
---
Kconfig| 2 +-
scripts/kconfi
On Sun, Aug 18, 2024 at 10:06:05PM +0200, Richard Weinberger wrote:
> Simon,
>
> Am Sonntag, 18. August 2024, 17:47:01 CEST schrieb Simon Glass:
> > In that file, this is the line that builds the tools:
> >
> > ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR}
> > -w --board to
Hi,
On Sun, Aug 18, 2024 at 11:43:36PM GMT, Jonas Karlman wrote:
> Hi Marek and Sebastian,
>
> On 2024-08-18 22:35, Marek Vasut wrote:
> > On 8/2/24 7:59 PM, Sebastian Reichel wrote:
> >> Hi,
> >
> > Hello everyone,
> >
> >> On ROCK 5B power is usually supplied via it's USB-C port. This port ha
On Mon, 19 Aug 2024 09:59:38 -0500
Chris Morgan wrote:
Hi Chris,
> From: Chris Morgan
>
> The Anbernic RG35XX series of devices are based around an Allwinner
> H700 SoC with 1GB of RAM, 2 SD cards, and multiple input buttons.
>
> This bootloader has been tested on the Anbernic RG35XX-2024 and
On 8/18/24 11:43 PM, Jonas Karlman wrote:
Hi,
On ROCK 5B power is usually supplied via it's USB-C port. This port has the
data lines connected to RK3588, VBUS connected to the input regulator and
CC pins connected to FUSB302. FUSB302 is a USB-C controller, which can be
accessed via I2C from RK3
On 8/1/24 2:28 AM, Marek Vasut wrote:
On 7/29/24 1:55 PM, Svyatoslav Ryhel wrote:
[...]
What is the problem you observe on tegra 3 ?
i2c line fails since it probes in spl with your patch, but it does not
relocate and then probes once more after relocation. Probe fails along
with all devices o
Hi,
On Mon, Aug 19, 2024 at 07:08:37PM GMT, Marek Vasut wrote:
> On 8/18/24 11:43 PM, Jonas Karlman wrote:
> > > > On ROCK 5B power is usually supplied via it's USB-C port. This port has
> > > > the
> > > > data lines connected to RK3588, VBUS connected to the input regulator
> > > > and
> > > >
On 8/19/24 7:38 PM, Sebastian Reichel wrote:
Hi,
On Mon, Aug 19, 2024 at 07:08:37PM GMT, Marek Vasut wrote:
On 8/18/24 11:43 PM, Jonas Karlman wrote:
On ROCK 5B power is usually supplied via it's USB-C port. This port has the
data lines connected to RK3588, VBUS connected to the input regulato
+++
drivers/clk/qcom/clock-sm6115.c | 63 ++
drivers/clk/qcom/clock-sm8250.c | 115 +++
5 files changed, 394 insertions(+)
---
change-id: 20240819-b4-qcom-clk-dump-e25a0198f6c0
base-commit: b7d5ce05b1b52136af09cf34541c6a91079a4b86
// Caleb (they/them)
Add support for dumping a few of the clocks used on Qualcomm platforms.
Naming the Global PLL's, Root Clock Generators, and gate clocks.
This helps a lot with platform bringup and feature enablement by making
it easy to sanity check that the clocks are programmed correctly.
== Usage ==
Enable CO
Add debug data to dump PLL and RCG clocks.
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-sdm845.c | 93 +
1 file changed, 93 insertions(+)
diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c
index f41f8c9e8dee..adffb0
Add "clk dump" support for SM6115.
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-sm6115.c | 63 +
1 file changed, 63 insertions(+)
diff --git a/drivers/clk/qcom/clock-sm6115.c b/drivers/clk/qcom/clock-sm6115.c
index 8314a0deb348..9057dfe0bb18 1
Drop in the RCG and GPLL data for debugging these clocks.
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-sm8250.c | 115
1 file changed, 115 insertions(+)
diff --git a/drivers/clk/qcom/clock-sm8250.c b/drivers/clk/qcom/clock-sm8250.c
index af10
On Fri, Aug 16, 2024 at 02:43:57PM -0700, Raymond Mao wrote:
> Smaller implementation for SHA256 and SHA512 helps to reduce the
> ROM footprint though it has a certain impact on performance.
> As a trade-off, enable it as a default config when MbedTLS is
> enabled can reduce the target size signif
On Fri, Aug 16, 2024 at 02:43:49PM -0700, Raymond Mao wrote:
> Integrate MbedTLS v3.6 LTS (currently v3.6.0) with U-Boot.
>
> Motivations:
>
>
> 1. MbedTLS is well maintained with LTS versions.
> 2. LWIP is integrated with MbedTLS and easily to enable HTTPS.
> 3. MbedTLS recently sw
In order to build the docker container, which contains a download cache
of python modules, we need to have our versions be in sync in each
requirements file. Update some of the cases where which are older than
the rest of the project.
Signed-off-by: Tom Rini
---
test/py/requirements.txt | 6 +++-
Using "MAINTAINER" and "Description" have been replaced with
org.opencontainers.image namespace variables.
Signed-off-by: Tom Rini
---
tools/docker/Dockerfile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile
index cda873545
On Mon, Aug 19, 2024 at 04:53:51PM +0200, Jerome Forissier wrote:
>
>
> On 8/16/24 20:40, Tom Rini wrote:
> > On Fri, Aug 16, 2024 at 06:21:24PM +0200, Jerome Forissier wrote:
> >>
> >>
> >> On 8/7/24 22:44, Tom Rini wrote:
> >>> On Wed, Aug 07, 2024 at 07:11:44PM +0200, Jerome Forissier wrote:
>
On Fri, Aug 16, 2024 at 08:46:53AM -0700, Raymond Mao wrote:
> Update the expected test result to align with the smbios library changes.
>
> Signed-off-by: Raymond Mao
> ---
> test/py/tests/test_smbios.py | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/test/py/tests/tes
Hi Simon,
As a general comment, this is adding a load of code which is used by a
lot of platforms. As more and more aarch64 platforms are created, this
data grows. Why not use the devicetree for this hardware information?
That is what it is for.
This data does not belong in devicetree, the var
Hey all,
It's release day and here is -rc3. Things have been mostly quiet, and
with the -next window firmly open I believe things should remain quiet
moving forward.
In terms of a changelog,
git log --merges v2024.10-rc2..v2024.10-rc3
contains what I've pulled but as always, better PR messages a
On Mon, 19 Aug 2024 09:59:31 -0500
Chris Morgan wrote:
Hi,
> From: Jernej Skrabec
>
> It seems that different dies need different PHY pin mapping. Select
> alternatives based on "bond ID".
Do we really need this to determined at runtime? I appreciate the idea
of making the code more versatile
On Fri, 16 Aug 2024 14:43:49 -0700, Raymond Mao wrote:
> Integrate MbedTLS v3.6 LTS (currently v3.6.0) with U-Boot.
>
> Motivations:
>
>
> 1. MbedTLS is well maintained with LTS versions.
> 2. LWIP is integrated with MbedTLS and easily to enable HTTPS.
> 3. MbedTLS recently switched
On Mon, Aug 19, 2024 at 06:28:39PM -0600, Tom Rini wrote:
> On Fri, 16 Aug 2024 14:43:49 -0700, Raymond Mao wrote:
>
> > Integrate MbedTLS v3.6 LTS (currently v3.6.0) with U-Boot.
> >
> > Motivations:
> >
> >
> > 1. MbedTLS is well maintained with LTS versions.
> > 2. LWIP is integr
On Fri, 02 Aug 2024 15:45:00 +0200, Christian Marangi wrote:
> These are all the required patches to migrate clk and correctly support
> OF_UPSTREAM. This will align the clk index to upstream to support the same
> clk implementation with downstream and upstream DTS.
>
> Christian Marangi (5):
>
On Fri, 02 Aug 2024 15:53:01 +0200, Christian Marangi wrote:
> These are all the required patches to migrate clk and correctly support
> OF_UPSTREAM. This will align the clk index to upstream to support the same
> clk implementation with downstream and upstream DTS.
>
> Christian Marangi (14):
>
On Sat, 03 Aug 2024 10:32:49 +0200, Christian Marangi wrote:
> These are all the required patches to migrate clk and correctly support
> OF_UPSTREAM. This will align the clk index to upstream to support the same
> clk implementation with downstream and upstream DTS.
>
> Christian Marangi (13):
>
On Sat, 03 Aug 2024 10:40:33 +0200, Christian Marangi wrote:
> These are all the required patches to migrate clk and correctly support
> OF_UPSTREAM. This will align the clk index to upstream to support the same
> clk implementation with downstream and upstream DTS.
>
> Christian Marangi (15):
>
On Sat, 03 Aug 2024 10:43:18 +0200, Christian Marangi wrote:
> These are all the required patches to migrate clk and correctly support
> OF_UPSTREAM. This will align the clk index to upstream to support the same
> clk implementation with downstream and upstream DTS.
>
> Changes v2:
> - Fix typo i
Hi,
2024년 8월 14일 (수) 10:15, Sam Protsenko 님이 작성:
> Hi Minkyu,
>
> What do you think about this series? It's been pending for a while
> now, so may I ask you to take care of it?
>
> Thanks!
>
> On Wed, Aug 7, 2024 at 10:14 PM Sam Protsenko
> wrote:
> >
> > Bring 64-bit support to dw_mmc core and
> Subject: [PATCH] mx6: Expand bmode to support ecspi3 boot
>
> From: Fabio Estevam
>
> Currently, the bmode command only supports booting from ecspi1.
>
> Expand it to also support booting from ecspi3.
>
> Signed-off-by: Fabio Estevam
Acked-by: Peng Fan
Add a new ahab_derive command that derives the hardware unique key (HUK)
into a 16 or 32 bytes key and stores it at the given address.
Signed-off-by: Mathieu Othacehe
---
arch/arm/include/asm/mach-imx/ele_api.h | 2 +
arch/arm/mach-imx/ele_ahab.c| 31 ++
drivers/misc/imx_ele
Hi,
On Sun, 18 Aug 2024 22:04:15 +0200, Marek Vasut wrote:
> In case CONFIG_USB_MUSB_HOST is set, the ux500_gadget_ops get overridden
> to musb_usb_ops . Simply set the ops one way or the other depending on
> whether CONFIG_USB_MUSB_HOST is set or not.
>
>
Thanks, Applied to https://source.denx
Hi,
On Fri, 02 Aug 2024 11:28:13 +0200, Zixun LI wrote:
> Currently uclass index is used for bind/unbind which ignores alias
> sequence numbering. Use device sequence number instead as it's
> the number explicitly set in the DT.
>
> Also update documentation to use sequence number.
>
>
> [...]
Hi Simon,
Thank you for the patch.
On sam., août 10, 2024 at 14:51, Simon Glass wrote:
> The existing implementation of ut_assert_nextline_empty() cannot
> distinguish between an empty line and no line at all. It can in fact be
> called at the end of the recorded output and will happily return
Hi Simon,
Thank you for the patch.
On sam., août 10, 2024 at 14:51, Simon Glass wrote:
> The _REC suffix doesn't add much. Really what we want to know is whether
> the test uses the console, so rename this flag.
>
> Signed-off-by: Simon Glass
On next: commit 158cf0270cb6 ("Merge tag 'v2024.10
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