Move the information about out-of-tree building
from README to the generated HTML documentation.
Signed-off-by: Heinrich Schuchardt
---
README| 20
doc/build/gcc.rst | 28
2 files changed, 28 insertions(+), 20 deletions(-)
diff --git
Hi Fabio
On Mon, Apr 22, 2024 at 1:17 PM Fabio Estevam wrote:
>
> Hi Michael,
>
> On Mon, Apr 22, 2024 at 7:36 AM Michael Nazzareno Trimarchi
> wrote:
>
> > Are you considering if I wrap properly with VIDEO IS_ENABLED?
>
> I prefer you resend this patch as part of a complete series that adds
> p
Hello Heinrich,
Sorry, I'm having a hard time answering your questions.
> When writing the partition table shouldn't the offset be reflected in
the protective MBR fields StartingCHS and StartingLBA? See Table 5.4
"Protective MBR Partition Record protecting the entire disk*" of the
UEFI 2.10 speci
Hi Andre,
On Sat, 13 Jul 2024, at 4:53 AM, Andre Przywara wrote:
> #define AXP209_I2C_ADDR 0x34
> +#define AXP717_I2C_ADDR 0x34
>
> #define AXP305_I2C_ADDR 0x36
> #define AXP313_I2C_ADDR 0x36
> @@ -36,6 +37,8
> > Hi Marek,
>
> Hi,
>
> sorry for the really late reply.
>
> >> Does it also work if you 'setenv usb_pgood_delay 2000' ?
> >>
> > No, the USB stick is still not initialized.
> >
> >> Can you include the 5ms patch ?
> >
> > I've attached the patch which makes it work. Of course, I'm not sure if
Dear Tom,
The following changes since commit b182816c1fb436916661949213c543bf4d42250b:
turris_1x: Normalize Kconfig usage (2024-07-13 10:42:15 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi-2024-10-rc1-2
for you to fetch cha
Banana Pi F3 board is a industrial grade RISC-V development board, it
design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI
computing power. 4G DDR and 16G eMMC onboard.2x GbE Ethernet prot, 4x USB
3.0 and PCIe for M.2 interface, support HDMI and Dual MIPI-CSI Camera.
This patch i
Add basic support for SpacemiT's Banana Pi F3 board
Signed-off-by: Kongyang Liu
---
arch/riscv/Kconfig | 5 +
arch/riscv/cpu/k1/Kconfig | 18 ++
arch/riscv/cpu/k1/Makefile | 6 +
arch/riscv/cpu/k1/cpu.c| 9 +
arch/riscv/cpu/k1
Add document for Banana Pi F3 board which based on SpacemiT's K1 SoC.
Signed-off-by: Kongyang Liu
---
doc/board/index.rst| 1 +
doc/board/spacemit/bananapi_f3.rst | 78 ++
doc/board/spacemit/index.rst | 8 +++
3 files changed, 87 insertions(+)
On 7/14/24 17:08, Kongyang Liu wrote:
Add document for Banana Pi F3 board which based on SpacemiT's K1 SoC.
Signed-off-by: Kongyang Liu
---
doc/board/index.rst| 1 +
doc/board/spacemit/bananapi_f3.rst | 78 ++
doc/board/spacemit/index.rst
On 7/14/24 17:08, Kongyang Liu wrote:
Add basic support for SpacemiT's Banana Pi F3 board
Signed-off-by: Kongyang Liu
---
arch/riscv/Kconfig | 5 +
arch/riscv/cpu/k1/Kconfig | 18 ++
arch/riscv/cpu/k1/Makefile | 6 +
arch/riscv/cpu/k1/cpu
Heinrich Schuchardt 于2024年7月14日周日 23:19写道：
>
> On 7/14/24 17:08, Kongyang Liu wrote:
> > Add document for Banana Pi F3 board which based on SpacemiT's K1 SoC.
> >
> > Signed-off-by: Kongyang Liu
> > ---
> >
> > doc/board/index.rst| 1 +
> > doc/board/spacemit/bananapi_f3.rst |
Heinrich Schuchardt 于2024年7月14日周日 23:48写道：
>
> On 7/14/24 17:08, Kongyang Liu wrote:
> > Add basic support for SpacemiT's Banana Pi F3 board
> >
> > Signed-off-by: Kongyang Liu
> >
> > ---
> >
> > arch/riscv/Kconfig | 5 +
> > arch/riscv/cpu/k1/Kconfig | 18
On 12/07/2024 18:48, Tom Rini wrote:
On Wed, Jul 10, 2024 at 06:26:17PM +0200, Caleb Connolly wrote:
U-Boot already emits frame pointers on ARM64, but lacks the code to
parse them, as well as a mechanism for looking up symbol names at
runtime.
There was some (seemingly?) leftover code for s
We don't have audio support in U-Boot, but we do have boot menus. Add an
option to re-map the volume and power buttons to up/down/enter so that
in situations where these are the only available buttons (such as on
mobile phones) it's still possible to navigate menus built in U-Boot or
an external EF
Hello Caleb,
On 2024-07-14 21:49, Caleb Connolly wrote:
We don't have audio support in U-Boot, but we do have boot menus. Add
an
option to re-map the volume and power buttons to up/down/enter so that
in situations where these are the only available buttons (such as on
mobile phones) it's still
Replace "rochchip" by "rockchip" in two instances.
Signed-off-by: Sebastian Kropatsch
---
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
b/drivers/phy/rockchip/phy-rock
Several fixes for RK3588's PCIe PHY from upstream Linux [1][2], which
uses a very similar driver.
Tested on a FriendlyElec CM3588 NAS which uses PCIe bifurcation in
1x1x1x1 mode to enable four M.2 NVMe sockets. With these fixes applied,
NVMe SSDs get properly recognized in U-Boot.
While at it, cor
Several identifiers use "rochchip" instead of "rockchip".
Fix this by replacing every instance of "rochchip" with "rockchip".
Signed-off-by: Sebastian Kropatsch
---
drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/dri
Misconfigured `PHP_GRF_PCIESEL` values are causing bifurcation issues,
for example on the FriendlyElec CM3588 NAS board which uses bifurcation
on both PCIe PCIe ports (all four lanes) to enable four M.2 NVMe
sockets. Without this fix, NVMe devices do not get recognized.
Correct the `PHP_GRF_PCIESE
The pcie1ln_sel bits for the RK3588 are getting set but not cleared due
to an incorrect write mask.
Use a newly introduced constant for the write mask to fix this.
Also introduce a GENMASK-based constant for PCIE30_PHY_MODE.
This fix is adapted from the upstream Linux commit by Sebastian Reichel:
On Sat, 29 Jun 2024 02:22:14 +1000
John Watts wrote:
Hi,
> On Fri, Jun 28, 2024 at 04:17:27PM +0100, Andre Przywara wrote:
> > > I do not know if this patch is still a
> > > necessity; though if John is nudging about it, it probably is.
> >
> > Yes apparently he needs it, though I am not ent
On Sun, 14 Jul 2024 20:20:44 +1200
"Ryan Walklin" wrote:
Hi Ryan,
> On Sat, 13 Jul 2024, at 4:53 AM, Andre Przywara wrote:
>
> > #define AXP209_I2C_ADDR0x34
> > +#define AXP717_I2C_ADDR0x34
> >
> > #define AXP305_I2C_ADDR0x36
> > #
On Fri, 31 May 2024 16:21:38 +0200
Tobias Schramm wrote:
Hi Tobias,
> Previously enabling I2C1 when using a V3s-based SoC had no effect.
> Set pinmux on PE21 and PE22 to I2C1 function when enabling I2C1 on
> V3s-based SoCs.
Can you say what this patch is about?
Is there any V3s board that has t
Hi there,
I'm orpahning all the pending patches I've submitted to this project. If you
have them in your patch queue, please disregard them.
Full list:
- boot: Pass baud rate to stdout
https://lore.kernel.org/r/20240411-stdout-v1-1-66ebe5bb1...@jookia.org
- pwm: sunxi: Add support Allwinner D1 P
Hi Dragan,
On 14/07/2024 22:47, Dragan Simic wrote:
Hello Caleb,
On 2024-07-14 21:49, Caleb Connolly wrote:
We don't have audio support in U-Boot, but we do have boot menus. Add an
option to re-map the volume and power buttons to up/down/enter so that
in situations where these are the only ava
On 2024/7/15 05:23, Sebastian Kropatsch wrote:
Replace "rochchip" by "rockchip" in two instances.
Signed-off-by: Sebastian Kropatsch
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
On 2024/7/15 05:23, Sebastian Kropatsch wrote:
Several identifiers use "rochchip" instead of "rockchip".
Fix this by replacing every instance of "rochchip" with "rockchip".
Signed-off-by: Sebastian Kropatsch
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/phy/rockchip/phy-rockchip-s
On 2024/7/15 05:23, Sebastian Kropatsch wrote:
Misconfigured `PHP_GRF_PCIESEL` values are causing bifurcation issues,
for example on the FriendlyElec CM3588 NAS board which uses bifurcation
on both PCIe PCIe ports (all four lanes) to enable four M.2 NVMe
sockets. Without this fix, NVMe devices
On 2024/7/15 05:23, Sebastian Kropatsch wrote:
The pcie1ln_sel bits for the RK3588 are getting set but not cleared due
to an incorrect write mask.
Use a newly introduced constant for the write mask to fix this.
Also introduce a GENMASK-based constant for PCIE30_PHY_MODE.
This fix is adapted fr
@Tom,
I can't find these patches (and v1) in patchworks. Do you have an
idea, why this is the case?
Thanks,
Stefan
On 7/12/24 11:07, Rasmus Villemoes wrote:
Two related leftovers I found while looking at remaining
hw_watchdog/CONFIG_HW_WATCHDOG items.
v2: Add Stefan's R-bs. Trim commit log in
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