On 12/29/22 18:15, Pali Rohár wrote:
sata_sil.c is PCI driver and without CONFIG_PCI is building of U-Boot failing:
LD u-boot
ld.bfd: drivers/ata/sata_sil.o: in function `sil_exec_cmd':
drivers/ata/sata_sil.c:148: undefined reference to `dm_pci_phys_to_bus'
ld.bfd: dri
Hello Pali
On 01.01.23 07:57, Heiko Schocher wrote:
> Hello Pali,
>
> On 31.12.22 16:37, Pali Rohár wrote:
>> On Saturday 31 December 2022 16:31:57 Heiko Schocher wrote:
>>> Hello Pali,
>>>
>>> On 31.12.22 14:36, Heiko Schocher wrote:
Hello Pali,
On 31.12.22 13:58, Pali Rohár wrote
Hi Francesco,
france...@dolcini.it wrote on Fri, 16 Dec 2022 17:30:18 +0100:
> On Fri, Dec 16, 2022 at 04:35:01PM +0100, Miquel Raynal wrote:
> > ma...@denx.de wrote on Fri, 16 Dec 2022 15:32:28 +0100:
> > > The second part of the message, as far as I understand it, is
> > > "ignore problems th
Hi David,
goli...@infraroot.at wrote on Sun, 25 Dec 2022 11:05:24 +0100:
> For a squashfs filesystem, the fragment table is followed by
> the following tables: NFS export table, ID table, xattr table.
>
> The export and xattr tables are both completely optional, but
> the ID table is mandatory.
On Sat, 3 Dec 2022 at 04:28, wrote:
>
> From: Jassi Brar
>
> fwu_get_mdata() sounds more appropriate than fwu_get_verified_mdata()
>
> Signed-off-by: Jassi Brar
> ---
> Forgot to send this patch previously in v2
> cmd/fwu_mdata.c | 2 +-
> include/fwu.h | 4 ++--
> lib/fwu_update
On Sat, 3 Dec 2022 at 04:17, wrote:
>
> From: Jassi Brar
>
> The common code can now read, verify and fix meta-data copies
> while exposing one consistent structure to users.
> Only the .read_mdata() and .write_mdata() callbacks of fwu_mdata_ops
> are needed. Get rid of .get_mdata() .update_mdat
Hi Jassi,
On Thu, 22 Dec 2022 at 13:59, Ilias Apalodimas
wrote:
>
> Hi Jassi,
>
> On Fri, Dec 02, 2022 at 09:17:12PM -0600, jassisinghb...@gmail.com wrote:
> > From: Jassi Brar
> >
> > Moving towards using common code for meta-data management,
> > implement the read/write mdata hooks.
> >
> > Si
On 14/12/2022 07:45, Marek Vasut wrote:
Commit d5ba6188dfb ("cmd: pxe_utils: Check fdtcontroladdr in label_boot")
forces '$fdtcontroladdr' DT address as a third parameter of bootm command
even if the PXE transfer pulls in a fitImage which contains configuration
node with its own DT that is prefer
On 17/12/2022 18:41, Marek Vasut wrote:
This reverts commit ed6251187afabf811a5fd49a44ebd61c53c7b378.
Superseded by "cmd: pxe_utils: Limit fdtcontroladdr usage to non-fitImage"
which is less heavy-handed approach and retains part of the original
behavior for non-fitImage.
Signed-off-by: Marek V
On 12/21/22 10:18, Stefan Roese wrote:
We've noticed that at least one Kirkwood board (Pogo v4) has problems
with the new orion DM timer implementation. Debugging revealed that this
issue is related with the static variable "early_init_done" which does
not work correctly before relocation in all
Hi Tom,
please pull this last minute fix:
- orion-timer: Fix problem with early static variable (Stefan)
Here the Azure build, without any issues:
https://dev.azure
Hi Simon,
On 12/17/22 22:29, Simon Glass wrote:
Some blobs are actually not necessary for the board to work correctly. Add
a property to allow this to be indicated. Missing optional blobs do not
cause a build failure.
Signed-off-by: Simon Glass
---
tools/binman/binman.rst|
Hi Peter,
On 10/25/22 09:52, Peter Robinson wrote:
Sync rk3399.dtsi and associated bindings includes. Fix up building
of clk/rockchip/clk_rk3399.c for the changes as well as adjusting
the rk3399-u-boot.dtsi for the new upstream pieces.
Signed-off-by: Peter Robinson
---
arch/arm/dts/rk3399-op
Hi Michal, Kever,
On 12/18/22 3:03 PM, Michal Suchánek wrote:
Hello,
On Sun, Dec 18, 2022 at 06:00:13PM +0800, Kever Yang wrote:
> Hi Quentin,
>
> I would prefer you to remove SPL_ATF_NO_PLATFORM_PARAM in those boards
> you have test,
then we will have no end of this problem.
I could
Hi Kever,
On 12/18/22 13:50, Kever Yang wrote:
Rockchip platform use TPL to do the DRAM initialize for all the SoCs,
if TPL is not available, means no available DRAM init program, and the
Why would the TPL not be available?
Are you thinking about the TPL being provided externally as a blob?
From: Shawn Guo
Function ddr_load_train_firmware() is called 4 times in a loop by
ddr_cfg_phy(). The first 3 calls are all '1D' type and just loading the
same FWs. Let's add a type check and save 2 of them. This helps to
reduce DDRPHY training time from 269 ms down to 212 ms, and thus speed
up
On Mon, Jan 2, 2023 at 9:21 AM Shawn Guo wrote:
>
> From: Shawn Guo
>
> Function ddr_load_train_firmware() is called 4 times in a loop by
> ddr_cfg_phy(). The first 3 calls are all '1D' type and just loading the
> same FWs. Let's add a type check and save 2 of them. This helps to
> reduce DDRPH
On Mon, Jan 02, 2023 at 11:52:17AM +0100, Quentin Schulz wrote:
> Hi Simon,
>
> On 12/17/22 22:29, Simon Glass wrote:
> > Some blobs are actually not necessary for the board to work correctly. Add
> > a property to allow this to be indicated. Missing optional blobs do not
> > cause a build failure
On Mon, Jan 02, 2023 at 11:49:26AM +0100, Stefan Roese wrote:
> Hi Tom,
>
> please pull this last minute fix:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Hello Simon,
> -Original Message-
> From: Simon Glass
> >
> > > $ buildman -b zstd2 --boards dh_imx6,m53menlo,mvebu_espressobin-
> 88f3720,sandbox,sandbox64,stm32mp15_dhcom_basic,stm32mp15_dhcor_basi
> c,turris_mox,turris_omnia -sS
> > > Summary of 3 commits for 9 boards (8 threads, 1 job
On Mon, 2 Jan 2023 at 03:48, Etienne Carriere
wrote:
>
> Hi Jassi,
>
> On Thu, 22 Dec 2022 at 13:59, Ilias Apalodimas
> wrote:
> >
> > Hi Jassi,
> >
> > On Fri, Dec 02, 2022 at 09:17:12PM -0600, jassisinghb...@gmail.com wrote:
> > > From: Jassi Brar
> > >
> > > Moving towards using common code f
On Tue, 13 Dec 2022 at 09:00, Etienne Carriere
wrote:
>
> Hello Jassi,
>
> On Sat, 3 Dec 2022 at 04:17, wrote:
> >
> > From: Jassi Brar
> >
> > Instead of each i/f having to implement their own meta-data verification
> > and storage, move the logic in common code. This simplifies the i/f code
>
Hi Simon,
On 12/22/22 00:07, Simon Glass wrote:
These have got out of data recently. Regenerate them.
Signed-off-by: Simon Glass
---
[...]
+.. _etype_u_boot_vpl:
+
+Entry: u-boot-vpl: U-Boot VPL binary
+
+
+Properties / Entry arguments:
+- filename: Fi
Hi Simon,
On 12/22/22 00:07, Simon Glass wrote:
Add a function which checks whether data is in ELF format or not. This
will be used by binman to check this for entries.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/elf.py | 16
tools/binman/elf_te
On Mon, Jan 02, 2023 at 04:02:06PM +, Maier, Brandon L
Collins wrote:
> Hello Simon,
>
> > -Original Message-
> > From: Simon Glass
> > >
> > > > $ buildman -b zstd2 --boards dh_imx6,m53menlo,mvebu_espressobin-
> > 88f3720,sandbox,sandbox64,stm32mp15_dhcom_
Hi Simon,
On 12/22/22 00:07, Simon Glass wrote:
Enable multiple-images so we can generate more than one image. Also
add a comment for the end of the #if block.
Signed-off-by: Simon Glass
---
(no changes since v5)
Changes in v5:
- Rename from 'Include binman script in 64-bit boards'
- Drop du
On Wed, Dec 21, 2022 at 9:58 PM Marek Vasut wrote:
>
> On 12/22/22 04:05, Adam Ford wrote:
> > On Wed, Dec 21, 2022 at 6:47 PM Marek Vasut wrote:
> >>
> >> Implement basic PSCI provider to let OS turn CPU cores off and on,
> >> power off and restart the system and determine PSCI version. This
> >
On Thu, 22 Dec 2022 at 06:45, Ilias Apalodimas
wrote:
>
> On Fri, Dec 02, 2022 at 09:16:51PM -0600, jassisinghb...@gmail.com wrote:
> > From: Jassi Brar
> >
> > Use cached values and avoid parsing and scanning through partitions
> > everytime for meta-data partitions because they can't change aft
For 'sf write', 'sf read', 'sf erase' using excessive values of offset
or size should not display the command usage but only the error message.
Use CMD_RET_* constants.
Simplify do_spi_flash().
Heinrich Schuchardt (3):
cmd: fix return code of 'sf write' and 'sf read'
cmd: simplify do_spi_flas
CMD_RET_USAGE == -1. The special handling of this value at the end of
do_spi_flash() does not make any sense.
To avoid future confusion use the CMD_RET_* constants and simplify the
code.
Signed-off-by: Heinrich Schuchardt
---
cmd/sf.c | 19 ++-
1 file changed, 6 insertions(+), 1
If the offset or the size passed to the 'sf write' or 'sf read' command
exceeds the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.
Use the CMD_RET_* constants instead of 0, 1, -1.
Simplify a logical expression in the final retur
If the offset or the size passed to the 'sf erase' command exceeds
the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.
Use the CMD_RET_* constants instead of 0, 1, -1.
Simplify a logical expression in the final return statement.
Hi Simon,
On 12/22/22 00:07, Simon Glass wrote:
OP-TEE has a format with a binary header that can be used instead of the
ELF file. With newer versions of OP-TEE this may be required on some
platforms.
Add support for this in binman. First, add a method to obtain the ELF
sections from an entry,
Video out on RK3288 boards has been broken since from few
releases due to the adding of reset support on vop but
missed enabling DM_RESET on associated boards.
This patch fixes those RK3288 boards.
Cc: Simon Glass
Cc: Lin Huang
Cc: Jernej Skrabec
Cc: Michael Trimarchi
Cc: Arnaud Patard (Rtp)
The patchset reduces ~400 lines of code, while keeping the functionality same
and making
meta-data operations much faster (by using cached structures).
Issue:
meta-data copies (primary and secondary) are being handled by the
backend/storage layer
instead of the common core in fwu.c (as also not
Use cached values and avoid parsing and scanning through partitions
everytime for meta-data partitions because they can't change after bootup.
Acked-by: Etienne Carriere
Signed-off-by: Jassi Brar
---
drivers/fwu-mdata/gpt_blk.c | 43 +
1 file changed, 24 inse
Instead of each i/f having to implement their own meta-data verification
and storage, move the logic in common code. This simplifies the i/f code
much simpler and compact.
Signed-off-by: Jassi Brar
---
drivers/fwu-mdata/fwu-mdata-uclass.c | 34 +++
include/fwu.h| 41
Moving towards using common code for meta-data management,
implement the read/write mdata hooks.
Signed-off-by: Jassi Brar
Reviewed-by: Etienne Carriere
Reviewed-by: Ilias Apalodimas
---
drivers/fwu-mdata/gpt_blk.c | 36
1 file changed, 36 insertions(+)
di
The common code can now read, verify and fix meta-data copies
while exposing one consistent structure to users.
Only the .read_mdata() and .write_mdata() callbacks of fwu_mdata_ops
are needed. Get rid of .get_mdata() .update_mdata() .get_mdata_part_num()
.read_mdata_partition() and .write_mdata_pa
fwu_get_mdata() sounds more appropriate than fwu_get_verified_mdata()
Signed-off-by: Jassi Brar
Reviewed-by: Etienne Carriere
Reviewed-by: Ilias Apalodimas
---
cmd/fwu_mdata.c | 2 +-
include/fwu.h | 4 ++--
lib/fwu_updates/fwu.c | 6 +++---
3 files changed, 6 insertions(+), 6 de
On Mon, Dec 19, 2022 at 11:36:44AM +0800, Macpaul Lin wrote:
> On 12/13/22 03:02, Tom Rini wrote:
> > On Mon, Dec 12, 2022 at 01:53:05PM -0500, Tom Rini wrote:
> > > On Mon, Dec 12, 2022 at 11:53:04AM -0500, Tom Rini wrote:
> > > > On Thu, Nov 10, 2022 at 03:34:53PM +0800, Macpaul Lin wrote:
> > >
On 1/2/23 17:44, Adam Ford wrote:
On Wed, Dec 21, 2022 at 9:58 PM Marek Vasut wrote:
On 12/22/22 04:05, Adam Ford wrote:
On Wed, Dec 21, 2022 at 6:47 PM Marek Vasut wrote:
Implement basic PSCI provider to let OS turn CPU cores off and on,
power off and restart the system and determine PSCI
On 12/23/22 13:33, Sergiu Moga wrote:
Add the USB related DT nodes for the sama7g5ek board.
Signed-off-by: Sergiu Moga
---
arch/arm/dts/at91-sama7g5ek.dts | 34 +++
Board DT and SoC DT should be separate patches.
Are these DT changes part of upstream Linux yet ?
arch/arm/dts
On 12/23/22 13:33, Sergiu Moga wrote:
Add definitions for an additional main UTMI clock as well as its
respective subclocks.
Signed-off-by: Sergiu Moga
---
include/dt-bindings/clk/at91.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bind
On 12/23/22 13:33, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 boards.
Signed-off-by: Sergiu Moga
---
arch/arm/dts/at91-sam9x60_curiosity.dts | 21 +
arch/arm/dts/sam9x60.dtsi | 18 ++
Board and SoC DT changes should be
On 12/23/22 13:34, Sergiu Moga wrote:
[...]
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 9b955c1bd6..9ae55c6e5d 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -5,6 +5,9 @@
*/
#include
+
+#if !(CONFIG_IS_ENABLED(DM_USB)
On 12/23/22 13:34, Sergiu Moga wrote:
From: Cristian Birsan
The `ohci_register` function expects that the OHCI driver's
priv is a struct whose first field is of type `ohci_t`.
The original conversion to DM did not have it and this
inconsistency revealed itself whenever U-Boot required
multiple
On 12/23/22 13:34, Sergiu Moga wrote:
Add the ability to enable/disable whatever USB PHY's are
passed to the AT91 OHCI driver through DT.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
drivers/usb/host/ohci-at91.c | 31 +++
1 file changed, 31 insertions(+)
On Mon, Jan 2, 2023 at 5:41 PM Marek Vasut wrote:
>
> On 1/2/23 17:44, Adam Ford wrote:
> > On Wed, Dec 21, 2022 at 9:58 PM Marek Vasut wrote:
> >>
> >> On 12/22/22 04:05, Adam Ford wrote:
> >>> On Wed, Dec 21, 2022 at 6:47 PM Marek Vasut wrote:
>
> Implement basic PSCI provider to let
On 1/3/23 00:47, Adam Ford wrote:
On Mon, Jan 2, 2023 at 5:41 PM Marek Vasut wrote:
On 1/2/23 17:44, Adam Ford wrote:
On Wed, Dec 21, 2022 at 9:58 PM Marek Vasut wrote:
On 12/22/22 04:05, Adam Ford wrote:
On Wed, Dec 21, 2022 at 6:47 PM Marek Vasut wrote:
Implement basic PSCI provider
On Mon, Jan 2, 2023 at 5:58 PM Marek Vasut wrote:
>
> On 1/3/23 00:47, Adam Ford wrote:
> > On Mon, Jan 2, 2023 at 5:41 PM Marek Vasut wrote:
> >>
> >> On 1/2/23 17:44, Adam Ford wrote:
> >>> On Wed, Dec 21, 2022 at 9:58 PM Marek Vasut wrote:
>
> On 12/22/22 04:05, Adam Ford wrote:
> >
Hi,
this is the extracted version of the Allwinner D1/D1s/R528/T113-s DRAM
"driver", to be included into mainline U-Boot at some point. With this
on top of my previous T113-s3 support series[1], I can boot my MangoPi MQ-R
without the help of awboot.
The DRAM init code is based on awboot's version,
At the moment all Allwinner DRAM initialisation routines are stored in
arch/arm/mach-sunxi, even though those "drivers" are just a giant
collection of writel's, without any architectural dependency.
The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V
cores) share the same die, so
The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the
same DRAM initialisation code.
Make use of prior art here and lift some code from awboot[1], which
carried init code based on earlier decompilation efforts, but with a
GPL2 license tag.
This code has been heavily reworked and
在 2023-01-03星期二的 01:17 +，Andre Przywara写道：
> The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use
> the
> same DRAM initialisation code.
> Make use of prior art here and lift some code from awboot[1], which
> carried init code based on earlier decompilation efforts, but with a
>
Intent of these patches is to fix register reads in STIG mode and also
use STIG mode while reading flash registers.
Currently if you try to read a register while in STIG mode there is no
support for ADDR and thus naturally a register never gets read from the
flash.
This series supercedes the previ
Setup the Addr bit field while issuing register reads in STIG mode. This
is needed for example flashes like cypress define in their transaction
table that to read any register there is 1 cmd byte and a few more address
bytes trailing the cmd byte. Absence of addr bytes will obviously fail
to read c
Fix the issue where some flash chips like cypress S25HS256T return the
value of the same register over and over in DAC mode.
For example in the TI K3-AM62x Processors refer [0] Technical Reference
Manual there is a layer of digital logic in front of the QSPI/OSPI
Drive when used in DAC mode. This
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