Hi Marek,
On 09/07/2020 08:33, Marek Szyprowski wrote:
Hi Matthias,
On 11.06.2020 10:39, Matthias Brugger wrote:
...
Series looks good to me. The problem is that on RPi4 with 8 GB the USB FW get's
loaded via the RPi FW. Nicolas provided a series which is under review right
now. Without this se
Hi Marcin,
> From: Marcin Sloniewski
> Sent: mercredi 8 juillet 2020 19:56
>
> This commit adds device tree files supporting SBC from Seeed Studio based on
> STM32MP157C.
>
> This works with generic stm32mp1 config.
> Right now only booting from SD card is supported.
>
> Signed-off-by: Marcin
On Wed, Jul 8, 2020 at 11:02 PM Simon Glass wrote:
>
> These prevent use of compile-time checks such as:
>
> if (CONFIG_IS_ENABLED(DM_SPI))
>
> since, for example, if CONFIG_SPL_DM_SPI is not enabled then the
> definitions are not included by spi.h and the C code will not build.
>
> The #ifdef
Hi Simon,
On Mon, Jun 29, 2020 at 10:56 PM Simon Glass wrote:
>
> Hi Rayagonda,
>
> On Sun, 28 Jun 2020 at 21:08, Rayagonda Kokatanur
> wrote:
> >
> > Hi Simon,
> >
> > On Fri, Jun 26, 2020 at 6:42 AM Simon Glass wrote:
> > >
> > > Hi Rayagonda,
> > >
> > > On Wed, 10 Jun 2020 at 05:15, Rayagon
Certain architectures (ppc, mips, sh, m68k) use setup board_part1 and
setup_board_part2 calls during pre-relocation init to populate gd->bd
boardinfo fields. This makes the generic init sequence cluttered with
arch-specific ifdefs.
In order to clean these arch-specific sequences from generic init,
+ Vignesh
On Wed, Jul 8, 2020 at 1:37 AM wrote:
>
> From: Shivamurthy Shastri
>
> This patchset is for the new series of Micron SPI NAND devices, and the
> following links are their datasheet.
>
> These devices are already supported in Linux Kernel.
>
> M78A:
> [1]
> https://www.micron.com/~/me
Factor out sh-specific bdinfo setup from generic init sequence to
arch_setup_bdinfo in arch/sh/lib/board.c.
Signed-off-by: Ovidiu Panait
---
arch/sh/lib/board.c | 18 ++
common/board_f.c| 4 ++--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/sh/lib/bo
Factor out mips-specific bdinfo setup from generic init sequence to
arch_setup_bdinfo in arch/mips/lib/boot.c.
Signed-off-by: Ovidiu Panait
---
arch/mips/lib/boot.c | 18 ++
common/board_f.c | 25 +
2 files changed, 19 insertions(+), 24 deletions(-)
Remove the initr_serial->serial_initialize indirection and call
serial_initialize directly.
Signed-off-by: Ovidiu Panait
---
common/board_r.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index 5e924322b2..522059c5a5 100644
--- a/
Factor out ppc-specific bdinfo setup from generic init sequence to
arch_setup_bdinfo in arch/powerpc/lib/bdinfo.c.
Signed-off-by: Ovidiu Panait
---
arch/powerpc/lib/bdinfo.c | 42 +++
common/board_f.c | 39 ++--
2 file
Factor out m68k-specific bdinfo setup to arch_setup_bdinfo in
arch/m68k/lib/bdinfo.c. Also, use if(IS_ENABLED()) instead of #ifdef where
possible.
Signed-off-by: Ovidiu Panait
---
arch/m68k/lib/bdinfo.c | 32
common/board_f.c | 14 --
2 files c
Extend manual relocation of block_cache list pointers to all platforms that
enable CONFIG_NEEDS_MANUAL_RELOC. Remove m68k-specific checks and provide a
single implementation that adds gd->reloc_off to the pre-relocation
pointers.
Cc: Angelo Durgehello
Signed-off-by: Ovidiu Panait
---
common/bo
serial_initialize is called only during the common init sequence, after
relocation (in common/board_r.c). Because it has a void return value, it
has to wrapped in initr_serial. In order to be able to get rid of this
indirection, make serial_initialize return int.
Remove extern from prototype in or
blkcache_init manually relocates blkcache list pointers when
CONFIG_NEEDS_MANUAL_RELOC is enabled. However, it is called very late in
the boot sequence, which could be a problem if previous boot calls execute
blkcache operations with the non-relocated pointers. For example, mmc is
initialized earli
Use IS_ENABLED() instead of #ifdef in blk_post_probe function.
No functional change intended.
Signed-off-by: Ovidiu Panait
---
drivers/block/blk-uclass.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index b
On Tue, Jul 7, 2020 at 7:00 PM Vignesh Raghavendra wrote:
>
> Hi Jagan,
>
> On 15/06/20 9:21 pm, Pratyush Yadav wrote:
> > On 05/06/20 06:14PM, Pratyush Yadav wrote:
> >> Hi,
> >>
> >> This series adds support for octal DTR flashes in the spi-nor framework,
> >> and then adds hooks for the Cypress
From: Peng Fan
Current DM CLK is a bit complicated, for simplity, let DM clk only
support enable/disable/get_rate. For the expected rate settings,
we use non-DM clk to do that. Then we could have simple DM clk for
i.MX and could also share between SPL/U-Boot proper.
Signed-off-by: Peng Fan
---
From: Peng Fan
Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the
weak function in driver
Add set_clk_eqos to configure eQoS clk
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/clock_imx8mm.c | 90 ++
1 file changed, 90 insertions(+)
diff --g
From: Peng Fan
Configure NoC clk for better system performance
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/clock_imx8mm.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index 6ab75f0e2c
From: Peng Fan
This is to upstream some patches from NXP tree after adapt to U-Boot
upstream.
Added a few APIs that directly touch CCM/PLL register without CLK DM.
I plan to simplify the clk DM part to only keep gate and get rate, so
move complicated set rate out from clk DM with non-DM API.
P
From: Peng Fan
A53 CCM root max support 1GHz, to support high freq, we need
to switch ARM clk sources from ARM PLL directly.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/clock_imx8mm.c | 130 -
1 file changed, 129 insertions(+), 1 deletion(-)
diff --git
From: Peng Fan
We use non-dm code to configure the clk settings in order to simplify
dm clk driver in future, so remove the duplicated code from clk driver
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx8mm.c | 34 --
drivers/clk/imx/clk-imx8mn.c | 34 --
From: Ye Li
iMX8MP has 6 fused parts in each qualification tier, with core, VPU,
ISP, NPU or DSP fused respectively.
The configuration tables for enabled modules:
MIMX8ML8DVNLZAA Quad Core, VPU, NPU, ISP, DSP
MIMX8ML7DVNLZAA Quad Core, NPU, ISP
MIMX8ML6DVNLZAA Quad Cor
From: Ye Li
To use one defconfig for all boot device, we have to runtime set
env offset and return env medium according to the boot device.
This patch overrides the env_get_offset and env_get_location to
implement the feature.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx
From: Peng Fan
ROM SError happens on two cases:
1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
when ROM patch lock is fused, this write will cause SError.
2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
is field return mode, but the last 4K
From: Peng Fan
For non-Quad SoCs, the fused cpu cores could be powered down in SPL
to save power.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 158 +
arch/arm/mach-imx/imx8m/soc.c | 19
2 files changed, 177 insertions(+
From: Peng Fan
To fused part, we need to disable nodes of dtb to let kernel boot.
To mfgtool, USB issue when using super-speed for mfgtool, temporally
work around the problem to use high-speed only.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 333 ++
From: Peng Fan
Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.
When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the defaul
On Fri, May 22, 2020 at 10:41 PM wrote:
>
> From: Bacem Daassi
>
> Signed-off-by: Bacem Daassi
>
> Clean up the Spansion/Cypress/Infineon device ID table.
>Remove s25fl512s_256k since it's a duplicate of s25fl512s.
>Remove s25fl512s_64k and s25fl512s_512k since these devices do not exist
On Mon, May 11, 2020 at 6:53 PM Johannes Holland
wrote:
>
> The spi bitbanging driver did not implement all spi modes properly. Add
> code to support all spi modes, honoring soft_spi_set_mode() and
> defaulting to spi mode 0. Previously, CPHA was implemented inversely
> (defaulting to CPHA=1) and
On Sun, Jun 21, 2020 at 5:22 PM Pragnesh Patel
wrote:
>
> Enable QE bit for ISSI flash chips.
>
> QE enablement logic is similar to what Macronix
> has, so reuse the existing code itself.
>
> Signed-off-by: Pragnesh Patel
> ---
Applied to u-boot-spi/master
Hello Yash,
Am 23.04.2020 um 13:27 schrieb Yash Shah:
DT documentation for PWM controller added from Linux v5.6
commit: daa78cc3408e
("pwm: sifive: Add DT documentation for SiFive PWM Controller")
Signed-off-by: Yash Shah
---
doc/device-tree-bindings/pwm/pwm-sifive.txt | 31
Hello Yash,
Am 23.04.2020 um 13:27 schrieb Yash Shah:
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC
This driver is simple port of Linux pwm sifive driver from Linux v5.6
commit: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM")
Signed-off-by: Yash Shah
--
Hello Stefan,
Am 26.05.2020 um 14:13 schrieb Stefan Roese:
From: Suneel Garapati
Add support for I2C controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
Signed-off-by: Stefan Roese
Cc: Heiko Schocher
Cc: Simon Gl
Hello Alex,
Am 01.06.2020 um 21:56 schrieb Alex Nemirovsky:
From: Arthur Li
Add I2C controller support for Cortina Access CA SoCs
Signed-off-by: Arthur Li
Signed-off-by: Alex Nemirovsky
CC: Heiko Schocher
Reviewed-by: Heiko Schocher
---
Changes in v9:
- specially include bitops.h an
Hello Alex,
Am 01.06.2020 um 21:56 schrieb Alex Nemirovsky:
Add I2C board support for Cortina Access Presidio Engineering Board
Signed-off-by: Alex Nemirovsky
CC: Heiko Schocher
Reviewed-by: Heiko Schocher
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
C
Hello Ye Li,
Am 10.06.2020 um 05:29 schrieb Ye Li:
Current driver calls the devfdt_get_addr to get the base address
of lpi2c controller in each sub-functions. Since the devfdt_get_addr
accesses the DTB and translate the address, it introduces much
overhead.
Improve the codes to use private varia
On 01.07.20 17:43, Sven Auhagen wrote:
Since the mdio code got upstreamed it is not possible
to activate network ports on CP110 Master and Slave.
The problem is in mvpp2_base_probe which is called for each
CP110 and it initializes the buffer area for descs and rx_buffers.
This should only happe
Hello Patrick,
Am 06.07.2020 um 13:26 schrieb Patrick Delaunay:
Add a new compatible "st,stm32mp15-i2c" introduced in Linux kernel v5.8
Signed-off-by: Patrick Delaunay
---
drivers/i2c/stm32f7_i2c.c | 1 +
1 file changed, 1 insertion(+)
Applied to u-boot-i2c.git master
Thanks!
bye,
Heik
Hello Patrick,
Am 06.07.2020 um 13:31 schrieb Patrick Delaunay:
Read SYSCFG bindings to set Fast Mode Plus bits if Fast Mode Plus
speed is selected.
Handle the stm32mp15 specific compatible to handle FastMode+
registers handling which is different on the stm32mp15 compared
to the stm32f7 or stm
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
Some users may want to read multiple consecutive 8-bit
registers. Instead of each caller having to implement the loop,
provide a dm_rtc_read() helper. Also, allow a driver to provide a
->read method, which can be more efficient than
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
Similar to dm_rtc_read(), introduce a helper that allows the caller to
write multiple consecutive 8-bit registers with one call. If the
driver provides the ->write method, use that, otherwise loop using
->write8.
Reviewed-by: Simon
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
Similar to how the dm_rtc_{read,write} functions fall back to using
the {read,write}8 methods, do the opposite in the rtc_{read,write}8
functions.
This way, each driver only needs to provide either ->read8 or ->read
to make both rtc
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
This simply consists of renaming the existing pcf2127_read_reg()
helper to follow the naming of the other
methods (i.e. pcf2127_rtc_) and changing the type of its
"len" parameter.
Reviewed-by: Simon Glass
Reviewed-by: Heiko Schoche
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
Reviewed-by: Simon Glass
Reviewed-by: Heiko Schocher
Signed-off-by: Rasmus Villemoes
---
drivers/rtc/pcf2127.c | 7 +++
1 file changed, 7 insertions(+)
Applied to u-boot-i2c.git master
Thanks!
bye,
Heiko
--
DENX Softwar
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
The current set method is broken; a simple test case is to first set
the date to something in April, then change the date to 31st May:
=> date 040412122020.34
Date: 2020-04-04 (Saturday)Time: 12:12:34
=> date 053112122020.34
Dat
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
Mostly as an aid for debugging RTC drivers, provide a command that can
be used to read/write arbitrary registers (assuming the driver
provides the read/write methods or their single-register-at-a-time
variants).
Reviewed-by: Simon G
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
In order to allow adding unit tests of the rtc command, add it to the
various sandbox defconfigs.
Signed-off-by: Rasmus Villemoes
---
configs/sandbox64_defconfig| 1 +
configs/sandbox_defconfig | 1 +
configs/s
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
Define a few aux registers and check that they can be read/written
individually. Also check that one can access the time-keeping
registers directly and get the expected results.
Reviewed-by: Simon Glass
Reviewed-by: Heiko Schocher
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
It's more natural that any write that happens to touch the reset
register should cause a reset, rather than just a write that starts at
that offset.
Reviewed-by: Simon Glass
Reviewed-by: Heiko Schocher
Signed-off-by: Rasmus Villem
Hello Rasmus,
Am 06.07.2020 um 22:01 schrieb Rasmus Villemoes:
Add tests of the "list", "read" and "write" subcommands of the rtc
shell command.
Reviewed-by: Simon Glass
Reviewed-by: Heiko Schocher
Signed-off-by: Rasmus Villemoes
---
test/dm/rtc.c | 58 +
Hello Tom,
please pull from u-boot-i2c master
The following changes since commit 61608f395e7dcb2be6060407a72a1149b046430a:
Merge branch '2020-07-08-misc-features-and-fixes' (2020-07-08 20:20:24 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-
Hi Tom,
please pull these MVEBU related patches:
- Armada 38x DDR3 fixes, enhancements (Chris)
- Armada 38x UTMI PHY SerDes fix (Chris)
- Helios4 update - sync with clearfog (Dennis)
- LaCie Kirkwood board rework - enable DM (Simon
On Tue, Jun 2, 2020 at 1:45 AM Alex Nemirovsky
wrote:
>
>
>
> > On Jun 1, 2020, at 9:45 AM, Jagan Teki wrote:
> >
> > On Fri, May 22, 2020 at 6:18 AM Alex Nemirovsky
> > wrote:
> >>
> >> From: Pengpeng Chen
> >>
> >> Add SPI Flash controller driver for Cortina Access
> >> CA SoCs
> >>
> >>
lx2160a rev2 requires 4KB space for type0 and 4KB
space for type1 iATU window. Increase configuration
size to 8KB to have sufficient space for type0
and type1 window.
Signed-off-by: Wasim Khan
---
arch/arm/dts/fsl-lx2160a.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
d
On 09.07.20 10:04, Ovidiu Panait wrote:
> Factor out mips-specific bdinfo setup from generic init sequence to
> arch_setup_bdinfo in arch/mips/lib/boot.c.
>
> Signed-off-by: Ovidiu Panait
> ---
>
> arch/mips/lib/boot.c | 18 ++
> common/board_f.c | 25 +
Hi Tom,
This PR includes the following changes for U-Boot v2020.10:
- Add two- and three-argument versions of CONFIG_IS_ENABLED in linux/kconfig.h
- Adds a new feature which supports copying modified parts of
the frame buffer to the uncached hardware buffer
- Enable the copy framebuffer on variou
Hi,
On 09.07.2020 12:15, Heinrich Schuchardt wrote:
On 09.07.20 10:04, Ovidiu Panait wrote:
Factor out mips-specific bdinfo setup from generic init sequence to
arch_setup_bdinfo in arch/mips/lib/boot.c.
Signed-off-by: Ovidiu Panait
---
arch/mips/lib/boot.c | 18 ++
common/
From: Biwen Li
Fix uninitialized variable msg
Signed-off-by: Biwen Li
---
drivers/rtc/pcf2127.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c
index f695350..58c4ee9 100644
--- a/drivers/rtc/pcf2127.c
+++ b/drivers/rtc/pcf212
From: Etienne Dublé
This commit fixes a serious issue occuring when several network
commands are run on a raspberry pi 4 board: for instance a "dhcp"
command and then one or several "tftp" commands. In this case,
packet recv callbacks were called several times on the same packets,
and send functi
get_cluster() disk_read idx eque zero while size < mydata->sect_size.
fix_fs_fat_read_small_file_fail.patch
Description: Binary data
This was few years backlog work of mine, and it's been
blocked to various reasons of having a priority to sync
Linux MTD spinor code and most of the community developers
are interested in feature-based Linux MTD sync/copy than
full functional MTD driver model.
As years passing on to the driver
UCLASS_SPI_FLASH driver at driver/mtd/spi is a generic
spi flash driver to probe jedec,spi-nor flash chips.
Technically a probe call in U_BOOT_DRIVER is local to that
driver and not applicable to use it another driver or in
another code.
The apollolake SPL code using the generic probe by adding
e
- Add generic mtd operations for UCLASS_MTD
- Add mtd_dread|derase|dwrite
The respetive MTD_UCLASS drivers must install the hooks to these
mtd_ops and other core ops are act as a interface b/w drivers
vs command code.
Cc: Simon Glass
Cc: Vignesh R
Signed-off-by: Jagan Teki
---
drivers/mtd/mtd
Why MTD UCLASS switch?
>From a nutshell, all the memory-related flash devices like
Parallel NOR, Raw NAND, SPI NOR/NAND stacks should be part
of the MTD layer.
The same theory applies to incase of MTD UCLASS in U-Boot.
Unfortunately, no flash drivers are using the MTD UCLASS in the
fully functio
Technically dm and nodm codebases have to build separately
since the SPL and U-Boot proper will enable based on the
requirements and foot-print sizes.
Till now there is no usage of SPL DM_MTD, but if we enable
it can't build since the mtd-uclass is linked with nodm
MTD code.
So move the build lin
Add SPL option for DM_MTD.
Cc: Simon Glass
Cc: Vignesh R
Signed-off-by: Jagan Teki
---
drivers/mtd/Kconfig | 8
drivers/mtd/Makefile | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 348b43e653..3feedf311f 100644
---
On 09/07/2020 12.58, Biwen Li wrote:
> From: Biwen Li
>
> Fix uninitialized variable msg
>
> struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
> - struct i2c_msg msg;
> + struct i2c_msg msg = {0};
> int ret;
>
> /* Set the address of the start register to be re
>
> On 09/07/2020 12.58, Biwen Li wrote:
> > From: Biwen Li
> >
> > Fix uninitialized variable msg
> >
> > struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
> > - struct i2c_msg msg;
> > + struct i2c_msg msg = {0};
> > int ret;
> >
> > /* Set the address of the st
On 09/07/2020 13.38, Biwen Li wrote:
>>
>> On 09/07/2020 12.58, Biwen Li wrote:
>>> From: Biwen Li
>>>
>>> Fix uninitialized variable msg
>>>
>>> struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
>>> - struct i2c_msg msg;
>>> + struct i2c_msg msg = {0};
>>> int ret;
>>>
A previous commit adds support for displaying variables RO flag.
Let's add it on the TEE backed variable storage as well.
Signed-off-by: Ilias Apalodimas
---
- Depends on https://lists.denx.de/pipermail/u-boot/2020-July/419269.html
include/mm_communication.h| 39
lib/efi_loade
On 09.07.20 12:27, Ovidiu Panait wrote:
> Hi,
>
> On 09.07.2020 12:15, Heinrich Schuchardt wrote:
>> On 09.07.20 10:04, Ovidiu Panait wrote:
>>> Factor out mips-specific bdinfo setup from generic init sequence to
>>> arch_setup_bdinfo in arch/mips/lib/boot.c.
>>>
>>> Signed-off-by: Ovidiu Panait
>
On Thu, Jul 09, 2020 at 02:33:49PM +0900, AKASHI Takahiro wrote:
> Tom,
>
> On Wed, Jul 08, 2020 at 11:15:26PM -0400, Tom Rini wrote:
> > On Thu, Jul 09, 2020 at 09:58:03AM +0900, AKASHI Takahiro wrote:
> >
> > > Hi Tom,
> > >
> > > I'd like to make sure of your policy about usage of "sudo" on C
New function should be called from board dram_init() because it initialized
gd->ram_base/ram_size. It finds the lowest available memory.
On systems with multiple memory nodes finding out the first memory node by
fdtdec_setup_mem_size_base() is not enough because this memory can be above
actual U-B
Since 2011 Ubuntu has intentionally broken support for guestmount[1] by
default and requires sysadmin intervention to re-enable support. This
in turn exposed that in our tests if guestmount is available but fails
we do not fall back to trying to use sudo. Restructure our code to try
sudo if guest
On Thu, Jul 09, 2020 at 10:42:09AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull these MVEBU related patches:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, Jul 09, 2020 at 10:41:00AM +0200, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-i2c master
>
> The following changes since commit 61608f395e7dcb2be6060407a72a1149b046430a:
>
> Merge branch '2020-07-08-misc-features-and-fixes' (2020-07-08 20:20:24
> -0400)
>
> are av
The commit 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for
debug consoles") has added incorrect dependency for SIFIVE debug uart which
should depend on SIFIVE driver instead of PL01x.
Signed-off-by: Michal Simek
---
drivers/serial/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 de
Hi Heinrich
On Wed, Jul 08, 2020 at 06:29:34PM +0200, Heinrich Schuchardt wrote:
> Saving UEFI variable as encoded U-Boot environment variables does not allow
> implement run-time support.
>
> Use a memory buffer for storing UEFI variables.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> lib/ef
On 25/05/2020 13:39, Sylwester Nawrocki wrote:
From: Nicolas Saenz Julienne
Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
an in depth explanation and two fixes from Johannes Berg:
e7d4a95da86e0 "bitfield: fix *_encode_bits()",
37a3862e12382 "bitfield: add u8 helpe
On 09/07/2020 17:35, Matthias Brugger wrote:
On 25/05/2020 13:39, Sylwester Nawrocki wrote:
From: Nicolas Saenz Julienne
Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
an in depth explanation and two fixes from Johannes Berg:
e7d4a95da86e0 "bitfield: fix *_encode_bit
From: Hou Zhiqiang
Hou Zhiqiang (1):
pci: layerscape: Add specific config entry for RC and EP mode driver
Xiaowei Bao (9):
pci: layerscape: Split the EP and RC driver
pci_ep: Add the init function
armv8: dts: ls1046a: Add the PCIe EP node
PCI_EP: layerscape: Add the multiple function s
From: Xiaowei Bao
Some EP deivces need to initialize before RC scan it, e.g. NXP
layerscape platform, so add the init function in pci_ep uclass.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
common/board_r.c | 12
From: Xiaowei Bao
Add the PCIe EP node for ls1046a.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
arch/arm/dts/fsl-ls1046a.dtsi | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/dts/fsl-
From: Xiaowei Bao
Add the multiple function support for Layerscape platform, some PEXs
of Layerscaple platform have more than one PF.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
drivers/pci/pcie_layerscape.c| 6 +-
drivers/p
From: Xiaowei Bao
Split the RC and EP driver, and reimplement the EP driver base on
the EP framework.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
drivers/pci/Makefile| 2 +-
drivers/pci/pcie_layerscape.c |
From: Xiaowei Bao
The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqia
From: Xiaowei Bao
Due to the ls2085a and ls2080a use different way to set the BAR size,
so add the BAR size init code here.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
drivers/pci/pcie_layerscape_ep.c | 18 +-
1 fi
From: Xiaowei Bao
Modify the ls_pcie_dump_atu function, make it can print the INBOUND
windows registers.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
drivers/pci/pcie_layerscape.c| 25 +
drivers/pci/pcie
From: Xiaowei Bao
Add the INBOUND configuration for VFs of PF.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
drivers/pci/pcie_layerscape.c| 8 +---
drivers/pci/pcie_layerscape.h| 13 +++-
drivers/pci/pcie_layers
From: Xiaowei Bao
Add the PCIe EP mode support for lx2160a-v2 platform.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
V2:
- Rebase the patch without change intent.
drivers/pci/pcie_layerscape.h| 9 -
drivers/pci/pcie_layerscape_ep.c | 8 +++-
2 files changed, 15
On 29/06/2020 18:37, Nicolas Saenz Julienne wrote:
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne
---
Chan
From: Hou Zhiqiang
Add Root Complex and Endpoint mode specific config entries, such that
it's feasible to enable the RC and/or EP mode driver indepently.
Signed-off-by: Hou Zhiqiang
---
V2:
- New patch.
configs/ls1012afrdm_qspi_defconfig| 2 +-
configs/ls1012afrdm_tfa_defconfig
This UART controller is integrated with a FIFO. Enable it.
You can put the next character into the FIFO while the transmitter
is sending out the current character. This works slightly faster.
Signed-off-by: Masahiro Yamada
---
drivers/serial/serial_uniphier.c | 7 +++
1 file changed, 7 ins
Ensure the transmitter is empty when chaining the baudrate or any
hardware settings. If a character is remaining in the transmitter,
the console will be garbled.
Signed-off-by: Masahiro Yamada
---
drivers/serial/serial_uniphier.c | 8
1 file changed, 8 insertions(+)
diff --git a/drive
The following changes since commit 61608f395e7dcb2be6060407a72a1149b046430a:
Merge branch '2020-07-08-misc-features-and-fixes' (2020-07-08 20:20:24
-0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git efi-2020-10-rc1-2
for you to fetch chang
After all, I am not a big fan of using a structure to represent the
hardware register map.
You do not need to know the entire register map.
Add only necessary register macros.
Use FIELD_PREP() instead of maintaining a pair of shift and mask.
Signed-off-by: Masahiro Yamada
---
drivers/serial/
On Mon, Jun 29, 2020 at 7:12 PM Ley Foon Tan wrote:
>
> Fixed delay 200us is not working in certain platforms. Change to
> poll for reset completion status to have more reliable reset process.
>
> Controller will set the rst_comp bit in intr_status register after
> controller has completed its res
On Mon, Jun 29, 2020 at 7:11 PM Ley Foon Tan wrote:
>
> Always put the controller in reset, then take it out of reset.
> This is to make sure controller always in reset state in both SPL and
> proper Uboot.
>
> This is preparation for the next patch to poll for reset completion
> (rst_comp) bit af
On 7/9/20 7:42 AM, Tom Rini wrote:
> Since 2011 Ubuntu has intentionally broken support for guestmount[1] by
> default and requires sysadmin intervention to re-enable support. This
> in turn exposed that in our tests if guestmount is available but fails
> we do not fall back to trying to use sudo.
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