On Tue, Jun 02, 2020 at 02:19:07PM +0300, Tero Kristo wrote:
> Hi,
>
> As there is looming death to OMAP4 Panda board u-boot support, I decided
> to take a shot and convert it to device model myself. With these patches
> it boots up fine, and there are no DM_SPL conversion complaints during
> comp
On 6/3/20 7:07 PM, Heinrich Schuchardt wrote:
> On 6/3/20 6:31 PM, André Przywara wrote:
>> On 03/06/2020 16:47, Heinrich Schuchardt wrote:
>>
>> Hi Heinrich,
>>
>>> On 03.06.20 01:46, André Przywara wrote:
On 02/06/2020 20:55, Tom Rini wrote:
Hi,
> On Tue, Jun 02, 2020 at 0
The current default of 0x400 for SYS_MALLOC_F_LEN is too small if any
additional drivers marked as DM_FLAG_PRE_RELOC are loaded before
relocation.
CONFIG_RSA=y which is needed for UEFI secure boot or for FIT image
verification loads the driver mod_exp_sw which has DM_FLAG_PRE_RELOC.
CONFIG_LOG=Y
For size_t we have to use %zu for printing not %lu.
Fixes: 4540dabdcaca ("efi_loader: image_loader: support image
authentication")
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_image_loader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_image
On 6/6/20 1:56 AM, Daniel Schwierzeck wrote:
>
>
> Am 05.06.20 um 19:50 schrieb Marek Vasut:
>> On 6/5/20 6:38 PM, Daniel Schwierzeck wrote:
>>>
>>>
>>> Am 05.06.20 um 18:22 schrieb Marek Vasut:
On 6/5/20 5:28 PM, Daniel Schwierzeck wrote:
>
>
> Am 17.05.20 um 18:24 schrieb Marek
Synchronize Gen2 MSTP teardown tables with datasheet Rev.2.00
Feb 01, 2016. This corrects the following bits:
- added H2 MSTP3[10] SCIF2
- added H2/M2/E2 MSTP7[29] TCON
- removed E2 MSTP5[22] Thermal Sensor
- removed E2 MSTP10[31,24:22] SRC0, SRC7:9
Signed-off-by: Marek Vasut
Cc: Nobuhiro
On 6/5/20 11:11 PM, Tom Rini wrote:
> On Fri, Jun 05, 2020 at 10:47:24PM +0200, Marek Vasut wrote:
>> On 6/5/20 9:07 PM, Tom Rini wrote:
>>> On Wed, Jun 03, 2020 at 02:01:08AM +0200, Marek Vasut wrote:
>>>
In case the env storage driver marks environment as ENV_INVALID, we must
reset the
On Sat, Jun 06, 2020 at 04:54:52PM +0200, Marek Vasut wrote:
> On 6/5/20 11:11 PM, Tom Rini wrote:
> > On Fri, Jun 05, 2020 at 10:47:24PM +0200, Marek Vasut wrote:
> >> On 6/5/20 9:07 PM, Tom Rini wrote:
> >>> On Wed, Jun 03, 2020 at 02:01:08AM +0200, Marek Vasut wrote:
> >>>
> In case the env
QEMU's mach-virt machine only supports selecting CPU models that
implement the virtualization extensions, and are therefore guaranteed
to support LPAE as well.
Initially, QEMU would not allow emulating these CPUs running in HYP
mode (or EL2, for AArch64), but today, it also contains a complete
imp
This series fixes a number of issues that exist in the QEMU/mach-virt
port of u-boot, and that prevent it from executing correctly under
virtualization (as opposed to TCG emulation)
As the Linux EFI subsystem maintainer, I am looking to increase test
coverage for the EFI related changes that are u
The LPAE version of DCACHE_WRITEBACK is currently defined as no-allocate
for both reads and writes, which deviates from the non-LPAE definition,
and mostly defeats the purpose of enabling the caches in the first place.
So align LPAE with !LPAE, and enable allocate-on-read.
Signed-off-by: Ard Bies
Add an override for enable_caches to enable the I and D caches, along
with the cached 1:1 mapping of all of DRAM. This is needed for running
U-Boot under virtualization with QEMU/kvm.
Signed-off-by: Ard Biesheuvel
---
board/emulation/qemu-arm/qemu-arm.c | 7 +++
1 file changed, 7 insertions(
The QEMU/mach-virt targeted port of u-boot currently only runs on
QEMU under TCG emulation, which does not model the caches at all,
and so no users can exist that are relying on the GRUB hack for
EFI boot.
We will shortly enable support for running under KVM, but the GRUB
hack (which disables all
Some instructions in the ARM ISA have multiple output registers, such
as ldrd/ldp (load pair), where two registers are loaded from memory,
but also ldr with indexing, where the memory base register is incremented
as well when the value is loaded to the destination register.
MMIO emulation under KV
Hi Pratyush,
On Fri, 5 Jun 2020 at 13:03, Pratyush Yadav wrote:
>
> Hi Simon,
>
> On 31/05/20 08:08AM, Simon Glass wrote:
> > Hi Pratyush,
> >
> > On Wed, 27 May 2020 at 06:52, Pratyush Yadav wrote:
> > >
> > > From: Jean-Jacques Hiblot
> > >
> > > A regmap field is an abstraction available in
Hi Anastasiia,
On Fri, 5 Jun 2020 at 08:21, Anastasiia Lukianenko
wrote:
>
> Hi Simon,
>
> Thank you for detailed reply.
> We will bind UCLASS_BLK driver according to your advice. Block device
> will have it's own parent which handles the actual device access.
> Most likely I'll have more questio
Hi Dario
I know that is an important bug to be addressed and I would like to
add even Tom on this
On Wed, May 27, 2020 at 1:56 PM Dario Binacchi wrote:
>
> The offset at which the image to be loaded from NAND is located is
> retrieved from the itb header. The presence of bad blocks in the area
>
Signed-off-by: Sean Anderson
---
common/spl/spl_opensbi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c
index e88136e6f3..14f335f75f 100644
--- a/common/spl/spl_opensbi.c
+++ b/common/spl/spl_opensbi.c
@@ -56,7 +56,7 @@ v
On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
> The LPAE version of DCACHE_WRITEBACK is currently defined as no-allocate
> for both reads and writes, which deviates from the non-LPAE definition,
> and mostly defeats the purpose of enabling the caches in the first place.
>
> So align LPAE with !LPAE, and
On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
> QEMU's mach-virt machine only supports selecting CPU models that
> implement the virtualization extensions, and are therefore guaranteed
> to support LPAE as well.
I wonder why
qemu-system-arm -machine virt -cpu help
lists cortex-a9 (which is not LPAE ena
On 6/6/20 10:32 PM, Heinrich Schuchardt wrote:
> On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
>> QEMU's mach-virt machine only supports selecting CPU models that
>> implement the virtualization extensions, and are therefore guaranteed
>> to support LPAE as well.
>
> I wonder why
> qemu-system-arm -mach
On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
> Add an override for enable_caches to enable the I and D caches, along
> with the cached 1:1 mapping of all of DRAM. This is needed for running
> U-Boot under virtualization with QEMU/kvm.
>
> Signed-off-by: Ard Biesheuvel
> ---
> board/emulation/qemu-arm
On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
> The QEMU/mach-virt targeted port of u-boot currently only runs on
> QEMU under TCG emulation, which does not model the caches at all,
> and so no users can exist that are relying on the GRUB hack for
> EFI boot.
>
> We will shortly enable support for runni
This can be used to swap the byte endianness of a binary file
from Little-Endian to Big-Endian or vice-versa.
Signed-off-by: Daniel Schwierzeck
---
tools/endian-swap.py | 55
1 file changed, 55 insertions(+)
create mode 100755 tools/endian-swap.py
This rule generates an u-boot binary file where the byte endianness
is swapped. This will be used by the MIPS Malta Little-Endian variants
to be able to boot with Qemu. The Qemu Malta Machine expects the
firmware in Big-Endian order.
Signed-off-by: Daniel Schwierzeck
---
Makefile | 6 ++
1
The currently used qemu_mips target respectively the Qemu
generic MIPS machine is marked as deprecated by Qemu. One should
use the MIPS Malta machine. Also the qemu_mips target only exists
in U-Boot, the Linux support was removed centuries ago. Thus we
should deprecated and remove the qemu_mips t
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.
Signed-off-by: Daniel Schwierzeck
---
.azure-pipelines.yml | 16
1 file changed, 16 insertions(+)
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 636500d6ce..718
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.
Signed-off-by: Daniel Schwierzeck
---
.gitlab-ci.yml | 32
1 file changed, 32 insertions(+)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index badfcb4254..d1a929
The Qemu Malta machine expects the firmware in Big-Endian byte order.
Therefore the Little-Endian variants of the Malta board needs to
be byte swapped.
Signed-off-by: Daniel Schwierzeck
---
configs/malta64el_defconfig | 1 +
configs/maltael_defconfig | 1 +
2 files changed, 2 insertions(+)
d
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.
Signed-off-by: Daniel Schwierzeck
---
.travis.yml | 28
1 file changed, 28 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index bb02b6d816..a042aa2c7d 100644
-
On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
> Some instructions in the ARM ISA have multiple output registers, such
> as ldrd/ldp (load pair), where two registers are loaded from memory,
> but also ldr with indexing, where the memory base register is incremented
> as well when the value is loaded to t
Functions __raw_writeq(), __raw_readq() are available for all
architectures. So let's use them.
Signed-off-by: Heinrich Schuchardt
---
drivers/mtd/cfi_flash.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index b7289ba
checkpatch.pl now supports a --u-boot option for U-Boot specific
checks. Use that in patman to check the patch series.
Signed-off-by: Daniel Schwierzeck
---
tools/patman/checkpatch.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/patman/checkpatch.py b/tools/patman/
Hello Scott,
CppCheck gives an error:
[arch/arm/cpu/armv7/iproc-common/armpll.c:137]: (error) Array
'armpll_clk_tab[13]' accessed at index 17, which is out of bounds.
In the loop at the start of armpll_config() i is determined. The maximum
value of i after checking status in line 53 is 12.
In l
On Sat, 6 Jun 2020 at 23:08, Heinrich Schuchardt wrote:
>
> On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
> > Some instructions in the ARM ISA have multiple output registers, such
> > as ldrd/ldp (load pair), where two registers are loaded from memory,
> > but also ldr with indexing, where the memory b
On 5/18/18 4:05 PM, Ley Foon Tan wrote:
> Add pinmux driver support for Stratix SoC
>
> Signed-off-by: Chin Liang See
> Signed-off-by: Ley Foon Tan
> ---
> arch/arm/mach-socfpga/Makefile |2 +
> .../arm/mach-socfpga/include/mach/system_manager.h |5 +-
> .../mach-socf
On Sat, 6 Jun 2020 at 22:14, Heinrich Schuchardt wrote:
>
> On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
> > The LPAE version of DCACHE_WRITEBACK is currently defined as no-allocate
> > for both reads and writes, which deviates from the non-LPAE definition,
> > and mostly defeats the purpose of enabli
On 6/7/20 1:17 AM, Ard Biesheuvel wrote:
> On Sat, 6 Jun 2020 at 22:14, Heinrich Schuchardt wrote:
>>
>> On 6/6/20 7:15 PM, Ard Biesheuvel wrote:
>>> The LPAE version of DCACHE_WRITEBACK is currently defined as no-allocate
>>> for both reads and writes, which deviates from the non-LPAE definition,
Hi Daniel,
On Sat, 6 Jun 2020 at 15:31, Daniel Schwierzeck
wrote:
>
> checkpatch.pl now supports a --u-boot option for U-Boot specific
> checks. Use that in patman to check the patch series.
>
> Signed-off-by: Daniel Schwierzeck
>
> ---
>
> tools/patman/checkpatch.py | 2 +-
> 1 file changed, 1
Hi Daniel,
On Sat, 6 Jun 2020 at 20:02, Simon Glass wrote:
>
> Hi Daniel,
>
> On Sat, 6 Jun 2020 at 15:31, Daniel Schwierzeck
> wrote:
> >
> > checkpatch.pl now supports a --u-boot option for U-Boot specific
> > checks. Use that in patman to check the patch series.
> >
> > Signed-off-by: Daniel
The 'stdout-path' is missing after dts sync.
Fixes: 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")
Signed-off-by: Kever Yang
---
arch/arm/dts/rk3399-evb-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi
b/arch/arm/dts/rk3399-evb-u-
The callback of do_ut_log() is defined in test/log/test-main.c
which is depend on CONFIG_LOG.
Signed-off-by: Kever Yang
---
test/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/test/Kconfig b/test/Kconfig
index 9b2f84b551..8c32fa5cbd 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -
On 2020/6/5 下午6:06, Heiko Stuebner wrote:
From: Heiko Stuebner
So far the puma dts files only just included the main puma dtsi without
handling the actual baseboard and rk3399-puma.dtsi was very much
detached from the variant in the mainline Linux kernel.
Recent changes resulted in a strange
This reverts commit 0486497e2b5f4d36fa968a1a60fea358cbf70b65.
The strtoul has well-defined semantics. It is defined by the C standard and
POSIX. To quote the relevant section of the man pages,
> If base is zero or 16, the string may then include a "0x" prefix, and the
> number will be read in bas
Am June 7, 2020 3:52:37 AM UTC schrieb Kever Yang :
>The callback of do_ut_log() is defined in test/log/test-main.c
>which is depend on CONFIG_LOG.
Where do you see such a dependency?
With which configuration did you have a build problem?
>
>Signed-off-by: Kever Yang
>---
>
> test/Kconfig | 1 +
On 6/7/20 7:36 AM, Sean Anderson wrote:
> This reverts commit 0486497e2b5f4d36fa968a1a60fea358cbf70b65.
>
> The strtoul has well-defined semantics. It is defined by the C standard and
> POSIX. To quote the relevant section of the man pages,
>
>> If base is zero or 16, the string may then include a
USB host node is missing from this patch series.
Driver was previously added here -
https://lists.denx.de/pipermail/u-boot/2020-April/405764.html
Linux arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi
Regards,
Dhananjay
--
Sent from: http://u-boot.10912.n7.nabble.com/
On 6/7/20 2:40 AM, Heinrich Schuchardt wrote:
> On 6/7/20 7:36 AM, Sean Anderson wrote:
>> This reverts commit 0486497e2b5f4d36fa968a1a60fea358cbf70b65.
>>
>> The strtoul has well-defined semantics. It is defined by the C standard and
>> POSIX. To quote the relevant section of the man pages,
>>
>>>
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