Hi Amit,
On Fri, May 08, 2020 at 03:53:45PM +0530, Amit Singh Tomar wrote:
> Calculate the SDRAM size from DDR capacity register registers instead
> of using hard-coded value. This is quite useful to get correct size
> on differnt boards based on Actions OWL family of SoCs (S700 and S900).
>
> Th
Realized that sent the wrong version(v2) that has typos and didn't get
compile for S900. Just fixed this in v3.
Sorry for the noise.
--
This small series allows us to calculate SDRAM size instead
of guessing it.
Patch (1/2) is r
Calculate the SDRAM size from DDR capacity register registers instead
of using hard-coded value. This is quite useful to get correct size
on differnt boards based on Actions OWL family of SoCs (S700 and S900).
There is no documentation available that talks about DDR registers, and
this is very muc
Now that, we calculate SDRAM size by reading DDR registers,
"CONFIG_SYS_SDRAM_SIZE" is no more needed.
This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration
file.
Signed-off-by: Amit Singh Tomar
---
* No change from previous versions.
---
include/configs/owl-common.h | 1 -
1 fi
Add include/charset.h to generated HTML documentation
Signed-off-by: Heinrich Schuchardt
---
doc/api/index.rst | 1 +
doc/api/unicode.rst | 7 +++
2 files changed, 8 insertions(+)
create mode 100644 doc/api/unicode.rst
diff --git a/doc/api/index.rst b/doc/api/index.rst
index d484c066c5..
Fix the function descriptions in include/charset.h and add them to the
generated HTML API documentation.
Heinrich Schuchardt (2):
lib: charset: correct function descriptions
doc: add Unicode functions to API description
doc/api/index.rst | 1 +
doc/api/unicode.rst | 7 +++
include/ch
Change function descriptions to match kernel doc style.
Signed-off-by: Heinrich Schuchardt
---
include/charset.h | 39 +--
1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/include/charset.h b/include/charset.h
index 30faa72285..c5e0add681 100644
Hi Mani,
>
> This doesn't work on Bubblegum96. But poking into the vendor tree, I'm able
> to come up with below working code:
>
> val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0xf;
> cap = 64 * (1 << val);
>
> So, you can use this and remove other stuffs. Also this function shou
Provide a test for new Unicode library function u16_strsize().
Signed-off-by: Heinrich Schuchardt
---
test/unicode_ut.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 4d99c20bc0..d8b4aa9b44 100644
--- a/test/unicode_ut.c
+++ b/test/uni
On Sat, May 09, 2020 at 09:19:31AM +0200, Heinrich Schuchardt wrote:
> Provide a test for new Unicode library function u16_strsize().
>
> Signed-off-by: Heinrich Schuchardt
> ---
> test/unicode_ut.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/test/unicode_ut.c b/test/un
Hi Stefan,
On 5 May 2020, at 10:58, Stefan Roese wrote:
>
> Hi Ezra,
>
> On 05.05.20 09:10, Ezra Buehler wrote:
>> On 5 May 2020, at 08:45, Stefan Roese wrote:
>>> U-Boot specific DT properties, like "u-boot,dm-pre-reloc" should be
>>> added in U-Boot specific DT dtsi files
>> OK, that makes s
On 5/6/20 9:12 PM, Ilias Apalodimas wrote:
> From: Sughosh Ganu
>
> In Arm devices OP-TEE has the ability to run StandAloneMM (from EDK2)
> in a separate partition and handle UEFI variables.
> A following patch introduces this functionality.
>
> Add the headers needed for OP-TEE <--> StandAloneMM
Now that, we calculate SDRAM size by reading DDR registers,
"CONFIG_SYS_SDRAM_SIZE" is no more needed.
This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration
file.
Signed-off-by: Amit Singh Tomar
---
* No change since previous version.
---
include/configs/owl-common.h | 1 -
1 fi
Mani pointed out that changes in previous version were not good enough
for S900 and he provide snippet that seems to work on S900.
This series v4 fixes the S900 Support by taking in changes suggested
by Mani.
-
Realized that s
Calculate the SDRAM size from DDR capacity register registers instead
of using hard-coded value. This is quite useful to get correct size
on differnt boards based on Actions OWL family of SoCs (S700 and S900).
There is no documentation available that talks about DDR registers, and
this is very muc
On 5/6/20 9:12 PM, Ilias Apalodimas wrote:
> In OP-TEE we can run EDK2's StandAloneMM on a secure partition.
> StandAloneMM is responsible for the UEFI variable support. In
> combination with OP-TEE and it's U-Boot supplicant, variables are
> authenticated/validated in secure world and stored on an
On 5/6/20 9:12 PM, Ilias Apalodimas wrote:
> Add myself as maintainer for the OP-TEE related UEFI variable storage
> and add the headers files on the existing EFI list
>
> Signed-off-by: Ilias Apalodimas
> ---
> MAINTAINERS | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/MAINTAINE
On 5/6/20 9:12 PM, Ilias Apalodimas wrote:
> If OP-TEE is compiled with an EDK2 application running in secure world
> it can process and store UEFI variables in an RPMB.
> Add documentation for the config options enabling this
>
> Signed-off-by: Ilias Apalodimas
> ---
> doc/uefi/uefi.rst | 10 +++
On 5/6/20 9:12 PM, Ilias Apalodimas wrote:
> With the previous patches that use OP-TEE and StandAloneMM for UEFI
> variable storage we've added functionality for efi_query_variable_info.
> So let's add the relevant command to efidebug and retrieve information
> about the container used to store UEF
On 5/6/20 5:04 PM, Grant Likely wrote:
>
>
> On 05/05/2020 18:57, Heinrich Schuchardt wrote:
>> On 05.05.20 19:23, Grant Likely wrote:
>>>
>>>
>>> On 05/05/2020 18:04, Heinrich Schuchardt wrote:
On 05.05.20 13:15, Grant Likely wrote:
>
>
> On 01/05/2020 10:33, Heinrich Schuchardt w
On Sat, May 09, 2020 at 01:45:07PM +0530, Amit Singh Tomar wrote:
> Calculate the SDRAM size from DDR capacity register registers instead
> of using hard-coded value. This is quite useful to get correct size
> on differnt boards based on Actions OWL family of SoCs (S700 and S900).
>
> There is no
On Sat, May 09, 2020 at 01:45:08PM +0530, Amit Singh Tomar wrote:
> Now that, we calculate SDRAM size by reading DDR registers,
> "CONFIG_SYS_SDRAM_SIZE" is no more needed.
>
> This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration
> file.
>
> Signed-off-by: Amit Singh Tomar
Revi
With the converstion of SMC911x to DM, this can facilitate the omap3
boards from LogicPD (now called Beacon EmbeddedWorks) to be converted.
There isn't a clean solution to doing this in phases, so the boards are
all being done together to avoid breaking functionality.
Because the GPMC bus hasn't b
On Sat, May 9, 2020 at 3:16 AM Tom Rini wrote:
>
> On Thu, May 07, 2020 at 09:16:40PM -0600, Simon Glass wrote:
> > Hi Masahiro,
> >
> > On Thu, 7 May 2020 at 19:54, Masahiro Yamada wrote:
> > >
> > > On Fri, May 8, 2020 at 10:39 AM Simon Glass wrote:
> > > >
> > > > Hi Masahiro,
> > > >
> > > >
Hi Bin,
>-Original Message-
>From: U-Boot On Behalf Of Pragnesh Patel
>Sent: 02 May 2020 20:20
>To: Bin Meng ; Troy Benjegerdes
>
>Cc: U-Boot Mailing List ; Atish Patra
>; Palmer Dabbelt ; Paul
>Walmsley ; Jagan Teki
>; Anup Patel ; Sagar
>Kadam ; Rick Chen ; Lukasz
>Majewski ; Anatolij G
Hi Ezra,
On 09.05.20 10:10, Ezra Buehler wrote:
On 5 May 2020, at 10:58, Stefan Roese wrote:
Hi Ezra,
On 05.05.20 09:10, Ezra Buehler wrote:
On 5 May 2020, at 08:45, Stefan Roese wrote:
U-Boot specific DT properties, like "u-boot,dm-pre-reloc" should be
added in U-Boot specific DT dtsi fi
Loading u-boot and its fdt from a NAND memory area with bad blocks led
to the creation of these patches.
Dario Binacchi (3):
spl: fix format of function documentation
spl: fit: fail fit loading in case of FDT appending error
spl: fit: nand: fix fit loading in case of bad blocks
common/s
U-Boot adopted the kernel-doc annotation style.
Signed-off-by: Dario Binacchi
---
include/spl.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/spl.h b/include/spl.h
index 6bf9fd8beb..e2fbd6d765 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -151,7 +151,7 @@ struc
The offset at which the image to be loaded from NAND is located is
retrieved from the itb header. The presence of bad blocks in the area
of the NAND where the itb image is located could invalidate the offset
which must therefore be adjusted taking into account the state of the
sectors concerned.
S
If uboot does not embed its device tree and the FIT loading function
returns error in case of failure in the FDT append, the redundant itb
image could be loaded.
Signed-off-by: Dario Binacchi
---
common/spl/spl_fit.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git
On 09.05.20 13:55, Dario Binacchi wrote:
If uboot does not embed its device tree and the FIT loading function
returns error in case of failure in the FDT append, the redundant itb
image could be loaded.
Signed-off-by: Dario Binacchi
---
common/spl/spl_fit.c | 11 ---
1 file changed,
This series adds Ethernet Support Actions Semi OWL S700 SoC.
First patch(1/7) series adds Ethernet clock for S900 and S700, S900
part is just compiled tested.
Patches(from 2/7 and 3/7) adds support for RTL 8201F PHY module and
introduce configuration option "RTL8201F_PHY_S700_RMII_TIMINGS" to
ful
This commit adds clocks needed for ethernet operations for
Actions OWL family of SoCs (S700 and S900).
Signed-off-by: Amit Singh Tomar
---
arch/arm/include/asm/arch-owl/regs_s700.h | 2 ++
arch/arm/include/asm/arch-owl/regs_s900.h | 4
drivers/clk/owl/clk_owl.c | 9 +
RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have
specific Rx/Tx interface timings requirement for proper PHY operations.
These timing values are not documented anywhere and picked from vendor
code.
This commits lets proper packets to be transmitted over the network.
Signed-off-
This patch adds support for Realtek PHY RTL8201F 10/100Mbs
(with variants: RTL8201FN and RTL8201FL) PHYceiver. It is
present on Actions Semi Cubieboard7 board.
Signed-off-by: Amit Singh Tomar
---
drivers/net/phy/realtek.c | 20
1 file changed, 20 insertions(+)
diff --git a/
This patch adds node for ethernet controller found on Action Semi OWL
S700 SoC.
Since, there is no upstream Linux binding exist for S700 ethernet
controller, Changes are put in u-boot specific dtsi file.
Signed-off-by: Amit Singh Tomar
---
arch/arm/dts/s700-u-boot.dtsi | 13 +
1 fil
This patch adds MAC and PHY related configs (needed for proper
ethernet operations) for Action Semi S700 SoC.
Signed-off-by: Amit Singh Tomar
---
configs/cubieboard7_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig
in
This patch selects CONFIG_DM_ETH (ethernet driver is base on DM model)
for Action semi owl SoC.
Signed-off-by: Amit Singh Tomar
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0d463088a2e4..80e07f92febc 100644
--- a/arch/arm/Kcon
This patchs adds glue logic to enable designware mac present on
Action Semi based S700 SoC, Configures SoC specific bits.
Undocumented bit that programs the PHY interface select register
comes from vendor source.
It has been tested on Cubieboard7-lite based on S700 SoC.
Signed-off-by: Amit Sing
This series add support for SPL to FU540. U-Boot SPL can boot from
L2 LIM (0x0800_) and jump to OpenSBI(FW_DYNAMIC firmware) and
U-Boot proper from MMC devices.
This series depends on:
[1] https://patchwork.ozlabs.org/patch/1281853
[2] https://patchwork.ozlabs.org/patch/1281852
All these toge
For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end
Signed-off-by: Pragnesh Patel
Reviewed-by: Anup Patel
Reviewed-by: Jagan Teki
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
arch/riscv/cpu/u-boot-spl.lds | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/cpu/u-bo
Use the OTP DM driver to set the serial environment variable.
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
arch/riscv/dts/fu540-c000-u-boot.dtsi | 14 +++
.../dts/hifive-unleashed-a00-u-boot.dtsi | 2 +
board/sifive/fu540/Kconfig
Added a misc driver to handle OTP memory in SiFive SoCs.
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/misc/Kconfig | 7 +
drivers/misc/Makefile | 1 +
drivers/misc/sifive-otp.c | 273 ++
3 files changed, 28
When build U-Boot SPL, meet an issue of undefined reference to
'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when
CONFIG_MMC_SPI selected.
Signed-off-by: Pragnesh Patel
---
lib/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/Makefile b/lib/Makefile
in
Add DDR controller and phy register settings, taken from fsbl
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel
Tested-by: Bin Meng
---
...fu540-hifive-unleashed-a00-sdram-ddr4.dtsi | 1489 +
1 file changed, 1489 insertions(+)
create mod
Devicetree files in FU540 platform is synced from Linux, like other
platforms does. Apart from these U-Boot in FU540 would also require
some U-Boot specific node like clint.
So, create board specific -u-boot.dtsi files. This would help of
maintain U-Boot specific changes separately without touchin
Add driver for fu540 to support ddr initialization in SPL.
This driver is based on FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel
Reviewed-by: Jagan Teki
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
board/sifive/fu540/Kconfig | 2 +
dr
Add dmc node to enable sdram driver. dmc is used to
initialize the memory controller.
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
arch/riscv/dts/fu540-c000-u-boot.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/riscv/dts/fu540-c000-u-boot.
Added clock enable and disable functions in prci ops
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/clk/sifive/fu540-prci.c | 108
1 file changed, 96 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/sifive/fu540-prci
Add ddr clock release reset for SPL
Signed-off-by: Pragnesh Patel
---
drivers/clk/sifive/fu540-prci.c | 59 +
1 file changed, 53 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index bf06c3a3bb..0335622
This sync has changes required to use GPIO in U-Boot and
U-Boot SPL.
Sync dts from linux v5.7-rc2 commit:
"riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file"
(sha1: 0a91330b2af9f71cd483f92774182b58f6d9)
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
---
arch/riscv/dts/fu
Add SiFive fu540 cpu to support RISC-V arch
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
---
arch/riscv/Kconfig| 1 +
arch/riscv/cpu/fu540/Kconfig | 15 ++
arch/riscv/cpu/fu540/Makefile | 7 +++
arch/riscv/cpu/fu540/cpu.c| 22
arch/
Add place-holder for RISC-V fu540 CPU
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
arch/riscv/include/asm/arch-fu540/clk.h | 14 +
arch/riscv/include/asm/arch-fu540/gpio.h | 38
2 files changed, 52 insertions(+)
create mode 1006
Add ehternet clock initialization for SPL
Signed-off-by: Pragnesh Patel
---
drivers/clk/sifive/fu540-prci.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index 033562274e..e7ceda0dcf 100644
---
From: Jagan Teki
Add U-Boot proper sector start offset for SiFive FU540.
This value is based on the partition layout supported
by SiFive FU540.
u-boot.itb need to write on this specific offset so-that
the SPL will retrieve it from here and load.
Signed-off-by: Jagan Teki
Reviewed-by: Bin Meng
Add a support for SPL which will boot from L2 LIM (0x0800_) and
then SPL will boot U-Boot FIT image (OpenSBI FW_DYNAMIC + u-boot.bin)
from MMC boot devices.
SPL related code is leveraged from FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel
Revi
Enable all cache ways from U-Boot proper.
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
---
arch/riscv/cpu/fu540/Makefile | 1 +
arch/riscv/cpu/fu540/cache.c | 53 +++
arch/riscv/include/asm/arch-fu540/cache.h | 14 ++
board/sifive/fu540/f
From: Jagan Teki
This is a sample GPT partition layout for SD card,
right now three important partitions are added to
make the system bootable.
partition layout:
PartStart LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x0022 0x00
With sifive_fu540_defconfig:
User can use FSBL or u-boot-spl.bin anyone at a time.
For FSBL,
fsbl->fw_payload.bin (opensbi + U-Boot)
For u-boot-spl.bin,
u-boot-spl.bin->FIT image (opensbi + U-Boot + dtb)
U-Boot SPL will be loaded by ZSBL from SD card (replace fsbl.bin with
u-boot-spl.bin) and r
Add L2 cache node to enable cache ways from U-Boot
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
---
arch/riscv/dts/fu540-c000-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi
b/arch/riscv/dts/fu540-c000-u-boot.dtsi
index fc91a7c98
OpenSBI generic platform support provides platform specific
functionality based on the FDT passed by previous booting stage.
depends on OpenSBI commit:
platform: Add generic FDT based platform support
(sha1: f1aa9e54e6ae70aeac638d5b75093520f65d)
Signed-off-by: Pragnesh Patel
---
doc/board/s
GCC recognizes /* fallthrough */ if -Wimplicit-fallthrough=3 is enabled.
Let's use it consistently.
Signed-off-by: Heinrich Schuchardt
---
tools/mkimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 336376f8d0..5689e5d75f 100644
---
GCC recognizes /* fallthrough */ if -Wimplicit-fallthrough=3 is enabled.
Let's use it consistently.
Signed-off-by: Heinrich Schuchardt
---
tools/mkimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 336376f8d0..5689e5d75f 100644
---
GCC recognizes /* fallthrough */ if -Wimplicit-fallthrough=3 is enabled.
Let's use it consistently.
Signed-off-by: Heinrich Schuchardt
---
tools/fdtgrep.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index 7e168a1e6b..8b4d2765a
Compiling with -Wtype-limits yields:
cmd/efidebug.c:968:32: error: comparison is always false due to limited
range of data type [-Werror=type-limits]
968 | if (*endp != '\0' || bootnext > 0x) {
|
Remove the superfluous check.
Fixes: 59df7e7e77e7 ("cmd: add efidebug command")
Signed-
On i.MX platforms board_spl_fit_post_load() can check the loaded
SPL image for authenticity using its HAB engine. U-Boot's SPL
mechanism allows booting images from other sources as well, but
in the current setup the SPL would just hang if it encounters an
image that does not pass scrutiny. Allowi
When compiling with -Wtype-limits we see this error:
drivers/i2c/i2c-uclass.c: In function ‘i2c_deblock_gpio_loop’:
drivers/i2c/i2c-uclass.c:517:21: error: comparison of
unsigned expression >= 0 is always true [-Werror=type-limits]
517 | while (scl_count-- >= 0) {
|
Don't loop forever.
Hi Tom,
Please pull this PR.
Summary:
- zap lpc32xx_ssp driver (Jagan)
- rename of phy nodev call (Jagan)
- iopoll with sleep_us (Jagan)
- MX25R6435F flash (Ye Li)
Travis-CI:
https://travis-ci.org/github/openedev/u-boot-amarula/builds/684188097
The following changes since commit 67887903afc3615
On 08/05/20 6:40 PM, Tom Rini wrote:
> On Fri, May 08, 2020 at 02:52:55PM +0200, Pali Rohár wrote:
>> On Tuesday 28 April 2020 09:37:21 Pali Rohár wrote:
>>> On Monday 27 April 2020 14:00:47 Tom Rini wrote:
I'll take care of that shortly. Otherwise:
Reviewed-by: Tom Rini
>>>
>>>
On Saturday 09 May 2020 21:58:19 Lokesh Vutla wrote:
> On 08/05/20 6:40 PM, Tom Rini wrote:
> > On Fri, May 08, 2020 at 02:52:55PM +0200, Pali Rohár wrote:
> >> On Tuesday 28 April 2020 09:37:21 Pali Rohár wrote:
> >>> On Monday 27 April 2020 14:00:47 Tom Rini wrote:
> I'll take care of that s
On 5/9/20 6:13 PM, Patrick Wildt wrote:
> On i.MX platforms board_spl_fit_post_load() can check the loaded
> SPL image for authenticity using its HAB engine. U-Boot's SPL
> mechanism allows booting images from other sources as well, but
> in the current setup the SPL would just hang if it encounte
On Sun, May 3, 2020 at 7:09 PM Manivannan Sadhasivam
wrote:
>
> On Thu, Apr 30, 2020 at 12:34:12PM +0530, Jagan Teki wrote:
> > Due to some on board limitation rock960 PCIe
> > works only with 1.8V IO domain.
> >
> > So, this patch enables grf io_sel explicitly
> > to make PCIe/M.2 to work.
> >
>
Yes, most of the high speed peripheral clocks
in rk3399 enabled by default.
But it would be better to handle them via clk
enable/disable API for handling proper reset
conditions like 'usb reset' over command line.
So, enable USB, GMAC clock via enable/disable ops.
Signed-off-by: Jagan Teki
---
This series support PCIe host controller support
on rockchip rk3399 platform.
It is based on previous version[1] changes.
Works well on rk3399 boards like rock960, nanopc-t4
and roc-kr3399-pc-mezzanine board as Gen1 configurable
host with M.2 SSD.
Changes for v3:
- fix few clock register value
Enable/Disable the PCIEPHY clk for rk3399.
CLK is clear in both enable and disable functionality.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
drivers/clk/rockchip/clk_rk3399.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3399.c
b/drivers/clk/ro
Add Rockchip PCIe controller driver for rk3399 platform.
Driver support Gen1 by operating as a Root complex.
Thanks to Patrick for initial work.
Signed-off-by: Patrick Wildt
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- none
drivers/pci/Kconfig | 8 +
dri
Yes, it is possible to have a dedicated UCLASS PHY driver
for this Rockchip PCIe PHY but there are some issues on
Generic PHY framework to support the same.
The Generic PHY framework is unable to get the PHY if
the PHY parent is of a different uclass.
Say if we try to get the PCIe PHY then the ph
Due to board limitation some SSD's would work
on rock960 PCIe M.2 only with 1.8V IO domain.
So, this patch enables grf io_sel explicitly to
make PCIe/M.2 to work.
Cc: Tom Cubie
Signed-off-by: Jagan Teki
Acked-by: Manivannan Sadhasivam
---
Changes for v3:
- collect mani a-b
- add comments
boa
Enable PCIe/M.2 support on
- NanoPC-T4
- ROC-RK3399-PC Mezzanine boards.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
arch/arm/dts/rk3399-u-boot.dtsi | 1 +
configs/nanopc-t4-rk3399_defconfig| 4
configs/roc-pc-mezzanine-rk3399_defconfig | 4
3 files changed,
On Thu, 7 May 2020 20:12:19 +0200
Soeren Moch wrote:
> do you plan to re-send a fixed version of this series?
I definitely do.
I'm really sorry for the delay.
I've been struggling with a personal issue and urgent things that
needed to be done.
I also had another patch serie for GRUB that I need
On Sat, May 09, 2020 at 06:38:33PM +0200, Heinrich Schuchardt wrote:
> On 5/9/20 6:13 PM, Patrick Wildt wrote:
> > On i.MX platforms board_spl_fit_post_load() can check the loaded
> > SPL image for authenticity using its HAB engine. U-Boot's SPL
> > mechanism allows booting images from other sourc
On 5/9/20 7:45 PM, Patrick Wildt wrote:
> On Sat, May 09, 2020 at 06:38:33PM +0200, Heinrich Schuchardt wrote:
>> On 5/9/20 6:13 PM, Patrick Wildt wrote:
>>> On i.MX platforms board_spl_fit_post_load() can check the loaded
>>> SPL image for authenticity using its HAB engine. U-Boot's SPL
>>> mecha
On Sat, May 09, 2020 at 08:09:39PM +0200, Heinrich Schuchardt wrote:
> On 5/9/20 7:45 PM, Patrick Wildt wrote:
> > On Sat, May 09, 2020 at 06:38:33PM +0200, Heinrich Schuchardt wrote:
> >> On 5/9/20 6:13 PM, Patrick Wildt wrote:
> >>> On i.MX platforms board_spl_fit_post_load() can check the loaded
On 09/05/2020 00.59, Tom Rini wrote:
> On Fri, Mar 27, 2020 at 12:02:00AM +0100, Rasmus Villemoes wrote:
>
>
> Applied to u-boot/master, thanks!
>
Eh, thanks, but you already applied v1 consisting of 5 patches. v1 1/5
corresponded to v2 1/2, while v1 5/5 corresponded to v2 2/2 - v1 3/5 and
4/5
Hi,
On 5/8/20 4:45 AM, Patrick Wildt wrote:
> Hi,
>
> now this really confuses me.
>
> commit 0db0ba6141f402b1d496ef53d9fa69978f75ec61 has explicitly made
> u-boot the firmware and moved atf into the loadables on NXP i.MX.
> Here you do the complete opposite for sunxi.
>
> Can people please mak
On Sat, May 09, 2020 at 02:02:19PM -0500, Samuel Holland wrote:
> On 5/8/20 4:45 AM, Patrick Wildt wrote:
> > Hi,
> >
> > now this really confuses me.
> >
> > commit 0db0ba6141f402b1d496ef53d9fa69978f75ec61 has explicitly made
> > u-boot the firmware and moved atf into the loadables on NXP i.MX.
CONFIG_SYS_SDRAM_BASE maybe zero. Avoid a build warning when compiling with
-Wtype-limits.
Signed-off-by: Heinrich Schuchardt
---
common/board_f.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/board_f.c b/common/board_f.c
index 5c650f046c..cf93f70f74 100644
--- a/com
Building with -Wtype-limits yields
tools/rkcommon.c: In function ‘rkcommon_check_params’:
tools/rkcommon.c:158:27: warning: comparison of
unsigned expression < 0 is always false [-Wtype-limits]
158 | if (spl_params.init_size < 0)
| ^
tools/rkcommon.c:165:28: warn
Hi Pragnesh,
On 5/9/20 4:30 PM, Pragnesh Patel wrote:
Add driver for fu540 to support ddr initialization in SPL.
This driver is based on FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel
Reviewed-by: Jagan Teki
Reviewed-by: Bin Meng
Tested-by: Bi
Without CONFIG_SYS_U_BOOT_OFFS set to CONFIG_SYS_SPI_U_BOOT_OFFS, U-Boot
will be located at address 0x16000. But, SPL will try to load the
payload from 0x24000 causing the boot to hang.
Signed-off-by: Ezra Buehler
---
Changes for v2:
- Tweaked commit message
include/configs/ds414.h | 3 +++
1
Without this U-Boot-specific property, booting on the Synology DS414
(or DS214+) fails in SPL. The spi0 DT node is not scanned, as a result
the SPI flash cannot be found.
Signed-off-by: Ezra Buehler
---
Changes for v2:
- Moved U-Boot-specific properties to *-u-boot.dtsi file
arch/arm/dts/arma
Booting from SPI flash on Synology DS414 (or DS214+) devices has been
broken for quite some time now. As far as I can tell this is due to
following commits:
3c265bbe4d rm: sync armada-xp dts files from Linux 5.0
7ddf8cfb0d kwbimage: Rename CONFIG_SYS_SPI_U_BOOT_OFFS to
CONFIG_SYS_U_BOOT_OFFS
C
Pull the device name setting into a separate function, as this
will be shared between DM/non-DM variants.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
---
drivers/net/rtl8139.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl813
Replace malloc()+memset() combination with calloc(), no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
---
drivers/net/rtl8139.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index adee618543..aabaacabc5 10
Instead of always calling rtl8139_eeprom_delay() with priv->ioaddr,
call it with priv and let the function access priv->ioaddr. This
reduces code duplication and has no impact, since the compiler will
inline this as needed anyway.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
---
drivers/net/r
Do not re-read the HW address from the EEPROM on every start of
transfer, otherwise the user will not be able to adjust ethaddr
as needed. Read the address only once, when the card is detected.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
---
drivers/net/rtl8139.c | 27 ++-
Replace the use of custom static ioaddr variable with common dev->iobase,
no functional change.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
---
drivers/net/rtl8139.c | 84 ---
1 file changed, 38 insertions(+), 46 deletions(-)
diff --git a/drivers/net/
These macros depended on the dev variable being declared wherever
they were used. This is wrong and will not work with DM anyway, so
pass only the PCI BFD into these macros, which fixes the dependency
and prepares them for DM support as well.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
---
d
Introduce rtl8139_pdata, which is a super-structure around eth_device
and tracks per-device state, here the device IO address, PCI BDF, RX
and TX ring position. Pass this structure around instead of the old
non-DM eth_device in preparation for DM conversion.
Signed-off-by: Marek Vasut
Cc: Joe Her
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
---
drivers/net/rtl8139.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/rtl8139.c b/d
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