On 27/11/2019 17.05, Marek Vasut wrote:
> On 11/27/19 4:40 PM, Claudius Heine wrote:
>> On 27/11/2019 16.21, Marek Vasut wrote:
>>> On 11/27/19 4:17 PM, Claudius Heine wrote:
On 27/11/2019 16.12, Marek Vasut wrote:
> On 11/27/19 4:09 PM, Claudius Heine wrote:
>> Hi Marek,
>>
>>
Hi Patrick,
Am Donnerstag, 28. November 2019, 00:38:45 CET schrieb Patrick Wildt:
> On Tue, Nov 19, 2019 at 12:04:02PM +0100, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > As part of loading trustedfirmware, the SPL is required to place portions
> > of code into the socs sram but the mm
On Wed, Nov 27, 2019 at 4:40 PM Claudius Heine wrote:
>
> On 27/11/2019 16.21, Marek Vasut wrote:
> > On 11/27/19 4:17 PM, Claudius Heine wrote:
> >> On 27/11/2019 16.12, Marek Vasut wrote:
> >>> On 11/27/19 4:09 PM, Claudius Heine wrote:
> Hi Marek,
>
> On 27/11/2019 15.47, Marek V
In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
anywere, even if SYSRESET is disabled for SPL/TPL.
'do_reset' is called from SPL for instance from the panic handler and
PANIC_HANG is not set
Signed-off-by: Claudius Heine
---
arch/arm/lib/Makefile | 2 +-
1 file chang
Hi,
Le 27/11/2019 à 21:13, Simon Goldschmidt a écrit :
> On Wed, Nov 27, 2019 at 1:58 PM Romain Naour wrote:
>>
>> Hello,
>>
>> I'm working on a modular socfpga based system with several optional boards.
>> Each optional board contain a board ID that can be read through a SPI bus.
>>
>> Since we
On 11/28/19 9:10 AM, Claudius Heine wrote:
> On 27/11/2019 17.05, Marek Vasut wrote:
>> On 11/27/19 4:40 PM, Claudius Heine wrote:
>>> On 27/11/2019 16.21, Marek Vasut wrote:
On 11/27/19 4:17 PM, Claudius Heine wrote:
> On 27/11/2019 16.12, Marek Vasut wrote:
>> On 11/27/19 4:09 PM, Cl
Hi Vasily,
I think this should not be needed, see comments below.
Hi Philipp, Klaus and Christoph:
Could you help to check why do you need below patch for your board?
ae0d33a729 rockchip: rk3399-puma: add code to allow forcing a power-on reset
I think we don't need this workarou
On 11/28/19 9:56 AM, Claudius Heine wrote:
> In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
> anywere, even if SYSRESET is disabled for SPL/TPL.
>
> 'do_reset' is called from SPL for instance from the panic handler and
> PANIC_HANG is not set
>
> Signed-off-by: Claudi
On Thu, Nov 28, 2019 at 10:03 AM Romain Naour wrote:
>
> Hi,
>
> Le 27/11/2019 à 21:13, Simon Goldschmidt a écrit :
> > On Wed, Nov 27, 2019 at 1:58 PM Romain Naour wrote:
> >>
> >> Hello,
> >>
> >> I'm working on a modular socfpga based system with several optional boards.
> >> Each optional boa
On Thu, Nov 28, 2019 at 9:57 AM Claudius Heine wrote:
>
> In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
> anywere, even if SYSRESET is disabled for SPL/TPL.
>
> 'do_reset' is called from SPL for instance from the panic handler and
> PANIC_HANG is not set
>
> Signed-of
On 2019/11/27 下午6:12, Paul Kocialkowski wrote:
According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/include/asm/arch-rockchip/grf_px30.h | 16 ++
On 2019/11/27 下午6:12, Paul Kocialkowski wrote:
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.
Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are
On 2019/11/28 下午2:14, Vasily Khoruzhick wrote:
Currently code doesn't even compile since it uses wrong
define for ifdef. Fix that and also add missing include
Fixes: 07586ee4322a ("rockchip: rk3399: Support common spl_board_init")
Signed-off-by: Vasily Khoruzhick
Reviewed-by: Kever Yang
Tha
Hi Jagan,
> Hi Lukasz,
>
> On Wed, Nov 27, 2019 at 9:47 PM Lukasz Majewski wrote:
> >
> > Hi Jagan,
> >
> > > Hi Lukasz,
> > >
> > > On Wed, Nov 27, 2019 at 4:15 PM Lukasz Majewski
> > > wrote:
> > > >
> > > > Hi Jagan,
> > > >
> > > > > Hi,
> > > > >
> > > > > I have created GPT table st
On 11/28/19 7:22 AM, Heinrich Schuchardt wrote:
> On 11/26/19 6:07 PM, Marek Vasut wrote:
>> On 11/26/19 5:52 PM, Tom Rini wrote:
>>> On Tue, Nov 26, 2019 at 05:47:48PM +0100, Marek Vasut wrote:
On 11/26/19 5:26 PM, Tom Rini wrote:
> On Tue, Nov 26, 2019 at 09:11:51AM +0100, Marek Vasut wr
Heiko,
> On 28.11.2019, at 10:44, Heiko Stuebner
> wrote:
>
> On 27.11.19 11:12, Paul Kocialkowski wrote:
>> Some generic PX30 SoMs found in the wild use UART3 as their debug output
>> instead of UART2 (used for MMC) and UART5.
>>
>> Make it possible to use UART3 as early debug output, with th
Hi Heiko,
On Thu 28 Nov 19, 10:44, Heiko Stuebner wrote:
> On 27.11.19 11:12, Paul Kocialkowski wrote:
> > Some generic PX30 SoMs found in the wild use UART3 as their debug output
> > instead of UART2 (used for MMC) and UART5.
> >
> > Make it possible to use UART3 as early debug output, with the
The following changes since commit 9a0cbae22a613dfd55e15565785749b74c19fdf0:
Merge tag 'u-boot-rockchip-20191124' of
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip (2019-11-23
20:50:11 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-socfpga.git master
for y
The following changes since commit 9a0cbae22a613dfd55e15565785749b74c19fdf0:
Merge tag 'u-boot-rockchip-20191124' of
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip (2019-11-23
20:50:11 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-usb.git master
for you t
On the MX7ULP, OCRAM for DCD is at 0x2f01
Signed-off-by: Jorge Ramirez-Ortiz
---
tools/imximage.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/tools/imximage.c b/tools/imximage.c
index d7c0b6e883..762a06d468 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -11,6 +11,7 @@
On 28/11/2019 10.27, Simon Goldschmidt wrote:
> On Thu, Nov 28, 2019 at 9:57 AM Claudius Heine wrote:
>>
>> In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
>> anywere, even if SYSRESET is disabled for SPL/TPL.
>>
>> 'do_reset' is called from SPL for instance from the pa
Hi all,
U-boot imx-specific bootaux command doesn't work properly
with the old legacy binary format if the DCACHE is enabled (I've
tested only executing from OCRAM) in the mainline U-boot.
Interesting thing is that invocation of `dcache flush` before bootaux
doesn't help, but only full disabling
On Thu, Nov 28, 2019 at 11:52 AM Claudius Heine wrote:
>
> On 28/11/2019 10.27, Simon Goldschmidt wrote:
> > On Thu, Nov 28, 2019 at 9:57 AM Claudius Heine wrote:
> >>
> >> In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
> >> anywere, even if SYSRESET is disabled for S
On Thu, Nov 28, 2019 at 1:59 AM Ley Foon Tan wrote:
>
> On Thu, Nov 28, 2019 at 4:33 AM Simon Goldschmidt
> wrote:
> >
> > Ley, Tom,
> >
> > Am 26.11.2019 um 10:26 schrieb Ley Foon Tan:
> > > On Fri, Nov 8, 2019 at 10:53 AM Ley Foon Tan
> > > wrote:
> > >>
> > >> Add an option for building cach
On Thu, Nov 28, 2019 at 12:52 PM Igor Opaniuk wrote:
>
> Hi all,
>
> U-boot imx-specific bootaux command doesn't work properly
> with the old legacy binary format if the DCACHE is enabled (I've
> tested only executing from OCRAM) in the mainline U-boot.
>
> Interesting thing is that invocation of
Hi,
currently the reset on the DHCOM i.MX6 board is brocken in u-boot.
This patchset fixes that by integrating the sysreset and watchdog dm driver.
regards,
Claudius
Claudius Heine (4):
ARM: dts: dh-imx6: add wdt-reboot node for sysreset driver
ARM: imx6: DHCOM i.MX6 PDK: Enable sysreset dr
Signed-off-by: Claudius Heine
---
arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
b/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
index af4719aaeb..572bcbf8f0 100644
--- a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
+++ b/arch/ar
Signed-off-by: Claudius Heine
---
configs/dh_imx6_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 4055812007..68dc3b0d1f 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -77,6 +77,8 @@ CONFIG_DM_S
The SPL does not have DM enabled and therefor needs to use the hardware
watchdog interface provided by the imx-watchdog driver.
Signed-off-by: Claudius Heine
---
include/configs/dh_imx6.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6
Signed-off-by: Claudius Heine
---
configs/dh_imx6_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 68dc3b0d1f..e5c44381b2 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_MM
On 11/28/19 1:06 PM, Claudius Heine wrote:
> Signed-off-by: Claudius Heine
> ---
> arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
> b/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
> index af4719aaeb..572bcbf8f0 1006
On NixOS, cross compiled kernels have long suffixes that cause them to
exceed the current maximum path length. The PXE/TFTP max path length is
used for extlinux.conf support as well, which is where this problem
usually manifest's itself.
Signed-off-by: Ben Wolsieffer
---
cmd/pxe.c | 2 +-
1 file
On 27.11.19 11:12, Paul Kocialkowski wrote:
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.
Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are sup
On 27.11.19 11:12, Paul Kocialkowski wrote:
According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Heiko Stuebner
Thanks for that catch
Heiko
___
U-
This ensures the USB_MUSB_PIO_ONLY config is set to an apppropriate
value from the changes enabling USB_MUSB_GADGET does.
Namely, USB_MUSB_PIO_ONLY default to =y on USB_MUSB_SUNXI being y.
Signed-off-by: Samuel Dionne-Riel
---
Changes in v2:
- Use select as a reverse-dependency
As discussed
Hello Claudius,
On Thu, 2019-11-28 at 13:06 +0100, Claudius Heine wrote:
> Hi,
>
> currently the reset on the DHCOM i.MX6 board is brocken in u-boot.
>
> This patchset fixes that by integrating the sysreset and watchdog dm driver.
I think you should clarify that reset was broken by commit f2929
Fixes: e766849713ff ("net: ftgmac100: convert the RX/TX descriptor arrays")
Signed-off-by: Cédric Le Goater
---
drivers/net/ftgmac100.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 92c38a81bd35..c14647
On 28/11/2019 13.14, Marek Vasut wrote:
> On 11/28/19 1:06 PM, Claudius Heine wrote:
>> Signed-off-by: Claudius Heine
>> ---
>> arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 5 +
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
>> b/arch/arm/dts/imx6qdl-dhc
Hi Claudius,
On Thu, Nov 28, 2019 at 9:07 AM Claudius Heine wrote:
>
> Signed-off-by: Claudius Heine
> ---
> arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
> b/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
> index
Hi Harald,
On 28/11/2019 13.34, Harald Seiler wrote:
> Hello Claudius,
>
> On Thu, 2019-11-28 at 13:06 +0100, Claudius Heine wrote:
>> Hi,
>>
>> currently the reset on the DHCOM i.MX6 board is brocken in u-boot.
>>
>> This patchset fixes that by integrating the sysreset and watchdog dm driver.
>
Hello Claudius, Fabio,
On Thu, 2019-11-28 at 09:49 -0300, Fabio Estevam wrote:
> Hi Claudius,
>
> On Thu, Nov 28, 2019 at 9:07 AM Claudius Heine wrote:
> > Signed-off-by: Claudius Heine
> > ---
> > arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > dif
Hi Fabio,
On 28/11/2019 13.49, Fabio Estevam wrote:
> Hi Claudius,
>
> On Thu, Nov 28, 2019 at 9:07 AM Claudius Heine wrote:
>>
>> Signed-off-by: Claudius Heine
>> ---
>> arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 5 +
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/dts/imx6qdl-
Hi Claudius,
On Thu, Nov 28, 2019 at 10:15 AM Claudius Heine wrote:
> That is the sysreset device node, not the imx2_wdt one. (I will move
> that into a '*-u-boot.dtsi' in v2)
>
> Or am I misunderstanding you?
What I am asking is: why do we need a specific sysreset node for U-Boot?
Can't we ju
On 28/11/2019 14.18, Fabio Estevam wrote:
> Hi Claudius,
>
> On Thu, Nov 28, 2019 at 10:15 AM Claudius Heine wrote:
>
>> That is the sysreset device node, not the imx2_wdt one. (I will move
>> that into a '*-u-boot.dtsi' in v2)
>>
>> Or am I misunderstanding you?
>
> What I am asking is: why do
On Tue, Nov 26, 2019 at 09:51:04AM +0900, AKASHI Takahiro wrote:
> One of major missing features in current UEFI implementation is "secure boot."
> The ultimate goal of my attempt is to implement image authentication based
> on signature and provide UEFI secure boot support which would be fully
> c
On Thu, Nov 28, 2019 at 10:42 AM Claudius Heine wrote:
>
> On 28/11/2019 14.18, Fabio Estevam wrote:
> > Hi Claudius,
> >
> > On Thu, Nov 28, 2019 at 10:15 AM Claudius Heine wrote:
> >
> >> That is the sysreset device node, not the imx2_wdt one. (I will move
> >> that into a '*-u-boot.dtsi' in v2
From: Igor Opaniuk
1. Change information printed about loaded M4 binary, print the stack
pointer and reset vector addressed.
2. Add sanity check for the address provided as param.
Signed-off-by: Igor Opaniuk
---
arch/arm/mach-imx/imx_bootaux.c | 6 +-
1 file changed, 5 insertions(+), 1 de
From: Igor Opaniuk
Currently imx-specific bootaux command doesn't support ELF format
firmware for Cortex-M4 core.
This patches introduces a PoC implementation of handling elf firmware
(load_elf_image_phdr() was copy-pasted from elf.c just for PoC).
This has the advantage that the user does not
From: Igor Opaniuk
This patch fixes the issue with broken bootaux command,
when M4 binary is loaded and data cache isn't flushed
before M4 core is enabled.
Reproducing:
> tftpboot ${loadaddr} ${board_name}/hello_world.bin
> cp.b ${loadaddr} 0x7F8000 $filesize
> bootaux 0x7F8000
Signed-off-by: I
Akashi-san,
On Tue, Nov 26, 2019 at 09:51:08AM +0900, AKASHI Takahiro wrote:
> efi_signature_parse_sigdb() is a helper function will be used to parse
> signature database variable and instantiate a signature store structure
> in later patches.
>
> Signed-off-by: AKASHI Takahiro
> ---
> include/
According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Kever Yang
Reviewed-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/grf_px30.h | 16
1 file changed, 8 insertions(
UART3 also has two sets of pins that can be selected.
Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.
Signed-off-by: Paul Kocialkowski
---
arch/arm/mach-rockchip/px30/Kconfig | 6 +++---
arch/arm/mach-rockchip/px30/px30.c | 4 ++--
2 files changed, 5
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.
Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are supported (M0/M1).
Future users should also note
On Thu, Nov 28, 2019 at 04:21:01PM +0200, Ilias Apalodimas wrote:
> Akashi-san,
>
> On Tue, Nov 26, 2019 at 09:51:08AM +0900, AKASHI Takahiro wrote:
> > efi_signature_parse_sigdb() is a helper function will be used to parse
> > signature database variable and instantiate a signature store structur
Hi Stefano,
On Mon, Oct 14, 2019 at 3:40 PM wrote:
>
> > From: Igor Opaniuk
> > i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
> > the rpmsg communication. Both use cases need a fixed location of
> > memory reserved. For the rpmsg use case the reserved area needs
> > to be in s
Hi Stefano,
On Mon, Oct 14, 2019 at 3:40 PM wrote:
>
> > From: Igor Opaniuk
> > Add support for setting linux,usable-memory property in the memory
> > node of device tree for the kernel [1].
> > This property holds a base address and size, describing a
> > limited region in which memory may be c
On 28/11/2019 14.55, Fabio Estevam wrote:
> On Thu, Nov 28, 2019 at 10:42 AM Claudius Heine wrote:
>>
>> On 28/11/2019 14.18, Fabio Estevam wrote:
>>> Hi Claudius,
>>>
>>> On Thu, Nov 28, 2019 at 10:15 AM Claudius Heine wrote:
>>>
That is the sysreset device node, not the imx2_wdt one. (I wi
Hi Claudius,
On Thu, Nov 28, 2019 at 12:31 PM Claudius Heine wrote:
> Sorry, but we are probably misunderstanding each other here. So I try to
> go step by step to show how I think about this. Maybe that way we figure
> out where our understanding differs. Please bear with me, its a bit
> verbos
On Thu, Nov 28, 2019 at 1:23 AM Kever Yang wrote:
>
> Hi Vasily,
>
> I think this should not be needed, see comments below.
Hi Kever,
I've spent 2 weeks of my evenings debugging this issue but
unfortunately I don't have a proper fix. This is the only solution
that makes my rockpro64 reboot
Hi Alexey,
ping!
---
Eugeniy Paltsev
From: Eugeniy Paltsev
Sent: Friday, November 8, 2019 18:31
To: uboot-snps-...@synopsys.com; Alexey Brodkin
Cc: u-boot@lists.denx.de; Eugeniy Paltsev
Subject: [PATCH] ARC: enable unit tests on development platforms
On Thu, Nov 28, 2019 at 10:40:38AM +0100, Marek Vasut wrote:
> On 11/28/19 7:22 AM, Heinrich Schuchardt wrote:
> > On 11/26/19 6:07 PM, Marek Vasut wrote:
> >> On 11/26/19 5:52 PM, Tom Rini wrote:
> >>> On Tue, Nov 26, 2019 at 05:47:48PM +0100, Marek Vasut wrote:
> On 11/26/19 5:26 PM, Tom Rin
Hi Robert,
On Thu, Nov 28, 2019 at 1:22 PM Robert Hancock wrote:
> I ended up needing to add this node for our board as well to be able to
> reset from U-Boot using DM. The watchdog itself is set up just from its
> own device tree entry, but there's nothing to tie the sysreset code into
> using
When we do not have CONFIG_BLK (or SPL/TPL) enabled there are very few
cases where we need the blk_legacy code linked in. To catch these, build
when we have CONFIG_PARTITIONS set. In addition, we only need
cmd/blk_common.o to be linked in when we have CONFIG_HAVE_BLOCK_DEVICE
set, so make use of t
On 2019-11-28 6:34 a.m., Harald Seiler wrote:
> Hello Claudius,
>
> On Thu, 2019-11-28 at 13:06 +0100, Claudius Heine wrote:
>> Hi,
>>
>> currently the reset on the DHCOM i.MX6 board is brocken in u-boot.
>>
>> This patchset fixes that by integrating the sysreset and watchdog dm driver.
>
> I thi
On 2019-11-28 9:43 a.m., Fabio Estevam wrote:
> Hi Claudius,
>
> On Thu, Nov 28, 2019 at 12:31 PM Claudius Heine wrote:
>
>> Sorry, but we are probably misunderstanding each other here. So I try to
>> go step by step to show how I think about this. Maybe that way we figure
>> out where our under
Hi Vasily,
On 2019/11/28 下午11:51, Vasily Khoruzhick wrote:
On Thu, Nov 28, 2019 at 1:23 AM Kever Yang wrote:
Hi Vasily,
I think this should not be needed, see comments below.
Hi Kever,
I've spent 2 weeks of my evenings debugging this issue but
I can understand you work pretty hard o
On Thu, Nov 28, 2019 at 4:59 PM Kever Yang wrote:
>
> Hi Vasily,
>
> On 2019/11/28 下午11:51, Vasily Khoruzhick wrote:
> > On Thu, Nov 28, 2019 at 1:23 AM Kever Yang
> > wrote:
> >> Hi Vasily,
> >>
> >> I think this should not be needed, see comments below.
> > Hi Kever,
> >
> > I've spent 2
On Thu, 28 Nov 2019 at 12:37, Cédric Le Goater wrote:
>
> Fixes: e766849713ff ("net: ftgmac100: convert the RX/TX descriptor arrays")
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Thanks Cédric. This resolves the warnings I saw when running on a
machine with the dcache enabled:
On Thu, Nov 28, 2019 at 7:38 PM Simon Goldschmidt
wrote:
>
> On Thu, Nov 28, 2019 at 1:59 AM Ley Foon Tan wrote:
> >
> > On Thu, Nov 28, 2019 at 4:33 AM Simon Goldschmidt
> > wrote:
> > >
> > > Ley, Tom,
> > >
> > > Am 26.11.2019 um 10:26 schrieb Ley Foon Tan:
> > > > On Fri, Nov 8, 2019 at 10:5
Add an option for building cache drivers in SPL.
Signed-off-by: Ley Foon Tan
---
v2:
- Added "depends on CACHE" to SPL_CACHE.
- Change to use $(CONFIG_$(SPL_TPL_)CACHE) to enable cache DM build.
---
common/spl/Kconfig | 6 ++
drivers/Makefile | 1 +
drivers/cache/Makefile | 2 +-
>-Original Message-
>From: U-Boot On Behalf Of Michael Walle
>Sent: Saturday, November 2, 2019 11:56 PM
>To: u-boot@lists.denx.de
>Subject: [U-Boot] [PATCH v2 1/2] spi: nxp_fspi: new driver for the FlexSPI
>controller
>
>This is a port of the kernel's spi-nxp-fspi driver. It uses the new
Hi Simon,
On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote:
>
> This subsystem is present on various Intel SoCs.
>
> Add very basic support for taking an lpss device out of reset.
>
> Signed-off-by: Simon Glass
>
> ---
>
> Changes in v5: None
> Changes in v4:
> - Add support for updating power
This entire patch series migrate freescale qspi driver to spi-mem framework.
Patch 1 removes the old fsl qspi driver
Patch 2 adds new qspi driver incorporating spi-mem framework which is ported
version of linux qspi driver. Initial port was done by Frieder. Now, no more
direct access to spi-nor m
Remove freescale qspi driver which was based on spi-nor along with
fsl_qspi.h as this is not used by new driver anymore
Signed-off-by: Kuldeep Singh
---
drivers/spi/fsl_qspi.c | 1170
drivers/spi/fsl_qspi.h | 145 -
2 files changed, 1315 deletions(-)
Move CONFIG_FSL_QSPI to the boards defconfigs and while at it also
move CONFIG_SPI_FLASH_SPANSION
Signed-off-by: Frieder Schrempf
Signed-off-by: Kuldeep Singh
---
configs/ls1043aqds_qspi_defconfig| 2 +-
configs/ls1043aqds_sdcard_qspi_defconfig | 2 +-
configs/ls1043aqds_tfa_SEC
To support the SPI MEM API, instead of modifying the existing U-Boot
driver, this patch adds a port of the existing Linux driver.
This also has the advantage that porting changes and fixes from Linux
will be easier.
Porting of driver left most of the functions unchanged while few of the
changes are
LS1046ARDB and LS1046AQDS have s25fs512s flashes. So let's enable
CONFIG_SPI_FLASH_SPANSION in defconfigs
Signed-off-by: Kuldeep Singh
---
configs/ls1046aqds_qspi_defconfig | 2 +-
configs/ls1046aqds_sdcard_qspi_defconfig | 2 +-
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1
Some of these options are not used by the driver anymore and some of
them are obsolete as the information is gathered from the dt.
Also consolidating defines in common headers.
Signed-off-by: Frieder Schrempf
Signed-off-by: Ashish Kumar
Signed-off-by: Kuldeep Singh
---
.../include/asm/arch-fsl
From: Frieder Schrempf
This property is not used by the driver anymore so let's remove it.
Other dts still have 'num-cs' set, but they need a resync with the
Linux kernel anyway, so let's only do the U-Boot-specific files for
now.
Signed-off-by: Frieder Schrempf
Signed-off-by: Kuldeep Singh
--
Enable the config CONFIG_SPI_FLASH_SPANSION for ls1012ardb and
ls1012aqds while disabling CONFIG_SPI_FLASH_BAR at the same time
Signed-off-by: Ashish Kumar
Signed-off-by: Kuldeep Singh
---
configs/ls1012aqds_qspi_defconfig | 2 +-
configs/ls1012aqds_tfa_defconfig | 2 +-
According to new qspi driver, some properties like "bus-num, num-cs,
big-endian" are no longer used. Device endiannes can be determined from
device-type data in driver.
Now use board specific compatibles, generic node names and specific
labels to align with linux device-tree properties.
Also cons
>-Original Message-
>From: U-Boot-Custodians On
>Behalf Of Heinrich Schuchardt
>Sent: Tuesday, November 26, 2019 4:46 AM
>To: u-boot-custodi...@lists.denx.de; u-boot-board-
>maintain...@lists.denx.de; U-Boot Mailing List
>Subject: [U-Boot-Custodians] [RFC] Eliminate boards not using CON
Hi Simon,
On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote:
>
> Recent Intel SoCs share a pinctrl mechanism with many common elements. Add
> an implementation of this core functionality, allowing SoC-specific
> drivers to avoid adding common code.
>
> As well as a pinctrl driver this provides a
Hi, i think i have find the problem, but i think i doesn't have the
experience for modifie that.
on the file : drivers/fpga/ socfpga_gen5.c : line 161 : function
:
1. we wait fot the return of the fonction with the
value or
2. but he never comming its always the value
then we are
Hi Fabio,
On 28/11/2019 16.43, Fabio Estevam wrote:
> Hi Claudius,
>
> On Thu, Nov 28, 2019 at 12:31 PM Claudius Heine wrote:
>
>> Sorry, but we are probably misunderstanding each other here. So I try to
>> go step by step to show how I think about this. Maybe that way we figure
>> out where ou
On 27.11.2019 14:44, Alexander Dahl wrote:
> The SAMA5D2 and SAMA5D4 series SoCs have a 64-bit Serial Number (unique
> ID) burned in, which is displayed with 'print_cpuinfo()' now (in the
> same format the SAM-BA applet prints it).
>
> Example output:
>
> CPU: SAMA5D27 1G bits DDR2 SDRAM
> Ser
Am 2019-11-29 06:03, schrieb Priyanka Jain:
-Original Message-
From: U-Boot On Behalf Of Michael Walle
Sent: Saturday, November 2, 2019 11:56 PM
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 1/2] spi: nxp_fspi: new driver for the
FlexSPI
controller
This is a port of the kernel'
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