On Thu, Feb 22, 2018 at 7:20 AM, Andre Przywara wrote:
> As we are running into issues where the final U-Boot FIT image file is
> exceeding our size limit, add a hint to the README.sunxi64 file
> to point out the possibility of building non-debug versions of the ATF
> binary. This is about 12KB sm
On Thu, 2018-02-15 at 15:58 +0100, Marek Vasut wrote:
> On 02/05/2018 08:06 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer drive
Hello Stefano,
> I do not see how you start the kernel. Anyway, it should be something
> like "bootz 0x8200 0x8800 0x8808". This is enough for U-Boot
> to pass the offset for ramdisk to kernel.
Here is my environment:
https://pastebin.com/nN4AbqMK
in.tftpd is set correctly, it takes
Hi,
On Mon, 5 Feb 2018 15:06:49 +0800 tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This is file system generic loader which can be used to load
> the file image from the storage into target such as memory.
> The consumer driver would then use this loader to program whatever,
> ie.
Hi,
On 22/02/18 08:05, Jagan Teki wrote:
> On Thu, Feb 22, 2018 at 7:20 AM, Andre Przywara
> wrote:
>> As we are running into issues where the final U-Boot FIT image file is
>> exceeding our size limit, add a hint to the README.sunxi64 file
>> to point out the possibility of building non-debug v
Replying to myself
2018-02-21 17:16 GMT+01:00 Clément Péron :
> Hi,
>
> I'm working on a dev board the SoC is Broadcom Cygnus with 256MiB of RAM
> Booting a Kernel and device tree works fine.
> But booting a Kernel with initramfs and a device tree make a strange behavior.
>
> Don't want to say stu
On Thu, Feb 22, 2018 at 09:03:05AM +, Andre Przywara wrote:
> Hi,
>
> On 22/02/18 08:05, Jagan Teki wrote:
> > On Thu, Feb 22, 2018 at 7:20 AM, Andre Przywara
> > wrote:
> >> As we are running into issues where the final U-Boot FIT image file is
> >> exceeding our size limit, add a hint to t
The kernel size is getting bigger and bigger. Because the Android
common kernel is even bigger than the vanilla kernel, so images
overlap with the current memory layout.
Change the load address to adjust for a bigger kernel image.
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h
This reduces the size of the binary by about 196 bytes.
Signed-off-by: Jean-Jacques Hiblot
---
drivers/mmc/omap_hsmmc.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index e0b679a..8b57edc 100644
--- a/drivers
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.
This saves around 740 bytes for the am335x_evm SPL.
S
This reduces the size of the binary by about 600 bytes.
Signed-off-by: Jean-Jacques Hiblot
---
drivers/mmc/omap_hsmmc.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 8b57edc..31c1f66 100644
--- a/d
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.
Signed-off-by: Alex Kiernan
Signed-off-by: Jean-Jacques Hiblot
---
drivers/mmc/omap_hsmmc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/omap_hsmmc.c b/dri
This series aims at reducing the footprint of the omap_hsmmc driver in
the SPL (1.5 kB gain in the case of the SPL for the am335x evm).
It also fixes an issue with the am335x_evm by setting a default maximum
frequency if none is defined in the dts.
tested on am335x_evm, bbb, bbb (vboot), and dra7
On 02/22/2018 07:29 AM, See, Chin Liang wrote:
> On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
>> On 02/21/2018 08:39 AM, chin.liang@intel.com wrote:
>>>
>>> From: Chin Liang See
>>>
>>> Enable Macronix flash support for Cyclone5 SoC
>> Do these boards actually have a macronix flash ?
If the bootcounter address is in a cached memory,
a flush of dcache must occur after updateing the bootcounter.
Issue found on i.MX6 where bootcounter is put into the internal
(cached) IRAM.
Signed-off-by: Stefano Babic
---
drivers/bootcount/bootcount.c | 3 +++
1 file changed, 3 insertions(+)
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI1 and
enabled it in defconfig.
Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
---
arch/arm/cpu/armv8/zynqmp/Kconfig| 5 +
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
configs/xilinx_zynqmp
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI0 and
enabled it in respective defconfig.
Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
---
arch/arm/cpu/armv8/zynqmp/Kconfig| 5 +
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
configs/xi
This series of patch moved mmc u-boot headers to the
Kconfig and enabled it in respective defconfig.
These are the configs:
-CONFIG_ZYNQ_SDHCI0
-CONFIG_ZYNQ_SDHCI1
Vipul Kumar (2):
arm64: zynqmp: mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI0
arm64: zynqmp: mmc: Added Kconfig support for C
Hi Stefano,
> If the bootcounter address is in a cached memory,
> a flush of dcache must occur after updateing the bootcounter.
>
> Issue found on i.MX6 where bootcounter is put into the internal
> (cached) IRAM.
>
> Signed-off-by: Stefano Babic
> ---
> drivers/bootcount/bootcount.c | 3 +++
>
Correct support for arrow keys: use the standard xterm escape sequences.
Provide support for F1-F12, Insert, Delete, Home, End, Page Up, Page Down.
Signed-off-by: Heinrich Schuchardt
Heinrich Schuchardt (2):
usb: kbd: allow multibyte sequences to be put into ring buffer
usb: kbd: implement
The USB keyboard driver provides a ring buffer for key strokes.
Function keys cannot be encoded as single bytes. Instead xterm control
sequences have to be put into the ring buffer.
This preparatory patch changes function usb_kbd_put_queue() to allow adding
multiple characters at once. If the buf
Correct support for arrow keys: use the standard xterm escape sequences.
Provide support for F1-F12, Insert, Delete, Home, End, Page Up, Page Down.
Signed-off-by: Heinrich Schuchardt
---
common/usb_kbd.c | 121 +--
1 file changed, 90 insertion
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
---
arch/arm/cpu/armv8/zynqmp/Kconfig | 3 +++
arch/arm/mach-zynq/Kconfig | 3 +++
configs/xilinx_zynqmp_ep_defco
This series of patch added Kconfig support for
CONFIG_ZYNQ_SDHCI_MAX_FREQ and CONFIG_ZYNQ_SDHCI_MIN_FREQ and
set the default values.
Vipul Kumar (2):
mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
arch/arm/cpu/armv8/zynqmp/
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
---
configs/xilinx_zynqmp_ep_defconfig | 1 +
drivers/mmc/Kconfig| 7 +++
drivers/mmc/zynq_sdhci.c
Hi Lukasz,
On 22/02/2018 12:52, Lukasz Majewski wrote:
> Hi Stefano,
>
>> If the bootcounter address is in a cached memory,
>> a flush of dcache must occur after updateing the bootcounter.
>>
>> Issue found on i.MX6 where bootcounter is put into the internal
>> (cached) IRAM.
>>
>> Signed-off-by:
This patch added Kconfig support for ZYNQ_EEPROM
and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
---
configs/xilinx_zynqmp_ep_defconfig | 1 +
configs/zynq_zc702_defconfig | 1 +
configs/zynq_zc706_defconfig | 1 +
drivers
This series of patch added Kconfig support for eeprom u-boot
headers and enabled in respective defconfig.
These are the configs:
-CONFIG_ZYNQ_EEPROM
-CONFIG_ZYNQ_EEPROM_BUS
-CONFIG_ZYNQ_GEM_EEPROM_ADDR
Vipul Kumar (2):
eeprom: Added Kconfig support for ZYNQ_EEPROM
eeprom: Added Kconfig suppor
This patch added Kconfig support for CONFIG_ZYNQ_EEPROM_BUS
and CONFIG_ZYNQ_GEM_EEPROM_ADDR and enabled it in
respective defconfig.
Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
---
configs/syzygy_hub_defconfig | 1 +
configs/xilinx_zynqmp_zcu102_rev1_0_
Hi Stefano,
> Hi Lukasz,
>
> On 22/02/2018 12:52, Lukasz Majewski wrote:
> > Hi Stefano,
> >
> >> If the bootcounter address is in a cached memory,
> >> a flush of dcache must occur after updateing the bootcounter.
> >>
> >> Issue found on i.MX6 where bootcounter is put into the internal
> >>
On Wed, Feb 21, 2018 at 10:14:47AM -0500, Tom Rini wrote:
> > > > Also, for transitioning e.g. from MMC to FAT, we would need a mechanism
> > > > to
> > > > store to an environment place other than the one selected at load time.
> > >
> > > Ah, so we have different valid use cases. Maybe a new e
Make SUNXI_NAND select SPL_NAND_SUPPORT in Kconfig, this limit the
number of entries to add in defconfig files when adding NAND support.
For now, the only board using it is the CHIP pro.
Signed-off-by: Miquel Raynal
---
configs/CHIP_pro_defconfig | 1 -
drivers/mtd/nand/Kconfig | 1 +
2 files
When the requested ECC strength does not exactly match the strengths
supported by the ECC engine, the driver is selecting the closest
strength meeting the 'selected_strength > requested_strength'
constraint. Fix the fact that, in this particular case, ecc->strength
value was not updated to match th
Code has been changed to do not use DMA anymore with the NAND
controller, instead PIO is used. Then, DMA-specific initialization may
be dropped.
Signed-off-by: Miquel Raynal
---
board/sunxi/board.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
A previous commit introduced the use of binman in the SPL.
After the binman_sym call over the 'pos' symbol, the output value is
checked against BINMAN_SYM_MISSING (-1UL). According to the
documentation (tools/binman/README), when it comes to the 'pos'
attribute:
pos:
This sets the positio
Prepare the future use of an helper to move the data pointer (the
column) of the NAND chip by renaming nand_reset_column() to
nand_change_column(). Resetting the column is just a matter of giving 0
as argument.
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/sunxi_nand_spl.c | 10 +-
1
Executing a command is matter of always doing the following sequence:
* Waiting for the FIFO to be empty so we can fill it with the new
command.
* Clearing the status register.
* Writing the command in the FIFO.
* Waiting for the command to finish.
Add a nand_exec_cmd() helper to handl
In the nand_read_buffer() step, the seed is calculated by doing a modulo
by conf->nseeds which is always zero when not using the randomizer (most
of SLC NANDs).
This situation turns out to lead to a run time freeze with certain
toolchains.
Derive this seed only when the randomizer is enabled (and
Let the Nintendo NES Classic use the Macronix NAND chip on it.
Signed-off-by: Miquel Raynal
---
arch/arm/dts/sun8i-a23-a33.dtsi| 18 ++
.../arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts | 14 ++
2 files changed, 32 insertions(+)
diff --gi
One bit in the control registers indicates if the NAND controller is
ready to receive a new command. Otherwise, the command FIFO is full and
we should wait for this bit to flip. It then states that the last
command has been processed and the FIFO is now free to welcome another
command.
Add this sa
When changing the column, the ONFI specification states that a minimum
time of tCCS (Change Column Setup time) must elapse between the last
address cycle is asserted on the bus and the first data cycle is
clocked. An usual value for average NANDs is 500 nanoseconds. Round it
up to 1 microsecond to
Hello,
This series first adds fixes and enhancements to sunxi NAND drivers (SPL
and U-Boot). Once this is done, the SPL NAND driver is converted to use
PIO instead of DMA with the goal to support all SoCs with this IP
without the need for DMA-related code. Finally, NAND support is added to
Nintend
On Thu, 22 Feb 2018 14:33:35 +0100
Miquel Raynal wrote:
> The pattern of polling on a status register until a bit is set or a
> timeout occurs is repeated multiple times in the driver. Mutualize the
> code by introducing the nand_wait_int() helper that does wait for the
> bit to flip or returns a
Change NFC_SEND_ADR to NFC_SEND_ADDR.
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/sunxi_nand_spl.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c
b/drivers/mtd/nand/sunxi_nand_spl.c
index 06695fc15f..608cc997ca 100644
--- a/driv
The pattern of polling on a status register until a bit is set or a
timeout occurs is repeated multiple times in the driver. Mutualize the
code by introducing the nand_wait_int() helper that does wait for the
bit to flip or returns an error in case of timeout.
Signed-off-by: Miquel Raynal
---
dr
Remove NAND_SUNXI from the CHIP pro defconfig to be automatically
selected depending on the state of ARCH_SUNXI.
Signed-off-by: Miquel Raynal
---
configs/CHIP_pro_defconfig | 1 -
drivers/mtd/nand/Kconfig | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/CHIP_pro_defc
Add NAND parameters to the Nintendo NES Classic configuration file which
features a Macronix NAND flash chip with 128kiB blocks of 2kiB pages
plus 64 OOB bytes.
Signed-off-by: Miquel Raynal
---
configs/Nintendo_NES_Classic_Edition_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a
SPL support was first written to support only the earlier generations of
Allwinner SoCs, and was only really enabled on the A13 / GR8. However,
those old SoCs had a DMA engine that has been replaced since the A31 by
another DMA controller that is no longer compatible.
Since the code directly uses
Move the NAND parameters from defconfig files to Kconfig for SUNXI
architecture only. Fort now only the CHIP pro is migrated.
It would have been better to convert this defconfig entry to Kconfig for
all supported machines/architectures but it has been abandoned due to a
fairly high amount of error
On 20/02/2018 11:44, Fabio Estevam wrote:
> On Mon, Feb 19, 2018 at 10:19 PM, Breno Lima wrote:
>> From: Breno Lima
>>
>> Currently it is not possible to run CMD_DEK on i.MX SPL targets:
>>
>> => dek_blob 0x1200 0x12001000 128
>>
>> The system hangs after running dek_blob because the CAAM clo
It is best practice to always clear the status register before executing
a command to be sure that the status read afterwards is relevant.
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/sunxi_nand_spl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c
b/d
Add some clocks/PLL definitions and the dependency on MACH_SUN8I in
Kconfig so the NAND support in the SPL could be compiled for boards
using A33 SoCs.
Signed-off-by: Miquel Raynal
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 ++
drivers/mtd/nand/Kconfig | 2 +-
Ensure the NAND controller reset line is deasserted before use.
Signed-off-by: Miquel Raynal
---
board/sunxi/board.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 8891961dcc..54ac018b80 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board
Move the ecc_bytes array out of nand_max_ecc_strength() for future use
by nand_read_page().
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/sunxi_nand_spl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c
b/drivers/mtd/nand/sunxi_nand_sp
On Thu, 2018-02-22 at 11:45 +0100, Marek Vasut wrote:
> On 02/22/2018 07:29 AM, See, Chin Liang wrote:
> >
> > On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
> > >
> > > On 02/21/2018 08:39 AM, chin.liang@intel.com wrote:
> > > >
> > > >
> > > > From: Chin Liang See
> > > >
> > > >
On Thu, 22 Feb 2018 14:33:39 +0100
Miquel Raynal wrote:
> When changing the column, the ONFI specification states that a minimum
> time of tCCS (Change Column Setup time) must elapse between the last
> address cycle is asserted on the bus and the first data cycle is
> clocked. An usual value for
Hi Jagan,
On 20/02/2018 08:16, Jagan Teki wrote:
> i.MX6 boards still using raw MMC write for SPL and
> u-boot-dtb.img along with Falcon mode configurations,
> so drop filesystem based write through SPL_EXT_SUPPORT.
>
> Signed-off-by: Jagan Teki
> ---
This is a fix, I pick it up (the whole seri
On Thu, Feb 22, 2018 at 7:08 PM, Stefano Babic wrote:
> Hi Jagan,
>
> On 20/02/2018 08:16, Jagan Teki wrote:
>> i.MX6 boards still using raw MMC write for SPL and
>> u-boot-dtb.img along with Falcon mode configurations,
>> so drop filesystem based write through SPL_EXT_SUPPORT.
>>
>> Signed-off-by
On Thu, Feb 22, 2018 at 02:33:41PM +0100, Miquel Raynal wrote:
> Ensure the NAND controller reset line is deasserted before use.
>
> Signed-off-by: Miquel Raynal
> ---
> board/sunxi/board.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> inde
Hi,
On Thu, Feb 22, 2018 at 02:33:46PM +0100, Miquel Raynal wrote:
> Let the Nintendo NES Classic use the Macronix NAND chip on it.
>
> Signed-off-by: Miquel Raynal
> ---
> arch/arm/dts/sun8i-a23-a33.dtsi| 18
> ++
> .../arm/dts/sun8i-r16-nintendo-nes-cl
On Thu, Feb 22, 2018 at 02:33:48PM +0100, Miquel Raynal wrote:
> Remove NAND_SUNXI from the CHIP pro defconfig to be automatically
> selected depending on the state of ARCH_SUNXI.
>
> Signed-off-by: Miquel Raynal
Acked-by: Maxime Ripard
Thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free
On Thu, Feb 22, 2018 at 02:33:47PM +0100, Miquel Raynal wrote:
> Make SUNXI_NAND select SPL_NAND_SUPPORT in Kconfig, this limit the
> number of entries to add in defconfig files when adding NAND support.
>
> For now, the only board using it is the CHIP pro.
>
> Signed-off-by: Miquel Raynal
Acke
On Thu, Feb 22, 2018 at 02:33:49PM +0100, Miquel Raynal wrote:
> Move the NAND parameters from defconfig files to Kconfig for SUNXI
> architecture only. Fort now only the CHIP pro is migrated.
>
> It would have been better to convert this defconfig entry to Kconfig for
> all supported machines/arc
On Thu, Feb 22, 2018 at 02:33:50PM +0100, Miquel Raynal wrote:
> Add NAND parameters to the Nintendo NES Classic configuration file which
> features a Macronix NAND flash chip with 128kiB blocks of 2kiB pages
> plus 64 OOB bytes.
>
> Signed-off-by: Miquel Raynal
Acked-by: Maxime Ripard
Thanks!
On Thu, 22 Feb 2018 14:33:30 +0100
Miquel Raynal wrote:
> Hello,
>
> This series first adds fixes and enhancements to sunxi NAND drivers (SPL
> and U-Boot). Once this is done, the SPL NAND driver is converted to use
> PIO instead of DMA with the goal to support all SoCs with this IP
> without th
On Wed, Feb 21, 2018 at 9:42 PM, Breno Lima wrote:
> From: Breno Lima
>
> Currently the High Assurance Boot procedure is documented in two
> places:
>
> - doc/README.imx6
> - doc/README.mxc_hab
>
> It is better to consolidate all HAB related information into
> README.mxc_hab file, so move the con
Hi,
On Thu, Feb 22, 2018 at 02:33:45PM +0100, Miquel Raynal wrote:
> Add some clocks/PLL definitions and the dependency on MACH_SUN8I in
> Kconfig so the NAND support in the SPL could be compiled for boards
> using A33 SoCs.
>
> Signed-off-by: Miquel Raynal
The patch is fine but the title is mi
Hi,
On Thu, Feb 22, 2018 at 02:33:31PM +0100, Miquel Raynal wrote:
> A previous commit introduced the use of binman in the SPL.
>
> After the binman_sym call over the 'pos' symbol, the output value is
> checked against BINMAN_SYM_MISSING (-1UL). According to the
> documentation (tools/binman/READ
On Thu, 22 Feb 2018 15:06:19 +0100
Boris Brezillon wrote:
> On Thu, 22 Feb 2018 14:33:30 +0100
> Miquel Raynal wrote:
>
> > Hello,
> >
> > This series first adds fixes and enhancements to sunxi NAND drivers (SPL
> > and U-Boot). Once this is done, the SPL NAND driver is converted to use
> > PI
Hi Florian,
On 16.02.2018 11:23, Florian Klink wrote:
Hey,
I tried getting ClearFog to load u-boot from a M.2 SSD (via SATA)
So I built u-boot-spl.kwb
make clearfog_defconfig
make -j4 ARCH=arm CROSS_COMPILE=arm-none-eabi-
dd'ed it on the SSD:
dd if=u-boot-spl.kwb of=/dev/sdX bs=512 seek=
On 02/22/2018 01:04 PM, Heinrich Schuchardt wrote:
> The USB keyboard driver provides a ring buffer for key strokes.
>
> Function keys cannot be encoded as single bytes. Instead xterm control
> sequences have to be put into the ring buffer.
Does it work without xterm or with any other terminal ?
On 02/22/2018 02:39 PM, See, Chin Liang wrote:
> On Thu, 2018-02-22 at 11:45 +0100, Marek Vasut wrote:
>> On 02/22/2018 07:29 AM, See, Chin Liang wrote:
>>>
>>> On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
On 02/21/2018 08:39 AM, chin.liang@intel.com wrote:
>
>
>
On 02/22/2018 09:18 AM, Chee, Tien Fong wrote:
> On Thu, 2018-02-15 at 15:58 +0100, Marek Vasut wrote:
>> On 02/05/2018 08:06 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> This is file system generic loader which can be used to load
>>> the file image from the storage in
On 19.02.2018 07:17, Baruch Siach wrote:
This makes the network devices usable when booting a blank board over
UART, with no pre-configured MAC address stored in the environment area.
Signed-off-by: Baruch Siach
---
configs/clearfog_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Hey Stefan,
According to the clearfog wiki and uboot-armada38x src tree, there
are separate
images for sd and sata, with the makefile there calling
$(obj)tools/marvell/doimage -T mmc -D 0x0 -E 0x0 -G
$(obj)tools/marvell/bin_hdr/bin_hdr.bin u-boot.bin u-boot.mmc
vs
$(obj)tools/marvell/doimage
On Wed, Feb 21, 2018 at 03:26:05PM +0300, Alexey Brodkin wrote:
> Synopsys Data Fusion subsystem (DFSS) is targeted to deeply built-in
> use-cases and so to save some silicon area decision was made to
> escape usage of any busses and use instead directly wired to CPU
> peripherals. And one of those
On Thu, Feb 22, 2018 at 11:25:47AM +0100, Jean-Jacques Hiblot wrote:
> This reduces the size of the binary by about 600 bytes.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/mmc/omap_hsmmc.c | 16 ++--
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/dr
On Thu, Feb 22, 2018 at 11:25:46AM +0100, Jean-Jacques Hiblot wrote:
> This reduces the size of the binary by about 196 bytes.
>
> Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
--
Tom
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U-Boot
On Thu, Feb 22, 2018 at 11:25:45AM +0100, Jean-Jacques Hiblot wrote:
> The area for struct mmc can be allocated dynamically. It greatly reduces
> the size of struct omap_hsmmc_plat. This is useful in cases where the board
> level code declares one or two struct omap_hsmmc_plat because it doesn't
>
On Thu, Feb 22, 2018 at 11:25:48AM +0100, Jean-Jacques Hiblot wrote:
> mmc_of_parse() doesn't set a default value if none is available in DT.
> In that case, use a default 52MHz clock rate.
>
> Signed-off-by: Alex Kiernan
> Signed-off-by: Jean-Jacques Hiblot
>
Reviewed-by: Tom Rini
--
Tom
On Thu, Feb 22, 2018 at 03:28:12PM +0100, Marek Vasut wrote:
> On 02/22/2018 09:18 AM, Chee, Tien Fong wrote:
> > On Thu, 2018-02-15 at 15:58 +0100, Marek Vasut wrote:
> >> On 02/05/2018 08:06 AM, tien.fong.c...@intel.com wrote:
> >>>
> >>> From: Tien Fong Chee
> >>>
> >>> This is file system gene
Hi Tom,
On Thu, 2018-02-22 at 10:43 -0500, Tom Rini wrote:
> On Wed, Feb 21, 2018 at 03:26:05PM +0300, Alexey Brodkin wrote:
[snip]
> > static inline void serial_out_shift(void *addr, int shift, int value)
> > {
> > -#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
> > +#ifdef CONFIG_ARCH_DFSS
> > + wr
Hi,
On 21 February 2018 at 05:26, Alexey Brodkin
wrote:
> Synopsys Data Fusion subsystem (DFSS) is targeted to deeply built-in
> use-cases and so to save some silicon area decision was made to
> escape usage of any busses and use instead directly wired to CPU
> peripherals. And one of those is DW
Hi Alexey,
On 20 February 2018 at 10:54, Alexey Brodkin
wrote:
> Hi Simon, Tom,
>
> On Sun, 2018-02-04 at 06:40 -0700, Simon Glass wrote:
>> On 25 January 2018 at 11:22, Alexey Brodkin
>> wrote:
>> > From: Alexey Brodkin
>> >
>> > Disabling relocation might be useful on ARC for 2 reasons:
>> >
On 21 February 2018 at 09:10, Álvaro Fernández Rojas wrote:
> Move dma_ops to a separate header file, following other uclass
> implementations.
> While doing so, this patch also improves dma_ops documentation.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v3: Introduce changes reported by S
Hi Alexey,
On 20 February 2018 at 09:28, Alexey Brodkin
wrote:
> Hi Simon,
>
> On Sun, 2018-02-04 at 06:40 -0700, Simon Glass wrote:
>> Hi Alexey,
>>
>> On 25 January 2018 at 10:56, Alexey Brodkin
>> wrote:
>> > In case of no relocation we'll just waste some paceat the very end
>>
>> space at?
On 21 February 2018 at 09:10, Álvaro Fernández Rojas wrote:
> This adds channels support for dma controllers that have multiple channels
> which can transfer data to/from different devices (enet, usb...).
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v3: Introduce changes reported by Simon G
On Thu, Feb 22, 2018 at 04:07:39PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> On Thu, 2018-02-22 at 10:43 -0500, Tom Rini wrote:
> > On Wed, Feb 21, 2018 at 03:26:05PM +0300, Alexey Brodkin wrote:
>
> [snip]
>
> > > static inline void serial_out_shift(void *addr, int shift, int value)
> > > {
Hi Simon,
On Thu, 2018-02-22 at 09:17 -0700, Simon Glass wrote:
> Hi,
>
> On 21 February 2018 at 05:26, Alexey Brodkin
> wrote:
> > Synopsys Data Fusion subsystem (DFSS) is targeted to deeply built-in
> > use-cases and so to save some silicon area decision was made to
> > escape usage of any bus
Hi Peng,
On Sun, Feb 4, 2018 at 7:42 AM, Stefano Babic wrote:
> I have merged most of the series, Patch 2 up to patch 30, leaving out
> just the last one for the EVK. Building mx8evk is fine, I have just
> noted a couple of checkpatch warnings in mx8mq_evk.h
> (CONFIG_EXTRA_SETTINGS, line too lo
Hi Florian,
On 22.02.2018 15:52, Florian Klink wrote:
According to the clearfog wiki and uboot-armada38x src tree, there
are separate
images for sd and sata, with the makefile there calling
$(obj)tools/marvell/doimage -T mmc -D 0x0 -E 0x0 -G
$(obj)tools/marvell/bin_hdr/bin_hdr.bin u-boot.bin u-
Hi Alexey,
On 22 February 2018 at 09:23, Alexey Brodkin
wrote:
> Hi Simon,
>
> On Thu, 2018-02-22 at 09:17 -0700, Simon Glass wrote:
>> Hi,
>>
>> On 21 February 2018 at 05:26, Alexey Brodkin
>> wrote:
>> > Synopsys Data Fusion subsystem (DFSS) is targeted to deeply built-in
>> > use-cases and so
On 02/22/2018 03:20 PM, Marek Vasut wrote:
On 02/22/2018 01:04 PM, Heinrich Schuchardt wrote:
The USB keyboard driver provides a ring buffer for key strokes.
Function keys cannot be encoded as single bytes. Instead xterm control
sequences have to be put into the ring buffer.
Does it work with
Hi
I'd appreciated if you can clarify few points below.
On 02/21/2018 10:10 AM, Álvaro Fernández Rojas wrote:
> BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v3: no changes
> v2: Fix dma rx burst config and select DM
On 02/22/2018 07:06 PM, Heinrich Schuchardt wrote:
> On 02/22/2018 03:20 PM, Marek Vasut wrote:
>> On 02/22/2018 01:04 PM, Heinrich Schuchardt wrote:
>>> The USB keyboard driver provides a ring buffer for key strokes.
>>>
>>> Function keys cannot be encoded as single bytes. Instead xterm control
>>
Hi Grygori,
El 22/02/2018 a las 20:50, Grygorii Strashko escribió:
Hi
I'd appreciated if you can clarify few points below.
On 02/21/2018 10:10 AM, Álvaro Fernández Rojas wrote:
BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.
Signed-off-by: Álvaro Fernández Rojas
---
On 02/22/2018 08:55 PM, Marek Vasut wrote:
On 02/22/2018 07:06 PM, Heinrich Schuchardt wrote:
On 02/22/2018 03:20 PM, Marek Vasut wrote:
On 02/22/2018 01:04 PM, Heinrich Schuchardt wrote:
The USB keyboard driver provides a ring buffer for key strokes.
Function keys cannot be encoded as single
On Tue, Jan 30, 2018 at 9:01 AM, Jean-Jacques Hiblot
wrote:
> From: Kishon Vijay Abraham I
>
> Use the mmc_of_parse library function to populate mmc_config instead of
> repeating the same code in host controller driver.
>
> Signed-off-by: Kishon Vijay Abraham I
> Signed-off-by: Jean-Jacques Hib
On 02/22/2018 09:53 PM, Heinrich Schuchardt wrote:
> On 02/22/2018 08:55 PM, Marek Vasut wrote:
>> On 02/22/2018 07:06 PM, Heinrich Schuchardt wrote:
>>> On 02/22/2018 03:20 PM, Marek Vasut wrote:
On 02/22/2018 01:04 PM, Heinrich Schuchardt wrote:
> The USB keyboard driver provides a ring
On Thu, Feb 22, 2018 at 4:43 PM, Adam Ford wrote:
>
>
> On Tue, Jan 30, 2018 at 9:01 AM, Jean-Jacques Hiblot
> wrote:
>
>> From: Kishon Vijay Abraham I
>>
>> Use the mmc_of_parse library function to populate mmc_config instead of
>> repeating the same code in host controller driver.
>>
>> Signe
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