On 02/12/2017 04:29, Simon Glass wrote:
Hi Jean-Jacques,
On 29 November 2017 at 07:29, Jean-Jacques Hiblot wrote:
Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those feature
> -Original Message-
> From: Calvin Johnson [mailto:calvin.john...@nxp.com]
> Sent: Monday, October 09, 2017 2:42 PM
> To: u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; York Sun
> ; joe.hershber...@ni.com; Calvin Johnson
> ; Anji Jagarlmudi
> Subject: [PATCH 9/9] configs: ls1012a: add p
Hi Joe,
> -Original Message-
> From: Joe Hershberger [mailto:joe.hershber...@gmail.com]
> Sent: Wednesday, December 06, 2017 2:35 AM
> >
>
> Your PFE patch set is not fully reviewed or accepted. If I were you, I
> would probably send v2 version to include all the chang
Hi Poonam,
> -Original Message-
> From: Poonam Aggrwal
> Sent: Friday, November 24, 2017 11:25 AM
> To: Calvin Johnson ; u-boot@lists.denx.de
> Cc: joe.hershber...@ni.com; Anji Jagarlmudi
> Subject: RE: [U-Boot] [PATCH 7/9] armv8: fsl-lsch2: configure pfe's scfg &
> dcfg
> registers
>
>
Hi Jagan,
Ping!!
Thanks,
Siva
> -Original Message-
> From: Siva Durga Prasad Paladugu
> Sent: Thursday, November 23, 2017 1:01 PM
> To: Jagan Teki
> Cc: u-boot@lists.denx.de; Liam Beguin
> Subject: RE: [UBOOT PATCH 1/2] spi: zynqmp_qspi: Add support for ZynqMP
> qspi driver
>
> Hi Jag
On 5.12.2017 19:38, Tom Rini wrote:
> On Tue, Dec 05, 2017 at 11:20:57AM -0700, Stephen Warren wrote:
>> On 12/04/2017 04:21 PM, Tom Rini wrote:
>>> On Mon, Dec 04, 2017 at 10:14:06AM -0700, Stephen Warren wrote:
On 12/04/2017 08:30 AM, Tom Rini wrote:
> On Mon, Dec 04, 2017 at 03:21:04PM
On 5.12.2017 16:13, Tom Rini wrote:
> On Tue, Dec 05, 2017 at 01:10:47PM +0100, Michal Simek wrote:
>> On 4.12.2017 18:14, Stephen Warren wrote:
>>> On 12/04/2017 08:30 AM, Tom Rini wrote:
On Mon, Dec 04, 2017 at 03:21:04PM +0100, Michal Simek wrote:
> On 4.12.2017 15:03, Tom Rini wrote:
>
On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Tue, 5 Dec 2017 15:57:57 +0800 tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
For LS1012ARDB RevD and later versions, the I2C reading for DIP
switch setting had been no longer reliable since the board was
reworked. This patch is to add hwconfig support to enable/disable
eSDHC1 manually for these boards. Also let kernel decide status
of esdhc0.
Signed-off-by: Yangbo Lu
---
Hi York,
Thank you for your suggestion.
I sent out v3 patch which is backward-compatible. Please check.
Thanks a lot.
Best regards,
Yangbo Lu
> -Original Message-
> From: York Sun
> Sent: 2017年12月1日 1:59
> To: Y.b. Lu ; u-boot@lists.denx.de
> Cc: Xiaobo Xie
> Subject: Re: [v2] armv8:
Hi,
On Wed, 6 Dec 2017 10:06:21 + Chee, Tien Fong wrote:
> On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> > Hi,
> >
> > On Tue, 5 Dec 2017 15:57:57 +0800 tien.fong.c...@intel.com wrote:
> > >
> > > From: Tien Fong Chee
> > >
> > > This is file system generic loader which can b
From: Ofer Heifetz
I'm looking into the NAND support for the db-88f6820-amc board.
There are a number of changes in the pxa3xx_nand driver in Linux that
are relevant (not specifically to this boards but to Armada boards in
general). Some of these changes are cleanups and some are actual bug
fixes
From: Ofer Heifetz
Since the pxa3xx_nand driver was added there has been a discrepancy in
pxa3xx_nand_set_sdr_timing() around the setting of tWP_min and tRP_min.
This brings us into line with the current Linux code.
Signed-off-by: Chris Packham
Tested-by: Ofer Heifetz
---
drivers/mtd/nand/pxa
From: Ofer Heifetz
Don't store struct mtd_info in struct pxa3xx_nand_host. Instead use the
one that is already part of struct nand_chip. This brings us in line
with current U-boot and Linux conventions.
Signed-off-by: Chris Packham
Reviewed-by: Ofer Heifetz
Tested-by: Ofer Heifetz
---
driver
From: Ofer Heifetz
The read ID count should be made as large as the maximum READ_ID size,
so there's no need to have dynamic size. This commit sets the hardware
maximum read ID count, which should be more than enough on all cases.
Also, we get rid of the read_id_bytes, and use a macro instead.
[
From: Ofer Heifetz
The Data Flash Control Register (NDCR) contains two types
of parameters: those that are needed for device identification,
and those that can only be set after device identification.
Therefore, the driver can't set them all at once and instead
needs to configure the first group
From: Ofer Heifetz
When 2 commands are submitted in a row, and the second is very quick,
the completion of the second command might never come. This happens
especially if the second command is quick, such as a status read
after an erase
[ Linux commit 21fc0ef9652f0c809dc0d3e0a67f1e1bf6ff8255 ]
From: Ofer Heifetz
This commit simplifies the initial configuration performed
by pxa3xx_nand_scan. No functionality change is intended.
[ Linux commit 154f50fbde539c20bbf74854461d932ebdace4d5 ]
Cc: Ezequiel García
Signed-off-by: Chris Packham
Reviewed-by: Ofer Heifetz
Tested-by: Ofer Heifetz
From: Ofer Heifetz
When the nand is first probe, and upon the first command start, the
status bits should be cleared before the interrupts are unmasked.
[ Linux commit 0b14392db2e998157d924085d7913e537ec26121 ]
Cc: Robert Jarzmik
Signed-off-by: Chris Packham
Reviewed-by: Ofer Heifetz
Tested-
From: Ofer Heifetz
The chunk size represents the size of the data chunks, which
is used by the controllers that allow to split transfered data.
However, the initial chunk size is used in a non-splitted way,
during device identification. Therefore, it must be large enough
for all the NAND command
Hi Chris
> -Original Message-
> From: Chris Packham [mailto:judge.pack...@gmail.com]
> Sent: Wednesday, December 06, 2017 9:49 AM
> To: Ofer Heifetz ; Scott Wood ;
> Scott Wood ; Tom Rini
> Cc: u-boot ; Nadav Haklai ;
> Stefan Roese ; Ezequiel Garcia
>
> Subject: Re: [RFC PATCH v3 01/10]
From: Ofer Heifetz
This commit is needed to properly support the 8-bits ECC configuration
with 4KB pages.
When pages larger than 2 KB are used on platforms using the PXA3xx
NAND controller, the reading/programming operations need to be split
in chunks of 2 KBs or less because the controller FIFO
these patches were sent on mistake and should be ignored, I will rework this
patchset and send again later
> -Original Message-
> From: of...@marvell.com [mailto:of...@marvell.com]
> Sent: Wednesday, December 06, 2017 8:56 AM
> To: u-boot@lists.denx.de
> Cc: Nadav Haklai ; s...@denx.de; O
From: Ofer Heifetz
The initial buffer is used for the initial commands used to detect
a flash device (STATUS, READID and PARAM).
ONFI param page is 256 bytes, and there are three redundant copies
to be read. JEDEC param page is 512 bytes, and there are also three
redundant copies to be read. Hen
On Wed, Dec 06, 2017 at 10:53:08AM +0100, Michal Simek wrote:
> On 5.12.2017 16:13, Tom Rini wrote:
> > On Tue, Dec 05, 2017 at 01:10:47PM +0100, Michal Simek wrote:
> >> On 4.12.2017 18:14, Stephen Warren wrote:
> >>> On 12/04/2017 08:30 AM, Tom Rini wrote:
> On Mon, Dec 04, 2017 at 03:21:04P
On 03/12/2017 10:17, Beniamino Galvani wrote:
> Update gxbb-clkc.h from Linux 4.14 as it contains new clock ids.
>
> Signed-off-by: Beniamino Galvani
> ---
> include/dt-bindings/clock/gxbb-clkc.h | 75
> +++
> 1 file changed, 75 insertions(+)
>
> diff --git a/in
On 03/12/2017 10:17, Beniamino Galvani wrote:
> Add add a function to measure the current clock rate.
>
> Signed-off-by: Beniamino Galvani
> ---
> arch/arm/include/asm/arch-meson/clock.h | 34 +
> arch/arm/mach-meson/Makefile| 2 +-
> arch/arm/mach-meson/cloc
On 03/12/2017 10:17, Beniamino Galvani wrote:
> Introduce a basic clock driver for Amlogic Meson SoCs which supports
> enabling/disabling clock gates and getting their frequency.
>
> Signed-off-by: Beniamino Galvani
> ---
> arch/arm/mach-meson/Kconfig | 2 +
> drivers/clk/Makefile| 1
On 03/12/2017 10:17, Beniamino Galvani wrote:
> Use the clk framework to initialize clocks from drivers that need them
> instead of having hardcoded frequencies and initializations from board
> code.
>
> Signed-off-by: Beniamino Galvani
> ---
> arch/arm/include/asm/arch-meson/gxbb.h | 10 ---
In function get_ram_size() and for 2 last cases the content of
the base address (*base) is not restored even it is
correctly saved in stack (in save[i]).
This patch solved this issue.
The content of the base address is saved in new variable
in stack (save_base) to avoid the need of other informat
From: Patrice Chotard
Add DT nodes to enable ARM_PL180_MMCI IP support for STM32F746
and STM32F769 discovery boards
There is a hardware issue on these boards, it misses a pullup on the GPIO line
used as card detect to allow correct SD card detection.
As workaround, cd-gpios property is not prese
From: Patrice Chotard
STM32F7 SoCs uses arm_pl180_mmci MMC IP.
Enable MMC support by updating DT and enabling MMC related flags
into defconfig.
Patrice Chotard (2):
ARM: DTS: stm32: add MMC nodes for stm32f746-disco and stm32f769-disco
configs: stm32f746-disco: enable MMC related flags
ar
From: Patrice Chotard
STM32F469-disco embeds an arm_pl180 mmc IP, so
enable CMD_MMC, DM_MMC and ARM_PL180_MMCI flags.
Also enables all filesystem command related flags :
_ CMD_EXT2
_ CMD_EXT4
_ CMD_FAT
_ CMD_FS_GENERIC
_ CMD_GPT
_ CMD_BOOTZ
Signed-off-by: Patrice Chotard
---
confi
- avoid disturbing 0MiB partition size (in fact < 1MiB)
- test overlap limit between part1 and part2
- test gpt write with data with modifier 'M' for MiB
Signed-off-by: Patrick Delaunay
---
test ok on v2018.01-rc1
./test/py/test.py -B sandbox
=> test/py/tests/test_gpt.py ...
Modification w
On 12/06/2017 10:08 AM, Patrick Delaunay wrote:
- avoid disturbing 0MiB partition size (in fact < 1MiB)
- test overlap limit between part1 and part2
- test gpt write with data with modifier 'M' for MiB
Signed-off-by: Patrick Delaunay
Reviewed-by: Stephen Warren
__
On 12/06/2017 02:19 AM, Yangbo Lu wrote:
> For LS1012ARDB RevD and later versions, the I2C reading for DIP
> switch setting had been no longer reliable since the board was
> reworked. This patch is to add hwconfig support to enable/disable
I think this message is not accurate. How about saying "I2
On Tue, Dec 5, 2017 at 8:34 PM, Chen-Yu Tsai wrote:
> On Wed, Dec 6, 2017 at 4:50 AM, Joe Hershberger
> wrote:
>> On Fri, Nov 24, 2017 at 11:08 PM, Chen-Yu Tsai wrote:
>>> The EMAC syscon has configurable RX/TX delay chains for use with RGMII
>>> PHYs.
>>>
>>> This adds support for configuring
Most predefined TLB tables don't have memory coherence bit set for
SDRAM. This wasn't an issue before invalidate_dcache_range() function
was enabled. Without the coherence bit, dcache invalidation doesn't
automatically flush the cache. The coherence bit is already set when
dynamic TLB table is used
Dear Patrick,
In message <1512575263-23010-1-git-send-email-patrick.delau...@st.com> you
wrote:
> In function get_ram_size() and for 2 last cases the content of
> the base address (*base) is not restored even it is
> correctly saved in stack (in save[i]).
>
> This patch solved this issue.
> The
In commit 6e6cf015e7cdd7ca83a933320a81201972bd5e5e ("Merge
git://www.denx.de/git/u-boot-imx") the line defining spl_sd
configuration for wandboard was removed, which resulted in no SPL
target being built.
Add it back.
Signed-off-by: Vagrant Cascadian
---
configs/wandboard_defconfig | 1 +
1 fi
On Tue, Dec 05, 2017 at 10:59:07PM +0100, Alexander Graf wrote:
> Hi Tom,
>
> This is my current patch queue for efi. Please pull.
>
> Alex
>
>
> The following changes since commit 9804d88630cdb22f5f0ace05ac05942928410fd9:
>
> Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh (2017-
On Mon, Dec 04, 2017 at 05:04:02PM +0100, Philipp Tomsich wrote:
> Since commit 2614a208471e ("common: command: tempory buffer should
> have size of command line buf"), there have been consistent Travis CI
> failures on my builds (interestingly not for Tom, even though building
> the same commit i
On Thu, Dec 7, 2017 at 4:20 AM, Joe Hershberger
wrote:
> On Tue, Dec 5, 2017 at 8:34 PM, Chen-Yu Tsai wrote:
>> On Wed, Dec 6, 2017 at 4:50 AM, Joe Hershberger
>> wrote:
>>> On Fri, Nov 24, 2017 at 11:08 PM, Chen-Yu Tsai wrote:
The EMAC syscon has configurable RX/TX delay chains for use w
On Thu, Nov 23, 2017 at 1:00 PM, Siva Durga Prasad Paladugu
wrote:
> Hi Jagan,
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Wednesday, November 01, 2017 2:54 PM
>> To: Siva Durga Prasad Paladugu
>> Cc: u-boot@lists.denx.de; Liam Beguin
>> Subject
On Rab, 2017-12-06 at 12:00 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Wed, 6 Dec 2017 10:06:21 + Chee, Tien Fong wrote:
> >
> > On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> > >
> > > Hi,
> > >
> > > On Tue, 5 Dec 2017 15:57:57 +0800 tien.fong.c...@intel.com
> > > wrote:
> > >
On Thu, Dec 7, 2017 at 1:42 AM, Karsten Merker wrote:
> On Mon, Nov 20, 2017 at 11:51:10AM +0100, Maxime Ripard wrote:
>> On Sat, Nov 18, 2017 at 12:20:54AM +0100, Karsten Merker wrote:
>> > On Fri, Nov 03, 2017 at 08:56:51AM +0200, Stefan Mavrodiev wrote:
>> > > From revision J the board uses new
On Tue, Dec 5, 2017 at 3:11 PM, Maxime Ripard
wrote:
> On Tue, Dec 05, 2017 at 02:00:07PM +0800, Chen-Yu Tsai wrote:
>> The A33-OLinuXino defconfig was using the default CONS_INDEX value for
>> A33, which actually points to the R_UART, which is routed to the GPIO
>> header without proper pull-ups
In fdt_fixup_board_enet() perform fdt fixup, fdt_status_okay, only when
both MC is applied and DPL is deployed.
Else returns failure, fdt_status_fail().
This patch add this check for
- LS2080A/LS2088A boards: in dir ls2080a, ls2080ardb and ls2080aqds
- LS1088A board: in dir ls1088a
Signed-off-by:
On Tue, Dec 5, 2017 at 11:50 AM, Goldschmidt Simon
wrote:
> + Lukasz (as a reviewer of my patch[1])
>
> On Mon, Dec 4, 2017 at 8:20, Jagan Teki wrote:
>> This is the patch[1] for 4-byte addressing, but I would wonder how can
>> proceed
>> operations with 4-byte if we disable during probe.
>>
>> [
On Fri, Dec 01, 2017 at 04:10:33PM +0100, Alexander Graf wrote:
> Commit 884bcf6f65 (efi_loader: use proper device-paths for partitions) tried
> to introduce the el torito scheme to all partition table types: Spawn
> individual disk objects for each partition on a disk.
>
> Unfortunately, that cod
Hi Alexander,
On Fri, Dec 01, 2017 at 10:46:29PM +0100, Alexander Graf wrote:
>
>
>On 28.11.17 03:09, Peng Fan wrote:
>> When compiling with android toolchain, there is an instruction
>> "str q0, [x8],#16", but x8 is not 16bytes aligned,
>> this instruction will trigger sync abort.
>>
>> So, f
Hi Philipp,
>> +#define DDRC_DFITMG0_SHADOW(X) (DDRC_IPS_BASE_ADDR(X) + 0x2190)
>> +#define DDRC_DFITMG1_SHADOW(X) (DDRC_IPS_BASE_ADDR(X) + 0x2194)
>> +#define DDRC_DFITMG2_SHADOW(X) (DDRC_IPS_BASE_ADDR(X) + 0x21b4)
>> +#define DDRC_DFITMG3_SHADOW(X) (DDRC_IPS_BASE_
Hi,
On Thu, 7 Dec 2017 05:29:24 + Chee, Tien Fong wrote:
> On Rab, 2017-12-06 at 12:00 +0100, Lothar Waßmann wrote:
> > Hi,
> >
> > On Wed, 6 Dec 2017 10:06:21 + Chee, Tien Fong wrote:
> > >
> > > On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> > > >
> > > > Hi,
> > > >
> >
Hi,
2017. 11. 11. 05:19에 "Krzysztof Kozlowski" 님이 작성:
On Fri, Nov 03, 2017 at 09:30:30AM +0100, Marek Szyprowski wrote:
> Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI,
> no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO
> button. USB3.0 ports are used for b
Hi
2017. 11. 30. 14:19에 "Jaehoon Chung" 님이 작성:
On 11/28/2017 11:10 PM, Tom Rini wrote:
> On Tue, Nov 28, 2017 at 04:20:39PM +0900, Jaehoon Chung wrote:
>
>> After updating dtc-1.4.5 version, there are too many warning.
>> This patch is to fix about exynos4 series.
>>
>> Signed-off-by: Jaehoon Chu
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