AArch32 Linux should start in EL1 instead of EL2.
Signed-off-by: Michal Simek
---
arch/arm/lib/bootm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 5c62d9c14406..e83d13de6749 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/ar
On 13.10.2017 01:14, Heinrich Schuchardt wrote:
> In
>
> if (a || b)
> else if (!a)
>
> the constraint (!a) is always true if else is reached and
> can be removed.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/arm/cpu/armv8/zynqmp/cpu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 dele
On 13.10.17 09:08, Michal Simek wrote:
> AArch32 Linux should start in EL1 instead of EL2.
Why? There is KVM on AArch32 as well.
Alex
>
> Signed-off-by: Michal Simek
> ---
>
> arch/arm/lib/bootm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/lib/bootm
On 13.10.2017 09:19, Alexander Graf wrote:
>
>
> On 13.10.17 09:08, Michal Simek wrote:
>> AArch32 Linux should start in EL1 instead of EL2.
>
> Why? There is KVM on AArch32 as well.
Is AArch32 without KVM able to start from EL2?
At least based on my tests this is not working.
M
__
On 13.10.17 09:26, Michal Simek wrote:
> On 13.10.2017 09:19, Alexander Graf wrote:
>>
>>
>> On 13.10.17 09:08, Michal Simek wrote:
>>> AArch32 Linux should start in EL1 instead of EL2.
>>
>> Why? There is KVM on AArch32 as well.
>
> Is AArch32 without KVM able to start from EL2?
> At least base
From: Tien Fong Chee
This patchset adding FPGA and SDRAM drivers, enable fpga loadfs to program FPGA
, SPL loading U-boot and booting to U-boot console. This version mainly resolved
comments from Marek in [v2].
This series is working on top of u-boot-socfpga.git -
http://git.denx.de/u-boot-socfp
From: Tien Fong Chee
This patch adds description on properties about location of FPGA RBFs are
stored, type and functionality of RBF used to configure FPGA.
Signed-off-by: Tien Fong Chee
---
doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | 11 +++
1 file changed, 11 inse
From: Tien Fong Chee
Enable generic filesystem interface drivers(fs.c and fat/) build
for SPL. This would allow generic filesystem being used in SPL.
Signed-off-by: Tien Fong Chee
Reviewed-by: Simon Glass
---
common/spl/Kconfig | 8
doc/README.SPL | 1 +
fs/Makefile| 1 +
From: Tien Fong Chee
Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling the wrong status bit. Fix with correct polling status bit.
Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Signed-off-by: Tien Fong Chee
---
drivers/fpga/socfpga_ar
From: Tien Fong Chee
These FPGA bitstream properties would help bootloader to understand
how to configure FPGA and where to look the FPGA RBF files during
booting.
Signed-off-by: Tien Fong Chee
---
arch/arm/dts/socfpga_arria10.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/
From: Tien Fong Chee
Add code necessary into the FPGA driver framework in U-Boot
so it can be used via the 'fpga' command for programing Arria 10
SoCFPGA.
Signed-off-by: Tien Fong Chee
---
cmd/fpga.c| 2 +-
drivers/fpga/altera.c | 40
drive
From: Tien Fong Chee
These drivers handle FPGA program operation from flash loading
RBF to memory and then to program FPGA.
Signed-off-by: Tien Fong Chee
---
.../include/mach/fpga_manager_arria10.h| 28 ++
drivers/fpga/socfpga_arria10.c | 435 ++
From: Tien Fong Chee
Enhance preloader header with both additional program length and program
entry offset attributes, which offset is relative to the start of program
header.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/include/mach/boot0.h | 7 +++
1 file changed, 7 insertions
From: Tien Fong Chee
Current sdram driver is only applied to gen5 device, hence it is better
to rename sdram driver to more specific name which is related to gen5
device.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/include/mach/sdram.h | 432 +
.../inclu
From: Tien Fong Chee
Generic firmware loader framework contains some common functionality
which is reusable by any specific file system firmware loader.
Signed-off-by: Tien Fong Chee
---
common/Makefile | 2 +
common/load_fs.c | 163 ++
From: Tien Fong Chee
Adding some details about size in bytes to each section.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/include/mach/boot0.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
b/arch/arm/mach-socfpga
From: Tien Fong Chee
fpga-mgr node is required in SPL, because SPL needs information
from the node to configure FPGA in Arria 10.
Signed-off-by: Tien Fong Chee
---
arch/arm/dts/socfpga_arria10.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/socfpga_arria10.dtsi
b/arch/ar
From: Tien Fong Chee
Add function for both multiple DRAM bank and single DRAM bank size
initialization. This common functionality could be used by every single
SOCFPGA board.
Signed-off-by: Tien Fong Chee
Tested-by: Ley Foon Tan
---
arch/arm/mach-socfpga/board.c| 7 +++
include/config
From: Tien Fong Chee
Enable function visible to other file, so it can be used by other
functions from other file.
Signed-off-by: Tien Fong Chee
---
common/spl/spl_mmc.c | 2 +-
include/spl.h| 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/common/spl/spl_mmc.c b/com
From: Tien Fong Chee
This patch enables DDR Kconfig support for Arria 10.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/Kconfig | 1 +
drivers/ddr/altera/Kconfig| 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-soc
From: Tien Fong Chee
SPL configures DDR by programming peripheral raw binary file
and calibrating DDR.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/spl.c | 56 +
1 file changed, 56 insertions(+)
diff --git a/arch/arm/mach-socfpga/spl.c b/
From: Tien Fong Chee
Add DDR driver suppport for Arria 10.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/include/mach/sdram.h | 2 +
arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 2 +
drivers/ddr/altera/Makefile| 1 +
drivers/ddr/altera/sd
From: Tien Fong Chee
Enable memory allocation in SPL for preparation to enable FAT
in SPL. Memory allocation is needed by FAT to work properly.
Signed-off-by: Tien Fong Chee
---
include/configs/socfpga_common.h | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff
From: Tien Fong Chee
Enable SPL successfully boot to U-boot.
Signed-off-by: Tien Fong Chee
---
configs/socfpga_arria10_defconfig | 57 +--
1 file changed, 49 insertions(+), 8 deletions(-)
diff --git a/configs/socfpga_arria10_defconfig
b/configs/socfpga_arr
From: Tien Fong Chee
SoC FPGA info is required in both SPL and U-boot.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/board.c| 3 +++
arch/arm/mach-socfpga/misc_arria10.c | 5 -
arch/arm/mach-socfpga/spl.c | 6 ++
3 files changed, 9 insertions(+), 5 deletions(
From: Tien Fong Chee
Clock frequency info is required in U-boot.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/board.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 965f9dc..9a96f52 100644
--- a/arch/ar
On Wed, 11 Oct 2017 14:41:38 -0400
Tom Rini wrote:
> On Wed, Oct 11, 2017 at 01:09:04PM -0300, Fabio Estevam wrote:
> > On Wed, Oct 11, 2017 at 1:06 PM, Jagan Teki
> > wrote:
> >
> > > I've observed here, u-boot is unable to relocate. So when I build
> > > U-Boot with removing u-boot,dm-spl fro
On 13.10.17 02:15, Heinrich Schuchardt wrote:
> On 10/09/2017 06:49 AM, Simon Glass wrote:
>> On 7 October 2017 at 22:57, Heinrich Schuchardt wrote:
>>> To avoid a forward declaration move efi_search_obj before
>>> all protocol services functions.
>>>
>>> Signed-off-by: Heinrich Schuchardt
>>>
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.
This also corrects reset_wait_timer from us to ms
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.
So far it seems only som-db5800-som-6867 board enables the Azal
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.
Signed-off-by: Bin Meng
---
arch/x86/cpu/baytrail/fsp_configs.c | 15 +--
arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 2 +-
On 13/10/17 08:26, Michal Simek wrote:
> On 13.10.2017 09:19, Alexander Graf wrote:
>>
>>
>> On 13.10.17 09:08, Michal Simek wrote:
>>> AArch32 Linux should start in EL1 instead of EL2.
>>
>> Why? There is KVM on AArch32 as well.
>
> Is AArch32 without KVM able to start from EL2?
> At least based
Hi Tom,
This is my current patch queue for efi. Please pull.
Alex
The following changes since commit 39dd65a059e503883dbf16d4c00ac083d15837da:
sandbox: Enable btrfs support (2017-10-03 08:44:55 -0400)
are available in the git repository at:
git://github.com/agraf/u-boot.git tags/signed-
On 13.10.2017 10:33, Marc Zyngier wrote:
> On 13/10/17 08:26, Michal Simek wrote:
>> On 13.10.2017 09:19, Alexander Graf wrote:
>>>
>>>
>>> On 13.10.17 09:08, Michal Simek wrote:
AArch32 Linux should start in EL1 instead of EL2.
>>>
>>> Why? There is KVM on AArch32 as well.
>>
>> Is AArch32 wi
On 13/10/17 09:37, Michal Simek wrote:
> On 13.10.2017 10:33, Marc Zyngier wrote:
>> On 13/10/17 08:26, Michal Simek wrote:
>>> On 13.10.2017 09:19, Alexander Graf wrote:
On 13.10.17 09:08, Michal Simek wrote:
> AArch32 Linux should start in EL1 instead of EL2.
Why? The
From: Michal Marek
The compiler can accept -DKBUILD_MODNAME="foo", it's just a matter of
quoting. That way, we reduce the gcc command line a bit.
Signed-off-by: Michal Marek
Signed-off-by: Masahiro Yamada
[ Linux commit: b42841b7bb6286da56b4fa79835c27166b7e228b ]
---
scripts/Makefile.lib |
Since Kbuild runs in the objtree, __FILE__ can be a very long path
depending of $(srctree).
If objtree is a child of srctree, the situation is a bit better.
($(srctree) is "..")
For other cases of out-of-tree build, filenames in WARN_ON() etc. are
still an absolute path. It also means the U-Boot
I want to reuse $(squote)$(quote)...$(quote)$(squote) in the next
commit. Move it to a helper.
Signed-off-by: Masahiro Yamada
---
scripts/Kbuild.include | 4
scripts/Makefile.lib | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/scripts/Kbuild.include b/scripts/Kbuil
We discussed the __FILE__ problem when U-Boot is built out of tree.
https://www.mail-archive.com/u-boot@lists.denx.de/msg242852.html
The deeper your build directory is located, the larger
your U-Boot image becomes.
If your platform has memory footprint limit, this is a problem.
Recently, I submi
Since Kbuild runs in the objtree, __FILE__ can be a very long path
depending of $(srctree).
If objtree is a child of srctree, the situation is a bit better.
($(srctree) is "..")
For other cases of out-of-tree build, filenames in WARN_ON() etc. are
still an absolute path. It also means the U-Boot
I want to reuse $(squote)$(quote)...$(quote)$(squote) in the next
commit. Move it to a helper.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
scripts/Kbuild.include | 4
scripts/Makefile.lib | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/scripts/Kbuild.in
We discussed the __FILE__ problem when U-Boot is built out of tree.
https://www.mail-archive.com/u-boot@lists.denx.de/msg242852.html
The deeper your build directory is located, the larger
your U-Boot image becomes.
If your platform has memory footprint limit, this is a problem.
Recently, I submi
From: Michal Marek
The compiler can accept -DKBUILD_MODNAME="foo", it's just a matter of
quoting. That way, we reduce the gcc command line a bit.
Signed-off-by: Michal Marek
Signed-off-by: Masahiro Yamada
[ Linux commit: b42841b7bb6286da56b4fa79835c27166b7e228b ]
---
Changes in v2: None
sc
Get clock rate from the clock driver instead of hard-coding it.
Signed-off-by: Masahiro Yamada
---
drivers/i2c/i2c-uniphier-f.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c
index eb6c9f3..6f4
Get clock rate from the clock driver instead of hard-coding it.
Signed-off-by: Masahiro Yamada
---
drivers/i2c/i2c-uniphier.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c
index 0f2734e..9100129 1
Like other recenct UniPhier SoCs, the pupdctrl number of PXs3
matches to the pin number.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
b/
ARCH_UNIPHIER_V8_MULTI depends on !SPL, so the default may be hidden.
Use a clearer default.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
inde
Add basic clock data for Socionext's new SoC PXs3.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/clk-uniphier-core.c | 8
drivers/clk/uniphier/clk-uniphier-sys.c | 14 ++
drivers/clk/uniphier/clk-uniphier.h | 1 +
3 files changed, 23 insertions(+)
diff --
Sync with Linux 4.14-rc4. (Include some DT updates queued up
for Linux 4.15.)
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ld11.dtsi| 15 --
arch/arm/dts/uniphier-ld20.dtsi| 97 --
arch/arm/dts/uniphier-ld4-ref.dts | 4 ++
arch/arm/
The non-volatile storage varies board by board. The default should
be NOWHERE. Please choose a proper device via Kconfig.
Signed-off-by: Masahiro Yamada
---
env/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/env/Kconfig b/env/Kconfig
index 024d4d7..20516a5 100644
--- a/env/Kconfig
priv->dev does not exist. Pass the correct pointer to udevice.
Signed-off-by: Masahiro Yamada
---
drivers/reset/reset-uniphier.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index c74d16f..a40cea5 100644
-
Use dev_dbg() functions. It will be helpful to prefix log messages
with the corresponding device name when the core framework is ready.
While I am here, I renamed "dev", which was actually private data,
into "priv" because dev->dev looks confusing.
Signed-off-by: Masahiro Yamada
---
drivers/i
Replace printf() with pr_() to specify proper loglevel.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/psci.c | 4 +++-
arch/arm/mach-uniphier/board_late_init.c | 4 +++-
arch/arm/mach-uniphier/boot-device/boot-device.c | 1 +
arch/arm/mach-uniphier/cpu-
- Reactor of GPIO, clk, reset drivers.
- Clean up SOC code
- Sync DT
- Use more clock drivers
- Split U-Boot specific DT property
Masahiro Yamada (20):
ARM: uniphier: switch to CONFIG_ENV_IS_NOWHERE
gpio: uniphier: rework single device node model
ARM: dts: uniphier: update GPIO nodes
Switch to the single node design.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ld11.dtsi | 23 +
arch/arm/dts/uniphier-ld4.dtsi | 115 ++
arch/arm/dts/uniphier-pro4.dtsi | 206 ++--
arch/arm/dts/uniphier-pro5.dtsi | 206 +
U-Boot does not support fancy clock tree structures like the Linux
common clock framework. Implement a simple clock tree model at the
driver level. With this, the clock data will be simplified.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/clk-uniphier-core.c | 267 +
First, I implemented this driver as per-bank model, but it was
a design mistake.
- There are 31 banks in the maximum case. It is painful to add
so many nodes to DT.
- The IRQ control registers are shared between banks. Per-bank
design is a problem for Linux. The counterpart for Lin
Including pulls in a lot of bloat. What this driver needs
is BIT(), so replace it with
Signed-off-by: Masahiro Yamada
---
drivers/usb/dwc3/dwc3-uniphier.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/dwc3-uniphier.c b/drivers/usb/dwc3/dwc3-uniphier.c
i
UniPhier 32-bit SoCs use CONFIG_SPL_OF_CONTROL. So, many nodes must
be marked as dm-pre-reloc to prevent fdtgrep from stripping them off.
Sprinkling U-Boot specific properties all over the place is painful
because DT files are synced with Linux from time to time.
Split u-boot,dm-pre-reloc out to
Add peripheral clock data for all SoCs.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/Makefile| 2 +
drivers/clk/uniphier/clk-uniphier-core.c | 33 +
drivers/clk/uniphier/clk-uniphier-peri.c | 113 +++
drivers/clk/uniphier/clk-uniphie
Both are unneeded in this file.
Signed-off-by: Masahiro Yamada
---
drivers/core/simple-bus.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c
index 14803e3..cc48c8b 100644
--- a/drivers/core/simple-bus.c
+++ b/drivers/core/simple-bus.c
Get clock rate from the clock driver to drop U-Boot specific
property "clock-frequency".
Signed-off-by: Masahiro Yamada
---
drivers/serial/serial_uniphier.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/se
The pin data are implemented for old SoCs to specify the bit shift of
the IECTRL register. They are not wortwhile given the required memory
footprint. Delete all the pin data and enable all bits of the IECTRL
register.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/uniphier/pinctrl-uniphi
The serial driver is probed by SPL and/or board_init_f. To get the
clock from the serial driver, the clock node must be marked as
u-boot,dm-pre-reloc.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-v7-u-boot.dtsi | 8
arch/arm/dts/uniphier-v8-u-boot.dtsi | 13 +
No global pointer is used in this file.
Signed-off-by: Masahiro Yamada
---
drivers/i2c/i2c-uclass.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 1397f34..920811a 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.
Use dev_dbg() functions. It will be helpful to prefix log messages
with the corresponding device name when the core framework is ready.
While I am here, I renamed "dev", which was actually private data,
into "priv" because dev->dev looks confusing.
Signed-off-by: Masahiro Yamada
---
drivers/i
On 10/13/2017 12:21 PM, Masahiro Yamada wrote:
> Including pulls in a lot of bloat. What this driver needs
> is BIT(), so replace it with
>
> Signed-off-by: Masahiro Yamada
Doesn't common.h also pull in the config macros ? Maybe they are not
needed here though ...
> ---
>
> drivers/usb/dwc
Hi,
On Monday 09 October 2017 05:47 PM, Faiz Abbas wrote:
> Adding support for TI bandgap temperature sensor.
> Also add dt support for bandgap sensor in spl.
>
> Faiz Abbas (2):
> thermal: ti-bandgap: Add support for temperature sensor
> ARM: dts: OMAP5+: Add support for bandgap sensor in SP
Hi Marek,
2017-10-13 19:40 GMT+09:00 Marek Vasut :
> On 10/13/2017 12:21 PM, Masahiro Yamada wrote:
>> Including pulls in a lot of bloat. What this driver needs
>> is BIT(), so replace it with
>>
>> Signed-off-by: Masahiro Yamada
>
> Doesn't common.h also pull in the config macros ? Maybe the
On 12.10.2017 14:07, Bin Meng wrote:
This is only needed when graphics console is used. For kernel with
native graphics driver, this can be turned off to speed up.
Change this option's default to n in the Kconfig.
Signed-off-by: Bin Meng
---
arch/x86/Kconfig | 1 -
1 file changed, 1 deleti
On 12.10.2017 14:07, Bin Meng wrote:
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI
S3 suspend/resume sometimes causes the Ubuntu kernel hang forever.
The issue is however not reproduced with a kernel built from i386/
x86_64 defconfig configuration.
The unstability is actual
On 10/13/2017 01:01 PM, Masahiro Yamada wrote:
> Hi Marek,
>
>
> 2017-10-13 19:40 GMT+09:00 Marek Vasut :
>> On 10/13/2017 12:21 PM, Masahiro Yamada wrote:
>>> Including pulls in a lot of bloat. What this driver needs
>>> is BIT(), so replace it with
>>>
>>> Signed-off-by: Masahiro Yamada
>>
On 13.10.2017 10:30, Bin Meng wrote:
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.
Signed-off-by: Bin Meng
---
arch/x86/cpu/baytrail/fsp_configs.c | 15 +--
arch/x86/include/
On 13.10.2017 10:30, Bin Meng wrote:
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.
This also
On 13.10.2017 10:30, Bin Meng wrote:
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.
So far it seems only som
The function dev_read_addr calls ofnode_get_addr_index in the live tree
case, which does not apply bus translations to the address read from the
device tree. This results in illegal addresses on boards that rely on
bus translations being applied.
Fix this situation by applying bus translations in
The function blob_encap_dek accesses a CAAM register
CONFIG_SYS_FSL_JR0_ADDR + 0x102c, before the CAAM clock has been enabled,
which causes the system to lock-up at the dek_blob command.
This patch enables and disables the CAAM clock, because this is also done in
arch/arm/imx-common/hab.c:authent
Hi Marek,
2017-10-06 21:07 GMT+09:00 Marek Vasut :
> Drop the ad-hoc DT caps parsing in favor of common framework function.
>
> Signed-off-by: Marek Vasut
> Cc: Jaehoon Chung
> Cc: Masahiro Yamada
"git grep" could not find mmc_of_parse.
Are you waiting for this one?
http://patchwork.ozlabs
On 10/13/2017 01:36 PM, Masahiro Yamada wrote:
> Hi Marek,
>
> 2017-10-06 21:07 GMT+09:00 Marek Vasut :
>> Drop the ad-hoc DT caps parsing in favor of common framework function.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Jaehoon Chung
>> Cc: Masahiro Yamada
>
>
> "git grep" could not find mmc_of
On Fri, Oct 13, 2017 at 06:51:42PM +0900, Masahiro Yamada wrote:
> We discussed the __FILE__ problem when U-Boot is built out of tree.
> https://www.mail-archive.com/u-boot@lists.denx.de/msg242852.html
>
> The deeper your build directory is located, the larger
> your U-Boot image becomes.
> If yo
2017-10-13 21:11 GMT+09:00 Tom Rini :
> On Fri, Oct 13, 2017 at 06:51:42PM +0900, Masahiro Yamada wrote:
>
>> We discussed the __FILE__ problem when U-Boot is built out of tree.
>> https://www.mail-archive.com/u-boot@lists.denx.de/msg242852.html
>>
>> The deeper your build directory is located, the
Hi,
On this page: http://www.denx.de/wiki/U-Boot/SourceCode
there is a link to Amazon Cloud Drive to download U-Boot, but this link is not
working anymore.
Another problem: on the FTP, there is no tarball for v2017.11-rc1.
Guillaume
___
U-Boot ma
The HSDK can manage some pins via CREG registers block.
Signed-off-by: Eugeniy Paltsev
---
MAINTAINERS | 6 +++
drivers/gpio/Kconfig | 7 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/hsdk-creg-gpio.c | 109 ++
4 fi
From: Fabio Estevam
Commit 001cdbbb32ef1f6 ("imx: mx6slevk: enable more DM drivers") breaks
MMC support in U-Boot proper on the mx6slevk_spl_defconfig target:
U-Boot SPL 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:18)
Trying to boot from MMC1
U-Boot 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:1
Hi Lukasz,
On Fri, Oct 13, 2017 at 5:16 AM, Lukasz Majewski wrote:
> There is some ongoing work to provide such facility. for imx6
> boards. I will keep you informed.
That's good news! Please keep me in the loop as well.
Thanks
___
U-Boot mailing
Hi Tom,
On Fri, 2017-10-13 at 16:21 +0300, Eugeniy Paltsev wrote:
> The HSDK can manage some pins via CREG registers block.
>
> Signed-off-by: Eugeniy Paltsev
> ---
> MAINTAINERS | 6 +++
> drivers/gpio/Kconfig | 7 +++
> drivers/gpio/Makefile | 1 +
> d
On Fri, Oct 13, 2017 at 01:33:22PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> On Fri, 2017-10-13 at 16:21 +0300, Eugeniy Paltsev wrote:
> > The HSDK can manage some pins via CREG registers block.
> >
> > Signed-off-by: Eugeniy Paltsev
> > ---
> > MAINTAINERS | 6 +++
> > dri
On Fri, Oct 13, 2017 at 09:21:19PM +0900, Masahiro Yamada wrote:
> 2017-10-13 21:11 GMT+09:00 Tom Rini :
> > On Fri, Oct 13, 2017 at 06:51:42PM +0900, Masahiro Yamada wrote:
> >
> >> We discussed the __FILE__ problem when U-Boot is built out of tree.
> >> https://www.mail-archive.com/u-boot@lists.d
Hi Tom,
On Fri, 2017-10-13 at 09:46 -0400, Tom Rini wrote:
> On Fri, Oct 13, 2017 at 01:33:22PM +, Alexey Brodkin wrote:
> >
> > Hi Tom,
> >
> > On Fri, 2017-10-13 at 16:21 +0300, Eugeniy Paltsev wrote:
> > >
> > > The HSDK can manage some pins via CREG registers block.
> > >
> > > Signed-
On Fri, Oct 13, 2017 at 01:55:28PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> On Fri, 2017-10-13 at 09:46 -0400, Tom Rini wrote:
> > On Fri, Oct 13, 2017 at 01:33:22PM +, Alexey Brodkin wrote:
> > >
> > > Hi Tom,
> > >
> > > On Fri, 2017-10-13 at 16:21 +0300, Eugeniy Paltsev wrote:
> > > >
On Fri, Oct 13, 2017 at 1:24 AM, Heinrich Schuchardt wrote:
>
>
> On 10/10/2017 02:23 PM, Rob Clark wrote:
>>
>> An event can be created with type==0, Shell.efi does this for an event
>> that is set when Ctrl-C is typed. So our current approach of having a
>> fixed set of timer slots, and determi
Hello Simon,
On 12.10.2017 04:07, Simon Glass wrote:
> Hi Felix,
>
> On 9 October 2017 at 03:04, Felix Brack wrote:
>>
>> This patch extends pmic_bind_children prefix matching. In addition to
>> the node name the property regulator-name is used while trying to match
>> prefixes. This allows assi
Add option to set spi controller clock frequency via device tree
using standard clock bindings.
Old way of setting spi controller clock frequency (via implementation
of 'cm_get_spi_controller_clk_hz' function in platform specific code)
remains supported for backward compatibility.
Signed-off-by: E
Enable CONFIGs for the DWC3 core and the UniPhier specific glue layer.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_v7_defconfig | 2 ++
configs/uniphier_v8_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
inde
This allows the NAND driver to enable clock and get its clock rate.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/clk-uniphier-sys.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c
b/drivers/clk/uniphier/clk-uniphier-sys.c
ind
Now USB 3.0 feature is enabled/disabled by CONFIG_USB_DWC3_UNIPHIER.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/clk/clk-pro4.c | 6 +++---
arch/arm/mach-uniphier/clk/clk-pro5.c | 6 +++---
arch/arm/mach-uniphier/clk/clk-pxs2.c | 6 +++---
3 files changed, 9 insertions(+), 9 delet
Enable clock in the probe hook. The clock rate will be necessary
when setup_data_interface hook is supported.
Signed-off-by: Masahiro Yamada
---
drivers/mtd/nand/denali.h| 1 +
drivers/mtd/nand/denali_dt.c | 12
2 files changed, 13 insertions(+)
diff --git a/drivers/mtd/nand
Update the script to version 0.26 (as of Linux v4.14-rc1)
Keep our "penguin_chief".
Keep our top_of_kernel_tree.
The negative forms of the command line parameters are described
when using --help.
New options are
--git-blame-signatures => when used with --git-blame,
al
The watchdog is initialized with a 5 minute timeout period.
It can be reset by SetWatchdogTimer.
It is stopped by ExitBoottimeServices.
Signed-off-by: Heinrich Schuchardt
---
v2
code comments updated
---
cmd/bootefi.c | 1 +
include/efi_loader.h | 4 ++
lib/efi
To avoid a forward declaration move efi_search_obj before
all protocol services functions.
Signed-off-by: Heinrich Schuchardt
---
v2
no change
---
lib/efi_loader/efi_boottime.c | 41 +
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a
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