Currently most boards that have static memory config (which cannot be
detected automatically) use CONFIG_SYS_SDRAM_SIZE to define the size of
memory which is hard coded into U-Boot. With the addition of device tree
support into U-Boot, boards that have device tree data can instead query
the memory
Add two functions for use by board implementations to decode the memory
banks of the /memory node so as to populate the global data with
ram_size and board info for memory banks.
The fdtdec_setup_memory_size() function decodes the first memory bank
and sets up the gd->ram_size with the size of the
The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt. This
board specific implementation uses a static variable 'tmp' which makes
these functions unsafe for execution from within the board_init_f
context.
This change m
The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt. This
board specific implementation uses a static variable 'tmp' which makes
these functions unsafe for execution from within the board_init_f
context.
This unsafe u
The veyron-minnie Kconfig referred to jerry by mistake.
Signed-off-by: Martin Michlmayr
---
arch/arm/mach-rockchip/rk3288/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig
b/arch/arm/mach-rockchip/rk3288/Kconfig
index 223ae41..5454
2016-12-15 15:08 GMT+09:00 Zhiqiang Hou :
> From: Mingkai Hu
>
> For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is
> set. The SMPEN bit should be set before enabling the data cache.
> If not enabled, the cache is not coherent with other cores and
> data corruption could occur.
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit 53e8ca22538c2cec691fe74098684a359302688c:
MAINTAINERS: DFU: Change e-mail address for DFU maintainer (2016-12-12
13:03:15 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git mas
Hi,
another reworked version of the SPL support series for the Allwinner A64
SoC. Again many thanks to the diligent reviewers, I hope I didn't miss any
comments.
As the previous versions this one includes support for both AArch64 and
AArch32 SPL builds. The FIT support is still missing, which mean
The predominantely 32-bit ARM targets try to compile the SPL in Thumb
mode to reduce code size.
The 64-bit AArch64 instruction set does not know an alternative, concise
encoding, so the Thumb build option should only be set for 32-bit
targets.
Likewise -marm machine options are only valid for ARMv7
For boards that call s_init() when the SPL runs, we are expected to
setup an early stack before calling this C function.
Implement the proper AArch64 version of this based on the ARMv7 code.
This allows sunxi boards to setup the basic peripherals even with a
64-bit SPL.
Signed-off-by: Andre Przywa
These days many Allwinner SoCs use clock_sun6i.c, although out of them
only the (original sun6i) A31 has a second MBUS clock register.
Also the requirement for setting up the PRCM PLL_CTLR1 register to provide
the proper voltage seems to be a property of older SoCs only as well.
Restrict the MBUS
The UL() macro is pretty useful in sharing constants between assembly
and C files while still being able to specify a type for C.
Move the macro from an armv8 specific header into a common header file
to be able to use it by arm code (for instance) as well.
Signed-off-by: Andre Przywara
Reviewed-
Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.
Signed-off-by: Andre Przywara
Reviewed-by: Alexander Graf
Re
tiny-printf does not know about the "-" modifier, which aligns numbers.
This is used by some SPL code, but as it's purely cosmetical, we just
ignore this modifier here to avoid changing correct printf strings.
Signed-off-by: Andre Przywara
---
lib/tiny-printf.c | 3 +++
1 file changed, 3 inserti
tiny-printf does not know about the "l" modifier so far, which breaks
the crash dump on AArch64, because it uses %lx to print the registers.
Add an easy way of handling longs correctly.
Using a relatively decent compiler (GCC 5.3.0) this does _not_ increase
the code size of tiny-printf.o for 32-bi
For prepending some board specific header area to U-Boot images we
were so far including a header file with a macro definition containing
the actual header specification.
This works fine if there are just a few statements and if there is only
one alternative.
However adding more complex code quickl
The boot0 hook we have so far is applied _after_ the initial branch
to the "reset" entry point. An upcoming change requires even this
branch to be changed, so we apply the hook macro at the earliest
point, and have the branch in the hook file as well.
This is no functional change at this point, jus
The sunxi DRAM setup code needs an sdelay() implementation, which
wasn't defined for armv8 so far.
Shamelessly copy the armv7 version and adjust it to work in AArch64.
Signed-off-by: Andre Przywara
---
arch/arm/cpu/armv8/cpu.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/a
The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with
other boards. To allow alternative code to be inserted, we create
another, now function specific config symbol on top of it to simplify
later additions. No functional change at this time.
Signed-off-by: Andre Przywara
Acked-by:
The Allwinner A64 SoC starts execution in AArch32 mode, and both
the boot ROM and Allwinner's boot0 keep running in this mode.
So U-Boot gets entered in 32-bit, although we want it to run in AArch64.
By using a "magic" instruction, which happens to be an almost-NOP in
AArch64 and a branch in AArch
To avoid enumerating the very same DRAM values in defconfig files
for each and every Allwinner A64 board out there, let's put some sane
default values in the Kconfig file.
Boards with different needs can override them at any time.
Signed-off-by: Andre Przywara
Reviewed-by: Simon Glass
---
board
From: Philipp Tomsich
So far the MBUS priority setup was done by writing "magic" values taken
from a DRAM controller register dump after a boot0 run.
By peeking at the Linux (sic!) MBUS driver [1] from the Allwinner BSP
kernel, we learned more about the actual meaning of those bits.
Add macros an
From: Jens Kuske
The IOCR registers got renamed to BDLR to match the public
documentation of similar controllers.
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h | 43 ++---
arch/arm/mach-sunxi/dram_sun8i_h3.c
From: Philipp Tomsich
Signed-off-by: Philipp Tomsich
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/clock_sun6i.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c
b/arch/arm/mach-sunxi/clock_sun6i.c
index 80cfc0b..8e39bbe 100644
---
From: Jens Kuske
So far the DRAM driver for the H3 SoC (and apparently boot0/libdram as
well) only applied coarse delay line settings, with one delay value for
all the data lines in each byte lane and one value for the control lines.
Instead of setting the delays for whole bytes only allow setti
Read the specified "arch" value from a legacy or FIT U-Boot image and
store it in our SPL data structure.
This allows loaders to take the target architecture in account for
custom loading procedures.
Having the complete string -> arch mapping for FIT based images in the
SPL would be too big, so we
According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.
Reported-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-su
From: Jens Kuske
The A64 DRAM controller is very similar to the H3 one,
so the code can be reused with some small changes.
This refactoring does not change the code size for the existing H3 part.
[Andre: rework from #ifdefs to using socid parameters in static
functions, minor fixes, merg
Now that the SPL is ready to be compiled in AArch64 and the DRAM
init code is ready, enable SPL support for the A64 SoC and in the
Pine64 defconfig.
For now we keep the boot0 header in the U-Boot proper, as this allows
to still use boot0 as an SPL replacement without hurting the SPL use
case.
We di
Fix the output of the DRAM size on AArch64 SPLs.
Signed-off-by: Andre Przywara
Reviewed-by: Alexander Graf
Reviewed-by: Simon Glass
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c
b/arch/arm/mach-s
When compiling the SPL for the Allwinner A64 in AArch64 mode, we can't
use the more compact Thumb2 encoding, which only exists for AArch32
code. This makes the SPL rather big, up to a point where any code
additions or even a different compiler may easily exceed the 32KB limit
that the Allwinner BRO
The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode.
To run AArch64 code, we have to trigger a warm reset via the RMR register,
which proceeds with code execution at the address stored in the RVBAR
register.
If the bootable payload in the FIT image is using a different
architectu
At the moment we use the arch/arm directory for arm64 boards as well,
so the Makefile will pick up the "arm" name for the architecture to use
for tagging binaries in U-Boot image files.
Differentiate between the two by looking at the CPU variable being defined
to "armv8", and use the arm64 architec
Since the SPL FIT loader can now differentiate between different
architectures, teach it how to tell arm and arm64 apart when a FIT
image is used.
We just support those two for now, as these are so far the only sensible
alternatives.
Signed-off-by: Andre Przywara
Reviewed-by: Simon Glass
Reviewe
On Fri, Nov 25, 2016 at 08:16:01PM -0700, Simon Glass wrote:
> Move sunxi boards to use binman. This involves adding the image definition
> to the device tree and using it in the Makefile.
>
> Signed-off-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signat
Hi Simon,
Thanks a lot for your review!
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年12月18日 6:47
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Prabhakar Kushwaha
> ; Alison Wang ;
> Sumit Garg ; Ruchika Gupta
On Jum, 2016-12-09 at 14:02 +0100, Marek Vasut wrote:
> On 12/09/2016 10:46 AM, Chee, Tien Fong wrote:
> >
> > On Rab, 2016-12-07 at 14:54 +0100, Marek Vasut wrote:
> > >
> > > On 12/07/2016 11:57 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Sel, 2016-12-06 at 13:47 +0100, Marek Vasut
On Rab, 2016-12-07 at 14:54 +0100, Marek Vasut wrote:
> On 12/07/2016 11:48 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2016-12-06 at 13:49 +0100, Marek Vasut wrote:
> > >
> > > On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > These com
On Rab, 2016-12-07 at 14:52 +0100, Marek Vasut wrote:
> On 12/07/2016 11:30 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2016-12-06 at 13:44 +0100, Marek Vasut wrote:
> > >
> > > On 12/06/2016 08:50 AM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This is i
On Sel, 2016-12-06 at 16:11 +0800, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> Signed-off-by: Tien Fong Chee
> Cc: Marek Vasut
> Cc: Dinh Nguyen
> Cc: Chin Liang See
> Cc: Tien Fong
> ---
> arch/arm/mach-socfpga/Makefile |2 +-
> arch/arm/mach-socfpga/include/mach/pinm
Hi York,
Thanks a lot for your comments!
> -Original Message-
> From: york sun
> Sent: 2016年12月17日 0:39
> To: Z.Q. Hou ; u-boot@lists.denx.de; Prabhakar
> Kushwaha ; Ruchika Gupta
> ; Mingkai Hu ; Pratiyush
> Srivastava
> Subject: Re: [PATCHv2 1/2] ARMv8/fsl-layerscape: Correct the OCRAM
Hi Simon,
Thanks a lot for your review!
B.R
Zhiqiang
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年12月18日 6:47
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Prabhakar Kushwaha
> ; Alison Wang ;
> Sumit Garg ;
On Sel, 2016-12-06 at 16:11 +0800, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> This patch adding the Arria10 critical hardware initialization before
> enabling console print out in spl.
>
> Signed-off-by: Tien Fong Chee
> Cc: Marek Vasut
> Cc: Dinh Nguyen
> Cc: Chin Liang See
> Cc: Tien
Hi Masahiro Yamada,
Thanks a lot for your comments!
> -Original Message-
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: 2016年12月19日 0:49
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Simon Glass ; Mingkai Hu
> ; york sun ; Ashish Kumar
> ; Mateusz
Przemyslaw didn't maintain the PMIC anymore.
Update the pmic maintainer from Przeymyslaw to me.
Signed-off-by: Jaehoon Chung
---
MAINTAINERS| 6 ++
doc/git-mailrc | 3 +--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c2085ca..793ff49 1006
Firmware of Management Complex (MC) should be loaded
at 512MB aligned privately allocated memory at DRAM end.
And this memory should be reduced from total memory
available for general purposes.
Update memory allocation code in MC driver to support
above requirements.
Signed-off-by: Priyanka Jain
On 13.12.2016 18:49, Bradley Bolen wrote:
0c0f719ad2f46c8566a56daee37ebdb7c078c3b1 accidentally changed the
endianness of the i2c read and write addresses. This was noticable when
accessing EEPROMs that use 2 byte addressing as the LSB was being sent
first.
Signed-off-by: Bradley Bolen
---
dr
Hi Simon,
Thanks a lot for your review!
B.R
Zhiqiang
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年12月18日 6:47
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Prabhakar Kushwaha
> ; Alison Wang ;
> Sumit Garg ;
Hello Stefan,
Am 19.12.2016 um 06:56 schrieb Stefan Roese:
On 13.12.2016 18:49, Bradley Bolen wrote:
0c0f719ad2f46c8566a56daee37ebdb7c078c3b1 accidentally changed the
endianness of the i2c read and write addresses. This was noticable when
accessing EEPROMs that use 2 byte addressing as the LSB
On Jum, 2016-12-09 at 13:51 +0100, Marek Vasut wrote:
> On 12/09/2016 11:04 AM, Chee, Tien Fong wrote:
> >
> > On Rab, 2016-12-07 at 14:58 +0100, Marek Vasut wrote:
> > >
> > > On 12/07/2016 12:58 PM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Sel, 2016-12-06 at 13:55 +0100, Marek Vasut
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> CONFIG_CONSOLE_MUX and CONFIG_SYS_CONSOLE_IS_IN_ENV are not applicable
> for SPL. Update the console code to use CONFIG_IS_ENABLED(), so that these
> options will be inactive in SPL.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> This currently fails silently. Add a debug message to aid debugging.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Show the error value in spl_spi_load_image()
>
> common/spl/spl_spi.c | 5 -
> 1 file changed, 4 insertions(+
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> Add a new Kconfig option to allow CPU drivers to be used in SPL.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> common/spl/Kconfig | 10 ++
> drivers/Makefile | 1 +
> 2 files changed, 11 insertions(+)
>
Reviewed
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> This Makefile variable can be used in the architecture's main Makefile but
> at present it is not set up until later. Set it just before this Makefile is
> included.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> scripts/Mak
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> Add a new Kconfig option to allow PCI drivers to be used in SPL.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> common/spl/Kconfig | 9 +
> drivers/Makefile | 1 +
> 2 files changed, 10 insertions(+)
>
Reviewed-by
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> Add a new Kconfig option to allow timer drivers to be used in SPL.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> common/spl/Kconfig | 9 +
> drivers/Makefile | 1 +
> 2 files changed, 10 insertions(+)
>
Reviewed-
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> Add a new Kconfig option to allow RTC drivers to be used in SPL.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> common/spl/Kconfig | 10 ++
> drivers/Makefile | 1 +
> 2 files changed, 11 insertions(+)
>
Reviewed
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> When BSS does not immediate follow the SPL image we don't need padding
> before the device tree. Remove it in this case.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> scripts/Makefile.spl | 3 ++-
> 1 file changed, 2 insert
On Sun, Nov 20, 2016 at 4:24 AM, Simon Glass wrote:
> Add an option for building Platorm Controller Hub drivers in SPL.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> common/spl/Kconfig | 9 +
> drivers/Makefile | 1 +
> 2 files changed, 10 insertions(+)
>
Reviewed-b
When setting the compatible property for the L2 cache ensure that we
follow the documented binding by setting both
"-l2-cache-controller" and "cache" as values.
Signed-off-by: Chris Packham
---
Changes in v2:
- extract a helper function to set the compatible property and use it in
both the CON
Hi Simon,
2016-11-20 5:24 GMT+09:00 Simon Glass :
> This Makefile variable can be used in the architecture's main Makefile but
> at present it is not set up until later. Set it just before this Makefile is
> included.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> scripts/Make
On 12/15/2016 07:15 PM, Michal Simek wrote:
> There is hard dependency on BLK and DM_MMC which is also used by ATMEL
> and ROCKCHIP.
>
> Signed-off-by: Michal Simek
Applied on u-boot-mmc. Thanks!
Best Regards,
Jaehoon Chung
> ---
>
> drivers/mmc/Kconfig | 2 +-
> 1 file changed, 1 insertion(
On 12/02/2016 11:04 PM, Tom Rini wrote:
> On Fri, Dec 02, 2016 at 05:46:10PM +0900, Jaehoon Chung wrote:
>
>> Remove the entire spear_sdhci.c file.
>> There is no use case. This is dead codes.
>> Also there is no place to call "spear_sdhci_init()" anywhere.
>>
>> If some people use this file, let
Hi Simon,
On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass wrote:
> At present this uses u32 to store an address. We should use unsigned long
> and avoid special types in function return values and parameters unless
> necessary. This makes the code more portable.
>
> I believe Alex Graf has a patch t
On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass wrote:
> Add various debug() messages in places where errors occur. This aids with
> debugging.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Output error code values in debug() statements
>
> arch/x86/cpu/ivybridge/cpu.c | 4 +++-
>
Hi Simon,
On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass wrote:
> Add a link script and relocation code for building 64-bit EFI applications.
> This can be used for the EFI stub.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> arch/x86/lib/elf_x86_64_efi.lds | 3 ++
> arch/x86/l
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