This is an user-unconfigurable option that is selected by the
drivers that need to overwrite SDHCI IO memory accessors.
(BCM2835 SDHCI seems the only driver that needs to do so.)
Signed-off-by: Masahiro Yamada
---
drivers/mmc/Kconfig | 8
include/configs/rpi.h | 1 -
2 files changed,
Currently, CONFIG_MMC is not related to any other options by
"depends on" or "select". One of big advantages of using Kconfig
is automatic dependency tracking, but the current state is lacking
it. As the first step, make the existing MMC driver entries depend
on MMC.
This commit was created by t
Generated by "tools/moveconfig -s".
This will make config moves easier.
Signed-off-by: Masahiro Yamada
---
configs/A10-OLinuXino-Lime_defconfig | 2 +-
configs/A20-OLinuXino-Lime2_defconfig | 2 +-
configs/A20-OLinuXino-Lime_defconfig | 2 +-
configs
While I moved the options, I also renamed them so that they are all
prefixed with MMC_SDHCI_.
This commit was created in the following steps.
[1] Rename with the following command
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_MMC_
I wrote a new SDHCI driver for my new SoCs, but before posting it,
I just want to make a clean-base for my driver entry.
Of course, I could enable some needed options in my header file
(for options in the "white-list"), but I just thought it is a good
habit to contribute to Kconfig moves in the ar
Move CONFIG_SDHCI to Kconfig and rename it to CONFIG_MMC_SDHCI.
My motivation for the rename is, ultimately, to make all the MMC
options prefixed with MMC_ and SDHCI options with MMC_SDHCI_,
like Linux.
This commit was created as follows:
[1] Rename the config option with the following command:
f
On Sun, Dec 04, 2016 at 09:58:42AM +0200, Uri Mashiach wrote:
> Hello Tom,
>
> On 12/01/2016 05:36 PM, Tom Rini wrote:
> > On Thu, Dec 01, 2016 at 10:28:12AM +0200, Uri Mashiach wrote:
> >
> >> From: Dmitry Lifshitz
> >>
> >> Features supported :
> >>
> >> * Serial console
> >> * SPI Flash
> >> *
From: Konstantin Porotchkin
Align the Armada-8040-db and Armada-7040-db SPI and I2C
DTS settings with latest DB settings:
- 8040-db: disable i2c0 and spi0 on AP (MPPs are reserved for SDIO)
- 8040-db: disable cps_i2c0 on CP1
- 8040-db: enable spi1 on CP1 (the new location of the boot flash)
The
From: Konstantin Porotchkin
This set of patches is adding more features for bards based on new
Marvell MoChi platforms - Armada-70x0 and Armada-80x0.
The patches were applied on top of Stefan's mvebu-related patch set v2
with the last patch named
"dm: core: Add dev_get_addr_size_index() to retri
From: Konstantin Porotchkin
Add support for mvebu bubt command for flash image
load, check and burn on boot device.
Changes for v2:
- Add "bubt" documentation
- Fix code syntax
Signed-off-by: Konstantin Porotchkin
Cc: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Omri Itach
Cc
From: Konstantin Porotchkin
Enable mvebu "bubt" command support in the default configuration
file for Armada-7040 and Armada-8040 development boards
Changes for v2:
- Remove Gerrit Change ID
Signed-off-by: Konstantin Porotchkin
Cc: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc:
From: Konstantin Porotchkin
Add pin control nodes to APN806, CP-master, CP-slave and
Armada-7040 and Armada-8040 boards DTS files
Changes for v2:
- Remove Gerrit Change ID
- Fix comments
- Fix wrong function values
- Add missing cpm_i2c0 node to armada-7040-db.dts
Signed-off-by: Konstantin Poro
From: Konstantin Porotchkin
Enable mvebu pin control support in the default configuration
files for Armada-7040 and Armada-8040 development boards
Changes for v2:
- Remove Gerrit Change ID
Signed-off-by: Konstantin Porotchkin
Cc: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Om
From: Konstantin Porotchkin
Add a DM port of Marvell pin control driver.
The A8K SoC family contains several silicone dies interconnected
in a single package. Every die is normally equipped with its own
pin controller unit.
There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC.
Changes for
From: Konstantin Porotchkin
Add missing L3 cache flush functionality which absence prevents
Linux kernel from normal boot in case the L3 cache is enabled
by ATF.
The L3 cache is named the "last level" cache in order to keep
the terminology similar to the ATF code.
This cache should not be disable
From: Konstantin Porotchkin
Enable hush parser in Armada-7040 and Armada-8040 DB default
configurations.
Signed-off-by: Konstantin Porotchkin
Cc: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa
---
configs/mvebu_db-88f
From: Konstantin Porotchkin
This set of patches adds features for allowing Linux kernel boot
and root on NFS for Marvell A8K family boards.
These changes were tested when applied on top of previously sent
series of patches named:
"arm64: mvebu: Armada-8K family patches" version 2.
Changes in thi
From: Konstantin Porotchkin
Enable PCIe bus support in Armada-7040 DB default configuration
Signed-off-by: Konstantin Porotchkin
Cc: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa
---
configs/mvebu_db-88f7040_defconfi
Tom,
The following changes since commit 6b29a395b62965eef6b5065d3a526a8588a92038:
Merge git://git.denx.de/u-boot-mpc85xx (2016-11-29 19:42:48 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git
for you to fetch changes up to 54db3c20bdc43c458854446939b706b
Hi.
Recently a check was added to if new ad-hoc CONFIG options where added
and produced an error. The exact commit is [1].
While building (2016.11) with some out of tree files in include folder
I get the following error:
Build error:
| Error: You must add new CONFIG options using Kconfig
| The f
2016-12-01 10:34 GMT+01:00 Mirza Krak :
> 2016-11-30 19:07 GMT+01:00 Stephen Warren :
>> On 11/29/2016 11:47 PM, Mirza Krak wrote:
>>>
>>> 2016-11-30 5:05 GMT+01:00 Stephen Warren :
On 11/27/2016 11:05 PM, Mirza Krak wrote:
>
>
> From: Mirza Krak
>
> Recently the defa
We are tight on space on this board so drop SPL_OS_BOOT
Signed-off-by: Tom Rini
---
configs/omap4_sdp4430_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 57dcf32e224a..de339ca2c9c3 100644
--- a/configs/omap4_sdp
On Sat, Dec 03, 2016 at 11:26:13AM -0700, Simon Glass wrote:
> Hi Tom,
>
> (new version with more patches)
>
> Here are some buildman enhancements, a new TPM driver, the beginnings
> of the USB gadget DM conversion along with a few fixes and improvements.
>
> The following changes since commit
On Sun, Dec 04, 2016 at 05:02:19PM +, york sun wrote:
> Tom,
>
> The following changes since commit 6b29a395b62965eef6b5065d3a526a8588a92038:
>
>Merge git://git.denx.de/u-boot-mpc85xx (2016-11-29 19:42:48 -0500)
>
> are available in the git repository at:
>
>git://git.denx.de/u-boo
On Wed, Nov 16, 2016 at 12:50:06AM +, Andre Przywara wrote:
> The indentation is misleading here and suggests that the write command
> will be only executed in the else clause.
> It seems like this is not intended, so fix the indentation to avoid
> both compiler warnings and puzzled readers.
>
On Wed, Nov 16, 2016 at 12:50:07AM +, Andre Przywara wrote:
> Apparently the indentation is off here, for the IGB model just want to
> bail out early.
> Fix this to avoid both compiler warnings and puzzled readers.
>
> Pointed out by GCC 6.2's -Wmisleading-indentation warning.
>
> Signed-off
On Wed, Nov 16, 2016 at 12:50:09AM +, Andre Przywara wrote:
> The rtl8169_intr_mask variable isn't used anywhere in the code, so
> just remove it to avoid a GCC 6.2 compiler warning.
>
> Signed-off-by: Andre Przywara
> Acked-by: Joe Hershberger
Applied to u-boot/master, thanks!
--
Tom
On Wed, Nov 16, 2016 at 12:50:11AM +, Andre Przywara wrote:
> Apparently the indentation is wrong here, fix this to avoid compiler
> warnings and puzzled readers.
>
> Pointed out by GCC 6.2's -Wmisleading-indentation warning.
>
> Signed-off-by: Andre Przywara
> Reviewed-by: Marek Vasut
> A
On Wed, Nov 16, 2016 at 12:50:10AM +, Andre Przywara wrote:
> Obviously the mask for the rx and tx select field cannot be right,
> as it would overlap in one and exceed the 32-bit register in the other
> case. From looking at the neighbouring bits it looks like the mask
> should be really 4 bi
On Wed, Nov 16, 2016 at 12:50:16AM +, Andre Przywara wrote:
> The shortname variable isn't referenced anywhere in the code, so just
> remove it.
>
> Pointed out by a GCC 6.2 default warning option.
>
> Signed-off-by: Andre Przywara
> Reviewed-by: Marek Vasut
> Acked-by: Lukasz Majewski
A
On Wed, Nov 16, 2016 at 12:50:12AM +, Andre Przywara wrote:
> Apparently the indentation is wrong in this case, as the second message
> should be printed indepdently of the if statement.
>
> Fix this indentation to avoid both compiler warnings and puzzled readers.
>
> Pointed out by GCC 6.2'
On Wed, Nov 16, 2016 at 12:50:16AM +, Andre Przywara wrote:
> The shortname variable isn't referenced anywhere in the code, so just
> remove it.
>
> Pointed out by a GCC 6.2 default warning option.
>
> Signed-off-by: Andre Przywara
> Reviewed-by: Marek Vasut
> Acked-by: Lukasz Majewski
A
On Mon, Nov 21, 2016 at 02:37:09PM -0600, Andrew F. Davis wrote:
> After an image is selected out of a FIT blob for further processing we
> run an optional, platform specific, post-processing function on this
> component. This post-processing may modify the position and size of the
> image, so aft
On Tue, Nov 22, 2016 at 02:42:56PM +0530, Vignesh R wrote:
> Commit 4c4e3b37750f3("ARM: AM43xx: Enable FIT") accidentally disabled
> DM_SPI and DM_SPI_FLASH. Add back DM_SPI and DM_SPI_FLASH to
> am43xx_evm_defconfig in order to make use of DM framework for QSPI.
>
> Signed-off-by: Vignesh R
> A
On Wed, Nov 23, 2016 at 01:26:10AM -0500, Walt Feasel wrote:
> Make checkpatch style modification for
> CHECK: Alignment should match open parenthesis
>
> Signed-off-by: Walt Feasel
Applied to u-boot/master, thanks!
--
Tom
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Description: Digital signature
___
On Wed, Nov 23, 2016 at 01:26:11AM -0500, Walt Feasel wrote:
> Make checkpatch style modification for
> CHECK: Blank lines aren't necessary after
> an open brace '{'
>
> Signed-off-by: Walt Feasel
Applied to u-boot/master, thanks!
--
Tom
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Description: Digital signature
On Wed, Nov 23, 2016 at 01:26:12AM -0500, Walt Feasel wrote:
> Make checkpatch style modification for
> WARNING: line over 80 characters
>
> Signed-off-by: Walt Feasel
Applied to u-boot/master, thanks!
--
Tom
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Description: Digital signature
_
On Wed, Nov 23, 2016 at 01:26:13AM -0500, Walt Feasel wrote:
> Make comment style modifications
>
> Signed-off-by: Walt Feasel
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 01:26:14AM -0500, Walt Feasel wrote:
> Make spelling correction for 'from'
>
> Signed-off-by: Walt Feasel
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 12:54:39PM +0530, Lokesh Vutla wrote:
> It can be expected that different paper spins of a SoC can have
> different definitions for OPP and can have their own constraints
> on the boot up OPP for each voltage rail. In order to have this
> flexibility, add support for dynami
On Wed, Nov 23, 2016 at 12:54:40PM +0530, Lokesh Vutla wrote:
> From: Suman Anna
>
> Redefine the macros used to define the voltage values and the
> efuse register offsets based on OPP for all the voltage domains.
> This is done using Kconfig macros that can be set in a defconfig
> or selected d
On Wed, Nov 23, 2016 at 12:54:41PM +0530, Lokesh Vutla wrote:
> From: Suman Anna
>
> This patch adds support to update the device-tree blob to adjust the
> DSP and IVA DPLL clocks pertinent to the selected OPP choice, with
> the default being OPP_NOM. The voltage settings are done in u-boot,
> b
On Wed, Nov 23, 2016 at 01:25:24PM +0530, Lokesh Vutla wrote:
> The dra71x-evm is a board based on TI's DRA718 processor targeting
> BOM-optimized
> entry infotainment systems such as display audio and is a software compatible
> derivative of the highly successful DRA74 and DRA72 processor famili
On Wed, Nov 23, 2016 at 01:25:25PM +0530, Lokesh Vutla wrote:
> Add mux and iodelay settings for dra71x-evm.
> Data generated using PCT_DRA71x_SR2.0_v1.0.0.0 version (June 2016).
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Wed, Nov 23, 2016 at 01:25:26PM +0530, Lokesh Vutla wrote:
> From: Nishanth Menon
>
> Rev C version of EVM does require IODelay to be configured for RGMII
> pins in MANUAL_1 configuration. Update the same based on PG2.0 initial
> simulation values.
> Data based on PCT_DRA72x_SR2.0_SR1.0_v1.3.
On Wed, Nov 23, 2016 at 01:25:27PM +0530, Lokesh Vutla wrote:
> From: Keerthy
>
> Add the pmic_data for LP873x PMIC which is used to power
> up dra71x-evm.
>
> Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating
> the efuse registers only to use OPP_NOM irrespective of any
> CONFIG
On Wed, Nov 23, 2016 at 01:25:28PM +0530, Lokesh Vutla wrote:
> Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based
> boards to enable mmc regulator. This is not true always like in case of
> DRA71x-evm. So get this information based on the board.
>
> Signed-off-by: Lokesh V
On Wed, Nov 23, 2016 at 01:25:30PM +0530, Lokesh Vutla wrote:
> Add DT support for dra71-evm and built it as part of FIT image.
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 01:25:29PM +0530, Lokesh Vutla wrote:
> Sync all dra7xx based dts files with latest Linux
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 01:25:31PM +0530, Lokesh Vutla wrote:
> From: Nishanth Menon
>
> Select dtb name for dra71x-evm.
>
> Signed-off-by: Nishanth Menon
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 01:25:32PM +0530, Lokesh Vutla wrote:
> Enable DM_ETH for hs boards.
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 01:25:33PM +0530, Lokesh Vutla wrote:
> Enable pmic/regulator config options.
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 01:25:34PM +0530, Lokesh Vutla wrote:
> From: Keerthy
>
> DRA71-evm uses LP873x regulator. Enable lp873x PMIC config options.
>
> Signed-off-by: Keerthy
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
D
On Wed, Nov 23, 2016 at 02:52:32PM +0200, tomas.me...@vaisala.com wrote:
> From: Niko Mauno
>
> Change 'date' to 'data'.
>
> Signed-off-by: Tomas Melin
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 06:01:29AM -0700, Simon Glass wrote:
> This driver was converted so we should remove it from the list.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 06:01:30AM -0700, Simon Glass wrote:
> This board has not been converted to DM_SERIAL by the deadline.
> Remove it.
>
> Signed-off-by: Simon Glass
> Acked-by: David Müller
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 23, 2016 at 06:01:31AM -0700, Simon Glass wrote:
> This board has not been converted to DM_SERIAL by the deadline.
> Remove it.
>
> Signed-off-by: Simon Glass
> Acked-by: David Müller
> Reviewed-by: Jagan Teki
Applied to u-boot/master, thanks!
--
Tom
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Description:
On Wed, Nov 23, 2016 at 06:01:32AM -0700, Simon Glass wrote:
> This is not used by any boards. Drop it.
>
> Signed-off-by: Simon Glass
> Acked-by: David Müller
> Reviewed-by: Jagan Teki
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Nov 25, 2016 at 11:14:18AM +0530, Lokesh Vutla wrote:
> Sync all am57xx based dts files with latest Linux
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Nov 25, 2016 at 11:14:19AM +0530, Lokesh Vutla wrote:
> From: Nishanth Menon
>
> AM57xx evm Rev A3 with SR2.0 platform have incompatible changes for HDMI
> GPIO requiring new dtb support. This implies we have to properly identify
> the platform now as well. Hence provide a different boar
On Fri, Nov 25, 2016 at 11:14:20AM +0530, Lokesh Vutla wrote:
> BeagleBoard-X15 Rev B1 with SR1.1 platform have incompatible changes for HDMI
> GPIO requiring new dtb support. This implies we have to properly identify
> the platform now as well. Hence provide a different board name for the
> Rev B
On Fri, Nov 25, 2016 at 11:14:21AM +0530, Lokesh Vutla wrote:
> From: Nishanth Menon
>
> Update the timing for RGMII0 interface based on
> PCT_DRA75x_DRA74x_SR1.1_v1.3.10 version (Jan 2016). This update
> is for SR1.1
>
> Signed-off-by: Nishanth Menon
> Signed-off-by: Lokesh Vutla
> Reviewed-
On Fri, Nov 25, 2016 at 11:14:22AM +0530, Lokesh Vutla wrote:
> From: Nishanth Menon
>
> Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
> board files named am572x_gp_evm_A3a_sr2p0 that were autogenerated on
> 19th October, 2016 by "Ahmad Rashed".
>
> [1] https://dev.ti
On Fri, Nov 25, 2016 at 11:14:23AM +0530, Lokesh Vutla wrote:
> Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
> board files named am572x_idk_v1p3b_sr2p0 that were autogenerated on
> 20th October, 2016 by "Steve Kipisz " and
> "Tom Johnson ".
>
> [1] https://dev.ti.com/p
On Fri, Nov 25, 2016 at 11:14:24AM +0530, Lokesh Vutla wrote:
> From: Steve Kipisz
>
> The AM571x Industrial Development Kit (IDK) is a board based on TI's
> AM571x SoC which has a single core 1.5GHz Cortex-A15processor. This
> board is a development platform for the Industrial Market with:
>
>
On Fri, Nov 25, 2016 at 11:14:25AM +0530, Lokesh Vutla wrote:
> From: Schuyler Patton
>
> Add initial DTS support for AM571-IDK evm.
>
> Signed-off-by: Schuyler Patton
> Signed-off-by: Nishanth Menon
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
-
On Sun, Dec 04, 2016 at 05:21:14PM -0500, Tom Rini wrote:
> We are tight on space on this board so drop SPL_OS_BOOT
>
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Nov 25, 2016 at 11:14:26AM +0530, Lokesh Vutla wrote:
> There are certain environment variables whose length is greater than
> the defined IO buffer size. So, increase the IO buffer size to print the
> entire variables.
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to
The runner actually has no console dependency, only on the log provided
by the console. Accept both u_boot_console or a multiplexed_log.
Signed-off-by: Stefan Brüns
---
test/py/u_boot_utils.py | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/test/py/u_boo
From: Stefan Brüns
The following checks are currently implemented:
1. listing a directory
2. verifying size of a file
3. veryfying md5sum for a file region
4. reading the beginning of a file
Signed-off-by: Stefan Brüns
---
test/py/tests/test_fs.py | 357 +++
The predominantely 32-bit ARM targets try to compile the SPL in Thumb
mode to reduce code size.
The 64-bit AArch64 instruction set does not know an alternative, concise
encoding, so the Thumb build option should only be set for 32-bit
targets.
Likewise -marm machine options are only valid for ARMv7
These days many Allwinner SoCs use clock_sun6i.c, although out of them
only the (original sun6i) A31 has a second MBUS clock register.
Also the requirement for setting up the PRCM PLL_CTLR1 register to provide
the proper voltage seems to be a property of older SoCs only as well.
Restrict the MBUS
For boards that call s_init() when the SPL runs, we are expected to
setup an early stack before calling this C function.
Implement the proper AArch64 version of this based on the ARMv7 code.
This allows sunxi boards to setup the basic peripherals even on with a
64-bit SPL.
Signed-off-by: Andre Prz
Hi,
this is the second spin of the SPL support series for the Allwinner A64
SoC. Thanks for the review comments, I hope I addressed all of them.
As v1, this one includes support for both AArch64 and AArch32 SPL
builds. The FIT support is still missing, which means the functionality is
limited. Due
The UL() macro is pretty useful in sharing constants between assembly
and C files while still being able to specify a type for C.
Move the macro from an armv8 specific header into a common header file
to be able to use it by arm code (for instance) as well.
Signed-off-by: Andre Przywara
Reviewed-
tiny-printf does not know about the "l" modifier so far, which breaks
the crash dump on AArch64, because it uses %lx to print the registers.
Add an easy way of handling longs correctly. Also there are printfs
using the '-' modifier, which we choose to ignore for simplicity.
Using a relatively dece
Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.
Signed-off-by: Andre Przywara
Reviewed-by: Alexander Graf
--
For prepending some board specific header area to U-Boot images we
were so far including a header file with a macro definition containing
the actual header specification.
This works fine if there are just a few statements and if there is only
one alternative.
However adding more complex code quickl
The sunxi DRAM setup code needs an sdelay() implementation, which
wasn't defined for armv8 so far.
Shamelessly copy the armv7 version and adjust it to work in AArch64.
Signed-off-by: Andre Przywara
---
arch/arm/cpu/armv8/cpu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/ar
The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with
other boards. To allow alternative code to be inserted, we create
another, now function specific config symbol on top of it to simplify
later additions. No functional change at this time.
Signed-off-by: Andre Przywara
---
board
The Allwinner A64 SoC starts execution in AArch32 mode, and both
the boot ROM and Allwinner's boot0 keep running in this mode.
So U-Boot gets entered in 32-bit, although we want it to run in AArch64.
By using a "magic" instruction, which happens to be an almost-NOP in
AArch64 and a branch in AArch
To avoid enumerating the very same DRAM values in defconfig files
for each and every Allwinner A64 board out there, let's put some sane
default values in the Kconfig file.
Boards with different needs can override them at any time.
Signed-off-by: Andre Przywara
---
board/sunxi/Kconfig |
The boot0 hook we have so far is applied _after_ the initial branch
to the "reset" entry point. An upcoming change requires even this
branch to be changed, so we apply the hook macro at the earliest
point, and have the branch in the hook file as well.
This is no functional change at this point, jus
From: Jens Kuske
The A64 DRAM controller is very similar to the H3 one,
so the code can be reused with some small changes.
[Andre: fixed up typo, merged in fixes from Jens]
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 1 +
arc
According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.
Reported-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-su
Now that the SPL is ready to be compiled in AArch64 and the DRAM
init code is ready, enable SPL support for the A64 SoC and in the
Pine64 defconfig.
For now we keep the boot0 header in the U-Boot proper, as this allows
to still use boot0 as an SPL replacement without hurting the SPL use
case.
We di
From: Jens Kuske
The IOCR registers got renamed to BDLR to match the public
documentation of similar controllers.
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h | 43 ++---
arch/arm/mach-sunxi/dram_sun8i_h3.c
From: Jens Kuske
Instead of setting the delay for whole bytes allow setting
it for each individual bit. Also add support for
address/command lane delays.
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 54 ++---
Fix the output of the DRAM size on AArch64 SPLs.
Signed-off-by: Andre Przywara
Reviewed-by: Alexander Graf
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c
b/arch/arm/mach-sunxi/dram_sun8i_h3.c
index
Read the specified "arch" value from a legacy or FIT U-Boot image and
store it in our SPL data structure.
This allows loaders to take the target architecture in account for
custom loading procedures.
Having the complete string -> arch mapping for FIT based images in the
SPL would be too big, so we
The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode.
To run AArch64 code, we have to trigger a warm reset via the RMR register,
which proceeds with code execution at the address stored in the RVBAR
register.
If the bootable payload in the FIT image is using a different
architectu
At the moment we use the arch/arm directory for arm64 boards as well,
so the Makefile will pick up the "arm" name for the architecture to use
for tagging binaries in U-Boot image files.
Differentiate between the two by looking at the CPU variable being defined
to "armv8", and use the arm64 architec
Since the SPL FIT loader can now differentiate between different
architectures, teach it how to tell arm and arm64 apart when a FIT
image is used.
We just support those two for now, as these are so far the only sensible
alternatives.
Signed-off-by: Andre Przywara
Reviewed-by: Simon Glass
---
ar
When compiling the SPL for the Allwinner A64 in AArch64 mode, we can't
use the more compact Thumb2 encoding, which only exists for AArch32
code. This makes the SPL rather big, up to a point where any code
additions or even a different compiler may easily exceed the 32KB limit
that the Allwinner BRO
Hi Stefan,
On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
> From: Stefan Herbrechtsmeier
>
>
> The sdhci controller assumes that the base clock frequency is fully
> supported by the peripheral and doesn't support hardware limitations.
> Distinguish between base clock of th
Hi Jagan,
Ping!
> -Original Message-
> From: Siva Durga Prasad Paladugu
> Sent: Tuesday, November 29, 2016 10:30 AM
> To: 'Jagan Teki'
> Cc: u-boot@lists.denx.de; Michal Simek (michal.si...@xilinx.com)
>
> Subject: RE: [U-Boot] Query on qspi driver
>
>
> Hi Jagan,
>
> > -Origina
Hi,
On 1 December 2016 at 01:39, Stefan Roese wrote:
> (Adding Simon and Maxim to Cc)
>
> On 23.11.2016 16:12, Mario Six wrote:
>>
>> Certain boards come in different variations by way of utilizing daughter
>> boards, for example. These boards might contain additional chips, which
>> are added to
On 1 December 2016 at 01:42, Stefan Roese wrote:
> (Adding Simon to Cc)
>
> On 23.11.2016 16:12, Mario Six wrote:
>>
>> This patch adds a function to the TPM library, which allows U-Boot to
>> flush resources, e.g. keys, from the TPM.
>>
>> Signed-off-by: Mario Six
>
>
> Simon, do you have any co
On 1 December 2016 at 00:40, Marcel Ziswiler wrote:
>
>
> On December 1, 2016 3:20:55 AM GMT+01:00, Simon Glass
> wrote:
>>Hi Marcel,
>>
>>On 30 November 2016 at 09:47, Marcel Ziswiler
>>wrote:
>>> From: Marcel Ziswiler
>>>
>>> Introduce CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK to disable the
Hi Markus,
On 1 December 2016 at 01:58, Markus Valentin wrote:
> Hi Simon,
> Am Mittwoch, den 30.11.2016, 19:20 -0700 schrieb Simon Glass:
>> Hi Markus,
>>
>> On 30 November 2016 at 04:32, Markus Valentin wrote:
>> >
>> > Hi,
>> >
>> > im trying to run u-boot as uefi-payload for qemu this works
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