On Thu, Nov 17, 2016 at 06:31:03PM +0100, Alexander Graf wrote:
> Some travis QEMU tests can transfer files between the build directory
> and the guest U-Boot instance. For that to work, both need to have access
> to the same directory.
>
> This patch puts the current build path into an environme
On Thu, Nov 17, 2016 at 06:31:05PM +0100, Alexander Graf wrote:
> Now that we have working network tests and a hello world efi application
> built inside our tree, we can automatically test that efi binary running
> inside of U-Boot.
>
> Signed-off-by: Alexander Graf
> Reviewed-by: Simon Glass
On Thu, Nov 17, 2016 at 06:31:02PM +0100, Alexander Graf wrote:
> The network test currently downloads files at 0MB offset of RAM start.
> This works for most ARM systems, but x86 has weird memory layout constraints
> on the first MB of RAM.
>
> To not get caught into any of these, let's add a 4M
On Thu, Nov 17, 2016 at 06:31:07PM +0100, Alexander Graf wrote:
> Most of the time when running the sleep test in Travis for
> the integratorcp_cm926ejs target I get errors like this:
>
> E assert 2.01056289673 >= 3
>
> The deviation is tiny, but fails the overall build result. Since
On Thu, Nov 17, 2016 at 06:31:04PM +0100, Alexander Graf wrote:
> When running in travis-ci, we want to pass environment configuration to
> the tests. These reside in a path available through PYTHONPATH, so let's
> define that one to point to the unit test repo.
>
> Signed-off-by: Alexander Graf
On Thu, Nov 17, 2016 at 10:40:10PM +0100, Alexander Graf wrote:
> Today we can compile a self-contained hello world efi test binary that
> allows us to quickly verify whether the EFI loader framwork works.
>
> We can use that binary outside of the self-contained test case though,
> by providing i
On Fri, Nov 18, 2016 at 01:18:00PM +0100, Alexander Graf wrote:
> We have all the building blocks now to run arbitrary efi applications
> in travis. The most important one out there is grub2, so let's add
> a simple test to verify that grub2 still comes up.
>
> Signed-off-by: Alexander Graf
App
Configure the PHY to output a 125MHz clk from CLK_25M and set tx clock delay.
This patch is similar to commit 4b6035da482cccda06aeb419634f99937c9fc783
("mx6sabresd: Make Ethernet functional again").
Signed-off-by: Soeren Moch
---
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: u-boot@lists.denx.de
---
The authenticate_image routine returns a boolean to indicate
a valid (1) or invalid (0) image.
The hab_auth_img should return CMD_RET_SUCCESS to indicate
success (a valid image), but currently doesn't.
Before this patch, a valid image at addres 0x1200
with an IVT offset of 0x7a8000 will produ
Hi,
On 23 November 2016 at 20:19, Siarhei Siamashka
wrote:
> On Sun, 20 Nov 2016 14:56:59 +
> Andre Przywara wrote:
>
>> tiny-printf does not know about the "l" modifier so far, which breaks
>> the crash dump on AArch64, because it uses %lx to print the registers.
>> Add an easy way of handl
On 24 November 2016 at 00:29, Kever Yang wrote:
> The popmetal board using a HOST_VBUS_DRV gpio signal to control the
> USB host port 5V power, add a fix regulator and pinctrl for it, and
> enable the USB host1 controller with the vbus-supply.
>
> Signed-off-by: Kever Yang
> ---
>
> Changes in v2
On 23 November 2016 at 23:47, Peng Fan wrote:
> There two iomuxc for i.MX6SLL. One is normal IOMUXC, the other
> is for IOMUXC_SNVS.
>
> Signed-off-by: Peng Fan
> Cc: Stefano Babic
> Cc: Simon Glass
> ---
> drivers/pinctrl/nxp/pinctrl-imx6.c | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-
Hi Mugunthan,
On 24 November 2016 at 01:11, Mugunthan V N wrote:
> Hi Simon
>
> On Thursday 24 November 2016 07:51 AM, Simon Glass wrote:
>> Hi Mugunthan,
>>
>> On 20 November 2016 at 22:38, Mugunthan V N wrote:
>>> Hi Simon,
>>>
>>> On Saturday 19 November 2016 01:04 AM, Simon Glass wrote:
On 24 November 2016 at 00:59, york sun wrote:
> This set converts all CONFIG_PPC_* SoC macros to Kconfig ARCH_* options
> and drop existing macros.
>
> CONFIG_MAX_CPUS is converted to Kconfig option for mpc85xx, and dropped
> for mpc86xx.
Looks good, thanks for doing this!
- Simon
__
On 24 November 2016 at 07:02, Fabien Parent wrote:
> The function that is processing the 'fdt' parameters is one big
> if-else if. In order to be able to type command faster only the first
> few letter are checked to know which block of code to execute. For
> systemsetup, the block of code that wa
Hi Patrick,
On 24 November 2016 at 03:27, Patrick DELAUNAY wrote:
> Hi Simon,
>
>>
>> Hi Patrick,
>>
>> On 22 November 2016 at 06:24, Patrick Delaunay
>> wrote:
>> > From: Patrick Delaunay
>> >
>> > Signed-off-by: Patrick Delaunay
>> > Signed-off-by: Patrick Delaunay
>> > ---
>> >
>> > Kconf
Hi,
On 24 November 2016 at 02:28, Z.Q. Hou wrote:
> Hi Simon,
>
> Thanks for your comments!
>
>> -Original Message-
>> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
>> Sent: 2016年11月24日 10:21
>> To: Z.Q. Hou
>> Cc: U-Boot Mailing List ; Albert ARIBAUD
>> ; Prabh
Hi Ronny,
On 24 November 2016 at 14:20, Ronny Ko wrote:
> Hi Simon,
>
> I have a question about using a TPM from U-Boot. I try to run U-Boot on
> Minnowboard MAX, which has a firmware TPM (fTPM), instead of discrete TPM
> (dTPM). I wonder if the way of using fTPM from U-Boot is the same as using
On 25 November 2016 at 03:48, Bernhard Nortmann
wrote:
> Hi Simon,
>
> Am 23.11.2016 um 00:08 schrieb Simon Glass:
>>
>> Hi Bernhard,
>>
>> [...]
>> Well you could add a separate patch before this one which renames
>> everything. I don't think anyone else is working in this area.
>>
>> Regards,
>>
On 25 November 2016 at 15:32, Marek Vasut wrote:
> Add function which allows fetching the default FCR register setting
> from platform data for DM , while retaining old behavior for non-DM
> by returning UART_FCRVAL.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
> ---
> V2: If
On 25 November 2016 at 02:45, Tomas Melin wrote:
> Sort include files in accordance to u-boot coding style.
>
> Signed-off-by: Tomas Melin
> ---
> common/splash_source.c | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
Reviewed-by: Simon Glass
__
Hi,
On 25 November 2016 at 08:38, Olliver Schinagl wrote:
> Add the read_rom_hwaddr net_op hook so that it can be called from boards
> to read the mac from a ROM chip.
>
> Signed-off-by: Olliver Schinagl
> ---
> drivers/net/designware.c | 16
> 1 file changed, 16 insertions(+)
Hi Marex,
On 25 November 2016 at 15:32, Marek Vasut wrote:
> Add compatibility string for the Ingenic JZ4780 SoC, the necessary
> UART enable bit into FCR and register shift. Neither are encoded
> in the DTS coming from Linux, so we need to support it this way.
>
> Signed-off-by: Marek Vasut
> C
Hi Marex,
On 25 November 2016 at 15:32, Marek Vasut wrote:
> Add driver data to each compatible string to identify the type of
> the port. Since all the ports in the driver are entirely compatible
> with 16550 for now, all are marked with PORT_NS16550. But, there
> are ports which have specific q
This function can fail, so return the error if there is one.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to adjust dw_adjust_link() to return an error
Changes in v2: None
drivers/net/designware.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git
From: Sjoerd Simons
To allow other DM drivers to subclass the designware driver various
functions and structures need to be exported. Export these.
Signed-off-by: Sjoerd Simons
Reviewed-by: Bin Meng
Acked-by: Simon Glass
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
With rockchip we need to make adjustments after the link speed is set but
before enabling received/transmit. In preparation for this, split these
two pieces into separate functions.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to split the link init into a separate function
Cha
This v3 patch is an update on Sjoerd's original v2 series from Feburary.
I have dealt with the changes requested at the time, and adjusted the way
that the speed change is handled.
Tested on firefly-rk3288, rock2.
Original cover letter:
To add support I've taken a slightly different approach then
From: Sjoerd Simons
Enable the various configuration option required to get the ethernet
interface up and running on Radxa Rock2 and Firefly.
Signed-off-by: Sjoerd Simons
Reviewed-by: Simon Glass
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
configs/firefly-rk3288_
From: Sjoerd Simons
Add a new driver for the GMAC ethernet interface present in Rockchip
RK3288 SOCs. This driver subclasses the generic design-ware driver to
add the glue needed specifically for Rockchip.
Signed-off-by: Sjoerd Simons
Signed-off-by: Simon Glass
---
Changes in v3:
- Add commen
From: Sjoerd Simons
Now that at least on the firefly board we have network support, enable
PXE and DHCP boot targets by default.
Signed-off-by: Sjoerd Simons
Acked-by: Simon Glass
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
include/configs/rockchip-common.h | 4 +
From: Sjoerd Simons
Now that ethernet support works, it can be dropped from the rockchip
TODO
Signed-off-by: Sjoerd Simons
Acked-by: Simon Glass
Signed-off-by: Simon Glass
---
Changes in v3:
- Add a few new patches
- Drop the 'net: designware: Add a fix_mac_speed hook' patch
Changes in v2:
Export all functions so that drivers can use them, or not, as the need
arises.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to export the operation functions
Changes in v2: None
drivers/net/designware.c | 19 +--
drivers/net/designware.h | 9 +
2 file
This is the only RK3288 device without DHCP. Enable it so that we
can use a common BOOT_TARGET_DEVICES setting. It is likely useful to be
able to use USB networking, at least. Full networking can be enabled when
a suitable platform needs it.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add ne
On 11/27/2016 06:03 PM, Simon Glass wrote:
> Hi Marex,
>
> On 25 November 2016 at 15:32, Marek Vasut wrote:
>> Add compatibility string for the Ingenic JZ4780 SoC, the necessary
>> UART enable bit into FCR and register shift. Neither are encoded
>> in the DTS coming from Linux, so we need to supp
I have a tablet with 1Gb of ram (two chips),but not u-boot neither kernel
detect it (only 512Mb).
Does i need to change something in arch/arm/mach-sunxi/dram_sun8i_a33.c ?
i posta alettronica found this struct in sunxi_dram_init(void) function:
struct dram_para para = {
.cs1 =
On 11/27/2016 06:03 PM, Simon Glass wrote:
> Hi Marex,
>
> On 25 November 2016 at 15:32, Marek Vasut wrote:
>> Add driver data to each compatible string to identify the type of
>> the port. Since all the ports in the driver are entirely compatible
>> with 16550 for now, all are marked with PORT_N
On Wed, Nov 16, 2016 at 4:29 AM, Bernhard Nortmann
wrote:
> "transient" (='t') is like "any", but requests that a variable
> should not be exported (ENV_FLAGS_VARACCESS_PREVENT_EXPORT).
>
> "system" (='S') is meant for 'internal' variables that
The flags are positional, so 's' is not in use. It s
Hi Simon,
I'm using Minnowboard MAX. It has fTPM, which is an integrated TPM into SoC
(Bay Trail).
http://wiki.minnowboard.org/MinnowBoard_MAX
https://firmware.intel.com/blog/security-technologies-and-minnowboard-max
https://prosauce.org/blog/2016/1/11/minnowboard-max-enable-and-test-the-firmware
On 10/01/2016 05:19 PM, Paul Burton wrote:
Convert the sh architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for sh this is primarily a matter of moving code.
Feedback from architecture maintainers is welcome.
S
In common usecases flush_cache() assumes both cache invalidation and
write-back to memory, instead of doing cache invalidation only with
the wrapped 'ocbi' instruction pin flush_cache() to cache invalidation
with memory write-back done by 'ocbp'.
Signed-off-by: Vladimir Zapolskiy
---
arch/sh/cpu
This is a combined series of the fixes to SH2/SH3/SH4/SH4A architecture port
of U-boot on top of the master branch, there is no functional difference
between this series and 3 my series sent in August 2016 for 2016.09, however
due to many positive generalization updates to U-boot sources the old
un
The change actually maps PCI I/O window to the same address on PCI bus
as it is stated by a comment, before the change transfers to the PCI I/O
space are failed due to misconfiguration of the most significant 14 bits
of the PCI address in PCIIOBR (note that it is set to 0x0).
Most probably the pro
The change is similar to commit 994b56616bae ("sh: delete an unused
source file") for SH2, however here the removed cache.c file was
built and included into an image as a dead code.
If it is needed in future the contents can be reused from a similar
arch/sh/cpu/sh4/cache.c file, which is in turn w
While both options are acceptable use P1 area physical addresses
instead of external memory space of text base and PCI system memory
for unification purposes, all other supported superh boards have the
same selection.
This allows to easily ensure that CONFIG_SYS_TEXT_BASE is located
within availab
Both jump_to_P2() and back_to_P1() functions are found in asm/system.h
header file and functionally they are the same, don't redefine them.
Signed-off-by: Vladimir Zapolskiy
---
arch/sh/cpu/sh4/cache.c | 39 ++-
1 file changed, 2 insertions(+), 37 deletions(-)
In common usecases flush_cache() assumes both cache invalidation and
write-back to memory, thus in flush_dcache_range() implementation
change SH4 cache write-back only instruction 'ocbwb' with cache purge
instruction 'ocbp', according to the User's Manual there should be no
performance penalty for
Defined __io is no-op for the SH architecture and it can be removed
from board files without any functional change.
Signed-off-by: Vladimir Zapolskiy
---
arch/sh/include/asm/io.h | 10 --
include/configs/r2dplus.h | 1 -
include/configs/r7780mp.h | 1 -
3 files changed, 12 deletions(-
For ease of use and accounting a condition that on SH4
pci_phys_to_bus() and pci_bus_to_phys() are one in one mappings due to
unimplemented __iomem() conversion, this change fixes access to SDRAM
memory by PCI devices.
This change also generalizes PCI system memory configuration, which is
taken fr
No functional change, moving cache manipulation functions into cache.c
allows to collect all of them in a single location and as a pleasant
side effect cache_control() function can be unexported now.
Signed-off-by: Vladimir Zapolskiy
---
arch/sh/cpu/sh4/cache.c | 39 +
Three supported SH4/SH4A boards with the bootloader image stored on
SPI flash have own flavour of a linker script, in turn they are equal
among each other. The only difference is that the text from
lowlevel_init.o is placed right after start.o, which makes sense.
Note that .bss section is not mark
Since a platform conversion to generic board support has not been
accomplished some architecture specific bits are missing from board_f
init sequence, the change adds a number of basic expected callbacks
into early init sequence.
Signed-off-by: Vladimir Zapolskiy
Reviewed-by: Simon Glass
---
co
No functional change, concentrate linker script commands in one
place for convenience. Entry point is set to CONFIG_SYS_TEXT_BASE by
default on build, so this option can be omitted from being added to
the linker script.
Signed-off-by: Vladimir Zapolskiy
---
arch/sh/config.mk | 1 -
arch/sh/
Reference lowlevel_init of all supported SH2A/SH3/SH4/SH4A boards
from a shared linker script, the lowlevel_init function will be called
by a relative address.
Signed-off-by: Vladimir Zapolskiy
---
arch/sh/cpu/u-boot.lds | 2 +-
board/alphaproject/ap_sh4a_4a/Makefile | 2 +-
boar
At the moment in runtime all defined sections are copied into or
created in RAM, specify this explicitly to assert potential out of RAM
placements of the sections.
Signed-off-by: Vladimir Zapolskiy
---
arch/sh/cpu/u-boot.lds | 32
1 file changed, 16 insertions(+)
By default this undef is a noop, moreover at this point when the
platform support is broken is prevents debugging of U-boot by manual
insertion of #define DEBUG into common files, so it makes sense to
remove the option from all SH boards as a harmful one.
Signed-off-by: Vladimir Zapolskiy
---
in
It is easy to note that SH2/SH3/SH4 start.S code is practically
the same with a minor difference for SH2 where a short data header is
present. To avoid unwanted code duplication and to automatically
convert SH2 and SH3 platforms to generic board support move fixed SH4
start.S into arch/sh/lib/start
Generic board support assumes a different method of specifying
DRAM size on board, also it can be shared among all boards, notably
only sh7763rdp board has a custom legacy dram_init(), however
the difference is only in printing some additional information,
this feature can be removed.
Signed-off-b
This change allows to reserve enough space at the end of board SDRAM
to store two copies of U-Boot and malloc heap.
Due to selection of the CONFIG_SYS_TEXT_BASE the second code/data
copying is not avoided, first of all this may depend on a used
toolchain, secondly at this point some level of volat
Finally add fpic compilation option to produce relocatable code.
Note that this requires to define CONFIG_NEEDS_MANUAL_RELOC for all
board files, also relocation support still has some limitations
(e.g. a developer should care not to overwrite the executing code or
memset() with zeroes not yet relo
cache_wback_all() is a local function and it is called from
cache_control() only, which is in turn jumps to P2 area.
The change fixes an issue when cache_wback_all() returns from P2 to
P1, however cache_control() continues to manipulate with CCR
register, according to the User's Manual this is res
All SH boards define a checkboard() function which outputs basic board
information on boot, however generic board support requires to define
CONFIG_DISPLAY_BOARDINFO to do that, so define it for the boards.
Signed-off-by: Vladimir Zapolskiy
---
include/configs/MigoR.h | 1 +
include/configs
Like on ARM platform keep the first code relocation from a U-boot
image storage to RAM at CONFIG_SYS_TEXT_BASE, then pass execution to a
generic board_init_f() with empty GD flags. If CONFIG_SYS_TEXT_BASE is
equal to a calculated by board_init_f() relocation address there will
be no more code and d
CONFIG_RTL8139 was moved to a board defconfig by a commit 86e9dc86b1a2
("net: Move CONFIG_RTL8139 to Kconfig"), however it was done
incorrectly due to a missing CONFIG_NETDEVICES selection, thus
virtually it was just a removal of the driver compilation.
As an unlucky consequence the option was com
Commits b61e90e6fd83 ("sh: Drop the arch-specific board init") and
f41e6088eb1a ("sh: Fix build errors for generic board") left code and
data relocation done in start.S, however further actual U-boot
configuration is not started anymore. Practically SH boards with the
code relocated into the expect
On 24/11/16 03:19, Siarhei Siamashka wrote:
> On Sun, 20 Nov 2016 14:56:59 +
> Andre Przywara wrote:
>
>> tiny-printf does not know about the "l" modifier so far, which breaks
>> the crash dump on AArch64, because it uses %lx to print the registers.
>> Add an easy way of handling longs correc
On 27/11/16 17:02, Simon Glass wrote:
Hi,
> On 23 November 2016 at 20:19, Siarhei Siamashka
> wrote:
>> On Sun, 20 Nov 2016 14:56:59 +
>> Andre Przywara wrote:
>>
>>> tiny-printf does not know about the "l" modifier so far, which breaks
>>> the crash dump on AArch64, because it uses %lx to
On 11/27/2016 05:58 AM, Marek Vasut wrote:
> On 11/26/2016 09:45 PM, Tom Rini wrote:
>> On Fri, Nov 25, 2016 at 11:32:23PM +0100, Marek Vasut wrote:
>>> If CONFIG_SPL_LIBCOMMON_SUPPORT is undefined, the following error
>>> will happen, so fix it.
>>>
>>> In file included from common/spl/spl_mmc.c:1
On 11/28/2016 03:33 AM, Jaehoon Chung wrote:
> On 11/27/2016 05:58 AM, Marek Vasut wrote:
>> On 11/26/2016 09:45 PM, Tom Rini wrote:
>>> On Fri, Nov 25, 2016 at 11:32:23PM +0100, Marek Vasut wrote:
If CONFIG_SPL_LIBCOMMON_SUPPORT is undefined, the following error
will happen, so fix it.
>
Hi Marek,
On 11/26/2016 07:32 AM, Marek Vasut wrote:
> From: Paul Burton
>
> Add driver for the JZ47xx MSC controller.
There are some checkpatch error and warings. Could you fix them?
And i don't know what means MSC?
>
> Signed-off-by: Marek Vasut
> Cc: Daniel Schwierzeck
> Cc: Paul Burton
Hi Tomas,
On 11/25/2016 06:01 PM, Tomas Melin wrote:
> Add new command that provides possibility to enable the
> background operations handshake functionality
> (BKOPS_EN, EXT_CSD byte [163]) on eMMC devices.
>
> This is an optional feature of eMMCs, the setting is write-once.
> The command must
Hi Marek,
On 09/23/2016 01:15 PM, Simon Glass wrote:
> +Marek
>
> On 9 September 2016 at 04:20, Jaehoon Chung wrote:
>> If USB is stopped, just run 'usb start' instead of printing message.
>> Then user didn't consider whether usb is started or stopped.
Do you have any other opinion for this? :)
Hi Simon,
Thanks for your comments!
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年11月28日 1:02
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Prabhakar Kushwaha
> ; Huan Wang-B18965
> ; Sumit Garg ; Ruchika
> Gup
On 11/26/2016 03:25 AM, Marek Vasut wrote:
> On 11/22/2016 03:42 AM, Dongwoo Lee wrote:
>> On 2016년 11월 18일 23:01, Marek Vasut wrote:
>>> On 11/18/2016 08:24 AM, Jaehoon Chung wrote:
Hi,
Added Marek as USB maintainer.
On 11/17/2016 01:21 PM, Dongwoo Lee wrote:
> The tra
On Sab, 2016-11-26 at 08:43 +0530, Jagan Teki wrote:
> On Fri, Nov 25, 2016 at 10:07 PM, Champ, Andy
> wrote:
> >
> > Hi all,
> >
> >
> > in the table in drivers/mtd/spi/spi_flash_ids.c there is a flag
> > WR_QPP set against Macronix devices (including the ones Dumitru is
> > just adding).
> >
Hi Jaehoon,
On 28/11/16 14:08, Jaehoon Chung wrote:
> Hi Marek,
>
> On 09/23/2016 01:15 PM, Simon Glass wrote:
>> +Marek
>>
>> On 9 September 2016 at 04:20, Jaehoon Chung wrote:
>>> If USB is stopped, just run 'usb start' instead of printing message.
>>> Then user didn't consider whether usb is
On 25.11.2016 16:41, Olliver Schinagl wrote:
> The .read_rom_hwaddr net_ops hook does not check the return value, which
> is why it was never caught that we are currently returning 0 if the
> read_rom_hwaddr function return -ENOSYS and -ENOSYS otherwise.
>
> In this case we can simplify this by ju
On 25.11.2016 14:59, Stefan Herbrechtsmeier wrote:
> The index of the zynq serial driver is always zero and could be removed.
>
> Signed-off-by: Stefan Herbrechtsmeier
>
> ---
>
> Changes in v2:
> - Remove unused index from get uart clock function
>
> arch/arm/mach-zynq/clk.c | 3
Hi, +Siva,
On 25.11.2016 14:59, Stefan Herbrechtsmeier wrote:
> The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
> clock frequency but this clock is not fixed and depends on the hardware
> configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ
> doesn't match th
On 25.11.2016 14:59, Stefan Herbrechtsmeier wrote:
> The maximum supported peripheral clock frequency of the zynq depends on
> the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz
> respectively 25 MHz. Use the max-frequency value of the device tree to
> determine the maximal supp
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