Hi Peng,
On 08/10/2016 10:58, Peng Fan wrote:
> From: "Ye.Li"
>
> Need to gate ENET clock when switching to a new clock parent, because
> the mux is not glitchless.
>
> Signed-off-by: Peng Fan
> Signed-off-by: Ye.Li
> Cc: Stefano Babic
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 5 +
> 1 f
On 08/10/2016 11:03, Peng Fan wrote:
> According to design team, we need to set REFTOP_VBGADJ
> in PMU MISC0 according to the REFTOP_TRIM[2:0] fuse. the
> actually table is as below:
>
> '000" - set REFTOP_VBGADJ[2:0] to 3'b000
> '001" - set REFTOP_VBGADJ[2:0] to 3'b001
> '010" - set REFTOP_
On 17/10/2016 15:51, Heiko Schocher wrote:
> post some small updates for the imx35 based flea3 board
> - add DT support
> - factorize SDRAM setup
> - add GPIO setup
> - adjust default environment
>
>
> Heiko Schocher (2):
> mx35: add DT support to flea3 board
> mx35: adjust default environmen
Hi Jagan,
On 19/10/2016 13:23, Jagan Teki wrote:
> From: Jagan Teki
>
> This series convert fec_mxc to DM and tested both dm and
> non-dm code and it is on top of [1] with u-boot-imx/master
> branch.
>
> Changes for v7:
> - Remove fec_set_dev_name in dm probe
>
> Changes for v6:
> - Add Acked-
Hi Simon,
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年11月12日 0:18
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Prabhakar Kushwaha
> ; Huan Wang-B18965
> ; Sumit Garg ; Ruchika
> Gupta ; Saksham Jain
> ; york
Add support to detect RGMII link interface from link-interface
device tree entry. Also rename the existing link type enums so
that it provides meaning full interface like SGMII.
Signed-off-by: Mugunthan V N
---
Without this support there is a crash in K2G EVM tftp boot [1].
Verified this with tf
> The rpi has a pretty simple way of resetting the whole system. All it takes
> is to poke a few registers at a well defined location in MMIO space.
>
> This patch adds support for the EFI loader implementation to allow an OS to
> reset and power off the system when we're outside of boot time.
>
> Firmware provides a spin table on the raspberry pi. This table shouldn't
> get overwritten by payloads, so we need to mark it as reserved.
>
> Signed-off-by: Alexander Graf
Thanks, applied to efi-next
Alex
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> To enable working efifb support, let's map the frame buffer as 32bpp
> instead of 16bpp.
>
> Signed-off-by: Alexander Graf
Thanks, applied to efi-next
Alex
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On 14/11/2016 10:23, Alexander Graf wrote:
To enable working efifb support, let's map the frame buffer as 32bpp
instead of 16bpp.
Signed-off-by: Alexander Graf
Thanks, applied to efi-next
Alex
Sorry, that was script magic going wild. Bcm2835 patches obviously have
to go via Stephen's t
Hi,
On 14-11-16 01:34, Jaehoon Chung wrote:
On 11/14/2016 07:50 AM, Tom Rini wrote:
On Sun, Nov 13, 2016 at 07:50:53PM +0100, Hans de Goede wrote:
Hi,
On 04-11-16 16:18, Maxime Ripard wrote:
Some eMMC will fail at the first switch, but would succeed in a subsequent
one.
Make sure we try sev
Hi Simon,
On 11/12/2016 12:17 AM, Simon Glass wrote:
Hi Kever,
On 8 November 2016 at 03:13, Kever Yang wrote:
enable the vbus for usb host in board_init().
Note 'borad_init' typo in subject.
Will fix in next version.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3036-board.
On 11/14/2016 06:56 PM, Hans de Goede wrote:
> Hi,
>
> On 14-11-16 01:34, Jaehoon Chung wrote:
>> On 11/14/2016 07:50 AM, Tom Rini wrote:
>>> On Sun, Nov 13, 2016 at 07:50:53PM +0100, Hans de Goede wrote:
Hi,
On 04-11-16 16:18, Maxime Ripard wrote:
> Some eMMC will fail at the f
Hi Hans,
On 11/14/2016 03:51 AM, Hans de Goede wrote:
> Hi,
>
> On 04-11-16 16:18, Maxime Ripard wrote:
>> The SinA33 comes with an optional 7" display. Enable it in the
>> configuration.
>>
>> Signed-off-by: Maxime Ripard
>
> LGTM:
>
> Reviewed-by: Hans de Goede
This patch is not on MMC sid
Hi,
On 08-11-16 11:19, Maxime Ripard wrote:
The NextThing's C.H.I.P. can have expansion boards called DIPs. Those DIPs
are connected through the external headers, and comes with an
identification mechanism based on 1-Wire EEPROMs.
That auto-detection works great, because 1-Wire allows the enume
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
From: Boris Brezillon
Add the description of the Toshiba TC58NVG2S0H SLC nand to the nand_ids
table so we can use the NAND ECC infos and the ONFI timings.
Signed-off-by: Boris Brezillon
Signed-off-by: Maxime Ripard
Looks good to me:
Reviewed-by
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
Those DT will be part of 4.10, sync them so we can have our own config.
Signed-off-by: Maxime Ripard
Looks good to me:
Reviewed-by: Hans de Goede
Regards,
Hans
---
arch/arm/dts/Makefile |1 +-
arch/arm/dts/axp209.dtsi
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
From: Hans de Goede
Enable the NAND and UBI support in the configuration header so that we can
(finally) use it.
Signed-off-by: Hans de Goede
Signed-off-by: Maxime Ripard
---
include/configs/sunxi-common.h | 26 ++
1 file
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
This program generates raw SPL images that can be flashed on the NAND with
the ECC and randomizer properly set up.
Signed-off-by: Maxime Ripard
Looks good to me:
Reviewed-by: Hans de Goede
Regards,
Hans
---
tools/.gitignore
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
The SPL image needs to be built with a different ECC configuration than the
U-Boot binary.
Add Kconfig options with defaults to provide a value that should work for
anyone, but is still configurable if needs be.
Signed-off-by: Maxime Ripard
Looks
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
Introduce a new sunxi-spl-with-ecc.bin image with already the right header,
ECC, randomizer and padding for the BROM to be able to read it.
It needs to be flashed using a raw access to the NAND so that the
controller doesn't change a thing to it, sinc
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
The CHIP Pro is a SoM that features the GR8 SIP, an AXP209, a BT/WiFi chip
and a 512MiB SLC NAND.
This it's an SLC NAND, it doesn't suffer the same drawbacks than found on
the MLC NANDs, and we can enable it right away.
Signed-off-by: Maxime Ripard
Hi,
On Wed, Nov 9, 2016 at 6:38 PM, Hans de Goede wrote:
> Hi,
>
> On 09-11-16 11:21, Chen-Yu Tsai wrote:
>>
>> Hi everyone,
>>
>> This series adds basic PSCI support for the A80 to enable SMP on the
>> first cluster. This at least allows people to use more than one core.
>> The term "basic" is u
Hi,
On 08-11-16 17:38, Olliver Schinagl wrote:
The current implementation to force the PHY into master mode is to have a
define which affects all realtek PHY's. This is not needed as the problem
only exists in the RTL8211C chips. Let us thus turn this into a quirk flag
instead.
Series looks go
Hi,
On 14-11-16 12:18, Hans de Goede wrote:
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
This program generates raw SPL images that can be flashed on the NAND with
the ECC and randomizer properly set up.
Signed-off-by: Maxime Ripard
Looks good to me:
Reviewed-by: Hans de Goede
Note this
Hi,
On 14-11-16 12:19, Hans de Goede wrote:
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
Introduce a new sunxi-spl-with-ecc.bin image with already the right header,
ECC, randomizer and padding for the BROM to be able to read it.
It needs to be flashed using a raw access to the NAND so that the
Hi All,
A while back I wrote:
"Between my $dayjob, linux-sunxi, other foss projects and last but
not least spending time with my wife and children I'm way too
busy lately.
So I've decided to seriously scale back my involvement in
linux-sunxi, as such I'm going to step down as u-boot sunxi
custo
Ian has not had any time for sunxi for some time now and I'm
in the same situation now, so I'm stepping down as sunxi
custodian and marking the sunxi support as Orphan.
Cc: Maxime Ripard
Cc: Chen-Yu Tsai
Cc: Ian Campbell
Signed-off-by: Hans de Goede
---
MAINTAINERS | 4 +---
1 file changed, 1
On 11/14/2016 03:50 AM, Hans de Goede wrote:
> Hi,
>
> On 04-11-16 16:18, Maxime Ripard wrote:
>> Some eMMC will fail at the first switch, but would succeed in a subsequent
>> one.
>>
>> Make sure we try several times to cover those cases. The number of retries
>> (and the behaviour) is currently
On 11/14/2016 03:51 AM, Hans de Goede wrote:
> Hi,
>
> On 04-11-16 16:18, Maxime Ripard wrote:
>> The SinA33 has an 4GB Toshiba eMMC connected to the MMC2 controller.
>> Enable it.
>>
>> Signed-off-by: Maxime Ripard
>
> LGTM:
>
> Reviewed-by: Hans de Goede
Applied on u-boot-mmc. Thanks!
Best
On 11/14/2016 03:51 AM, Hans de Goede wrote:
> Hi,
>
> On 04-11-16 16:18, Maxime Ripard wrote:
>> The SinA33 comes with an optional 7" display. Enable it in the
>> configuration.
>>
>> Signed-off-by: Maxime Ripard
>
> LGTM:
>
> Reviewed-by: Hans de Goede
Applied on u-boot-mmc. Thanks!
Best R
On 11/14/2016 03:51 AM, Hans de Goede wrote:
> Hi,
>
> On 04-11-16 16:18, Maxime Ripard wrote:
>> The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
>> support for those too.
>>
>> Signed-off-by: Maxime Ripard
>
> LGTM:
>
> Reviewed-by: Hans de Goede
Applied on u-boot-mmc.
Hi Hans,
On 14.11.2016 12:53, Hans de Goede wrote:
A while back I wrote:
"Between my $dayjob, linux-sunxi, other foss projects and last but
not least spending time with my wife and children I'm way too
busy lately.
So I've decided to seriously scale back my involvement in
linux-sunxi, as such
The settings for 2.5G SGMII are wrong, which the 2.5G case is missed in
set_if_mode(), and the serdes PCS configuration are wrong, this patch uses
the correct settings took from Linux.
Signed-off-by: Shaohui Xie
---
not sure what was wrong, the patch did not show in patchwork, so resend it.
Sorry
On Mon, Nov 14, 2016 at 12:53:13PM +0100, Hans de Goede wrote:
> Hi All,
>
> A while back I wrote:
>
> "Between my $dayjob, linux-sunxi, other foss projects and last but
> not least spending time with my wife and children I'm way too
> busy lately.
>
> So I've decided to seriously scale back my
Hi Simon,
On Fri, Nov 11, 2016 at 09:17:20AM -0700, Simon Glass wrote:
> Hi Maxime,
>
> On 8 November 2016 at 03:06, Maxime Ripard
> wrote:
> > Add a bus driver for bitbanging a 1-Wire bus over a GPIO.
> >
> > Signed-off-by: Maxime Ripard
> > ---
> > drivers/w1/Kconfig | 6 ++-
> > drivers
Hi Moritz,
On Fri, Nov 11, 2016 at 11:13:39AM -0800, Moritz Fischer wrote:
> Hi Maxime,
>
> On Fri, Nov 11, 2016 at 8:17 AM, Simon Glass wrote:
> > Hi Maxime,
> >
> > On 8 November 2016 at 03:19, Maxime Ripard
> > wrote:
> >> We might want to access data stored onto EEPROMs. Create a framework
Hi,
On Fri, Nov 11, 2016 at 11:16:39AM -0800, Moritz Fischer wrote:
> > +U_BOOT_DRIVER(ds2431) = {
> > + .name = "ds2431",
> > + .id = UCLASS_EEPROM,
> > + .ops= &ds2431_ops,
>
> Do you want to add a .flags = DM_UC_FLAG_SEQ_ALIAS here?
I don't
On Mon, 2016-11-14 at 12:53 +0100, Hans de Goede wrote:
> Ian has not had any time for sunxi for some time now and I'm
> in the same situation now, so I'm stepping down as sunxi
> custodian and marking the sunxi support as Orphan.
>
> Cc: Maxime Ripard
> Cc: Chen-Yu Tsai
> Cc: Ian Campbell
> Si
On Mon, Nov 14, 2016 at 12:29:25PM +0100, Hans de Goede wrote:
> Hi,
>
> On 14-11-16 12:18, Hans de Goede wrote:
> > Hi,
> >
> > On 08-11-16 17:21, Maxime Ripard wrote:
> > > This program generates raw SPL images that can be flashed on the NAND with
> > > the ECC and randomizer properly set up.
>
Add CycloneV based Terasic DE1-SoC board. The board boots
from SD/MMC. Ethernet and USB host is supported.
Signed-off-by: Anatolij Gustschin
Cc: Marek Vasut
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_cyclone5_de1_soc.dts | 66 +++
arch/arm/mach-socfpga/Kconfig
On 11/14/2016 02:53 PM, Anatolij Gustschin wrote:
> Add CycloneV based Terasic DE1-SoC board. The board boots
> from SD/MMC. Ethernet and USB host is supported.
>
> Signed-off-by: Anatolij Gustschin
> Cc: Marek Vasut
[...]
> diff --git a/include/configs/socfpga_de1_soc.h
> b/include/configs/s
Fix the following error, the $ret variable handling must
be part of the loop, while due to the missing parenthesis
it was not.
drivers/net/phy/micrel.c: In function ‘ksz9021_of_config’:
drivers/net/phy/micrel.c:303:2: warning: this ‘for’ clause does not guard...
[-Wmisleading-indentation]
for (
Hi,
On Mon, Nov 14, 2016 at 12:18:06PM +0100, Hans de Goede wrote:
> > #ifdef CONFIG_SPL_SPI_SUNXI
> > @@ -143,7 +157,14 @@
> > #define CONFIG_GENERIC_MMC
> > #define CONFIG_MMC_SUNXI
> > #define CONFIG_MMC_SUNXI_SLOT 0
> > -#define CONFIG_ENV_IS_IN_MMC
> > +#endif
> > +
> > +#if
From: Shaohui Xie
The settings for 2.5G SGMII are wrong, which the 2.5G case is missed in
set_if_mode(), and the serdes PCS configuration are wrong, this patch uses
the correct settings took from Linux.
Signed-off-by: Shaohui Xie
---
drivers/net/fm/eth.c | 32 ++--
From: Shaohui Xie
The settings for 2.5G SGMII are wrong, which the 2.5G case is missed in
set_if_mode(), and the serdes PCS configuration are wrong, this patch uses
the correct settings took from Linux.
Signed-off-by: Shaohui Xie
---
not sure what was wrong, the patch did not show in patchwork,
Hi,
On 14-11-16 14:53, Maxime Ripard wrote:
On Mon, Nov 14, 2016 at 12:29:25PM +0100, Hans de Goede wrote:
Hi,
On 14-11-16 12:18, Hans de Goede wrote:
Hi,
On 08-11-16 17:21, Maxime Ripard wrote:
This program generates raw SPL images that can be flashed on the NAND with
the ECC and randomize
Hey Hans,
On 14-11-16 12:26, Hans de Goede wrote:
Hi,
On 08-11-16 17:38, Olliver Schinagl wrote:
The current implementation to force the PHY into master mode is to
have a
define which affects all realtek PHY's. This is not needed as the
problem
only exists in the RTL8211C chips. Let us thus
Hi,
On 14-11-16 15:09, Maxime Ripard wrote:
Hi,
On Mon, Nov 14, 2016 at 12:18:06PM +0100, Hans de Goede wrote:
#ifdef CONFIG_SPL_SPI_SUNXI
@@ -143,7 +157,14 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SUNXI
#define CONFIG_MMC_SUNXI_SLOT 0
-#define CONFIG_ENV_IS_IN_MMC
+#endif
On Mon, Nov 14, 2016 at 12:18:06PM +0100, Hans de Goede wrote:
> > #ifdef CONFIG_SPL_SPI_SUNXI
> > @@ -143,7 +157,14 @@
> > #define CONFIG_GENERIC_MMC
> > #define CONFIG_MMC_SUNXI
> > #define CONFIG_MMC_SUNXI_SLOT 0
> > -#define CONFIG_ENV_IS_IN_MMC
> > +#endif
> > +
> > +#if defin
Hi,
On 14-11-16 15:11, Olliver Schinagl wrote:
Hey Hans,
On 14-11-16 12:26, Hans de Goede wrote:
Hi,
On 08-11-16 17:38, Olliver Schinagl wrote:
The current implementation to force the PHY into master mode is to have a
define which affects all realtek PHY's. This is not needed as the problem
Hans,
On 14-11-16 15:13, Hans de Goede wrote:
Hi,
On 14-11-16 15:11, Olliver Schinagl wrote:
Hey Hans,
On 14-11-16 12:26, Hans de Goede wrote:
Hi,
On 08-11-16 17:38, Olliver Schinagl wrote:
The current implementation to force the PHY into master mode is to
have a
define which affects all
Hi,
On Mon, 14 Nov 2016 15:07:31 +0100
Marek Vasut ma...@denx.de wrote:
...
> > +#undef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
> > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2
>
> Why is this needed ? Just start U-Boot from partition 1 as all the other
> SoCFPGAs do , esp. since th
Hi,
On 14-11-16 15:12, Maxime Ripard wrote:
On Mon, Nov 14, 2016 at 12:18:06PM +0100, Hans de Goede wrote:
#ifdef CONFIG_SPL_SPI_SUNXI
@@ -143,7 +157,14 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SUNXI
#define CONFIG_MMC_SUNXI_SLOT 0
-#define CONFIG_ENV_IS_IN_MMC
+#endif
+
+#
On 11/14/2016 03:17 PM, Anatolij Gustschin wrote:
> Hi,
>
> On Mon, 14 Nov 2016 15:07:31 +0100
> Marek Vasut ma...@denx.de wrote:
> ...
>>> +#undef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2
>>
>> Why is this needed ? Just start U-Boot fr
Add CycloneV based Terasic DE1-SoC board. The board boots
from SD/MMC. Ethernet and USB host is supported.
Signed-off-by: Anatolij Gustschin
Cc: Marek Vasut
---
v2:
- drop custom raw partition configuration, use default instead
arch/arm/dts/Makefile | 1 +
arch/arm/dts/
On 11/14/2016 04:07 PM, Anatolij Gustschin wrote:
> Add CycloneV based Terasic DE1-SoC board. The board boots
> from SD/MMC. Ethernet and USB host is supported.
>
> Signed-off-by: Anatolij Gustschin
> Cc: Marek Vasut
> ---
>
Applied, thanks.
--
Best regards,
Marek Vasut
_
On Mon, Nov 14, 2016 at 02:42:59PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Fri, Nov 11, 2016 at 11:16:39AM -0800, Moritz Fischer wrote:
> > > +U_BOOT_DRIVER(ds2431) = {
> > > + .name = "ds2431",
> > > + .id = UCLASS_EEPROM,
> > > + .ops= &ds2431
The offset was applied to write, but not read, now its applied to
both.
Signed-off-by: Phil Edworthy
---
drivers/dfu/dfu_sf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
index 9702eee..b6d5fe2 100644
--- a/drivers/dfu/dfu_sf.c
On Fri, Nov 11, 2016 at 11:20:47AM -0500, Tom Rini wrote:
> On Tue, Nov 08, 2016 at 05:21:14PM +0100, Maxime Ripard wrote:
>
> > This program generates raw SPL images that can be flashed on the NAND with
> > the ECC and randomizer properly set up.
> >
> > Signed-off-by: Maxime Ripard
> [snip]
>
On Mon, Nov 14, 2016 at 1:19 PM, Phil Edworthy
wrote:
> The offset was applied to write, but not read, now its applied to
> both.
>
> Signed-off-by: Phil Edworthy
Reviewed-by: Fabio Estevam
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On Mon, Nov 14, 2016 at 04:20:49PM +0100, Maxime Ripard wrote:
> On Fri, Nov 11, 2016 at 11:20:47AM -0500, Tom Rini wrote:
> > On Tue, Nov 08, 2016 at 05:21:14PM +0100, Maxime Ripard wrote:
> >
> > > This program generates raw SPL images that can be flashed on the NAND with
> > > the ECC and rando
Hi Phil,
> The offset was applied to write, but not read, now its applied to
> both.
>
> Signed-off-by: Phil Edworthy
> ---
> drivers/dfu/dfu_sf.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
> index 9702eee..b6d5fe2 100
On Mon, Nov 14, 2016 at 12:53:25PM +0100, Hans de Goede wrote:
> Ian has not had any time for sunxi for some time now and I'm
> in the same situation now, so I'm stepping down as sunxi
> custodian and marking the sunxi support as Orphan.
>
> Cc: Maxime Ripard
> Cc: Chen-Yu Tsai
> Cc: Ian Campbe
On Thu, Nov 3, 2016 at 6:28 AM, Andre Przywara wrote:
> Somehow an int returning function without a return statement sneaked
> in. Fix it.
>
> Signed-off-by: Andre Przywara
> ---
> drivers/mtd/spi/sunxi_spi_spl.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/
Hey all,
I've released v2016.11 and it's now live on git and FTP and ACD (along
with PGP sig file).
In many ways it feels good to say that the highlights of the last
release once again apply. We've had more DM conversion work, Kconfig
conversion work and arch / SoC / platform updates. We've als
Hi,
On 14/11/16 16:30, Jagan Teki wrote:
> On Thu, Nov 3, 2016 at 6:28 AM, Andre Przywara wrote:
>> Somehow an int returning function without a return statement sneaked
>> in. Fix it.
>>
>> Signed-off-by: Andre Przywara
>> ---
>> drivers/mtd/spi/sunxi_spi_spl.c | 3 ++-
>> 1 file changed, 2 ins
On Mon, Nov 14, 2016 at 04:47:26PM +, Andre Przywara wrote:
> Hi,
>
> On 14/11/16 16:30, Jagan Teki wrote:
> > On Thu, Nov 3, 2016 at 6:28 AM, Andre Przywara
> > wrote:
> >> Somehow an int returning function without a return statement sneaked
> >> in. Fix it.
> >>
> >> Signed-off-by: Andre P
Hans, Ian, All,
On 2016-11-14 12:53 +0100, Hans de Goede spake thusly:
> A while back I wrote:
>
> "Between my $dayjob, linux-sunxi, other foss projects and last but
> not least spending time with my wife and children I'm way too
> busy lately.
>
> So I've decided to seriously scale back my invo
On Mon, Nov 14, 2016 at 03:21:41PM +0100, Hans de Goede wrote:
> Hi,
>
> On 14-11-16 15:12, Maxime Ripard wrote:
> >On Mon, Nov 14, 2016 at 12:18:06PM +0100, Hans de Goede wrote:
> >>> #ifdef CONFIG_SPL_SPI_SUNXI
> >>>@@ -143,7 +157,14 @@
> >>> #define CONFIG_GENERIC_MMC
> >>> #define CONFIG_MMC_S
On 11/03/2016 04:12 AM, Priyanka Jain wrote:
> Signed-off-by: Priyanka Jain
> ---
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c|7 ---
> arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S |9 +
> .../include/asm/arch-fsl-layerscape/immap_lsch3.h |6 +++---
> 3 fil
On 09/23/2016 12:38 AM, Y.B. Lu wrote:
>> ditto.
>
> [Lu Yangbo-B47093] Ok, I will check the return. Thanks :)
>>
Yangbo,
Do you have an update?
York
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From: "d...@synoia.com"
To: "u-boot@lists.denx.de"
Cc: Cédric Schieli
Sent: Sunday, November 13, 2016 4:08 PM
Subject: FDT retrived varaibles appear to have different properties fom other
u-boot variables - and are corrupted o
On 11/07/2016 10:03 PM, Yao Yuan wrote:
> On 11/08/2016 02:27 AM, York Sun wrote:
>> On 10/25/2016 07:10 PM, Yuan Yao wrote:
>>> From: Yuan Yao
>>>
>>> The default configuration for QSPI AHB bus can't support 16MB+.
>>> But some flash on NXP layerscape board are more than 16MB.
>>
>> So what do yo
> On 10 November 2016 at 02:49, Alison Wang wrote:
> > This series is to support loading a 32-bit OS, the execution state
> will change from AArch64 to AArch32 when jumping to kernel. The
> architecture information will be got through checking FIT image, then
> U-Boot will load 32-bit OS or 64-bit
On Mon, Nov 14, 2016 at 10:16 PM, Tom Rini wrote:
> Hey all,
>
> I've released v2016.11 and it's now live on git and FTP and ACD (along
> with PGP sig file).
>
> In many ways it feels good to say that the highlights of the last
> release once again apply. We've had more DM conversion work, Kconfi
On 11/07/2016 10:36 AM, york@nxp.com wrote:
> On 10/27/2016 02:47 AM, Calvin Johnson wrote:
>> Hi York,
>>
>>> -Original Message-
>>> From: york sun
>>> Sent: Wednesday, October 26, 2016 10:09 PM
>>> To: Calvin Johnson ; Prabhakar Kushwaha
>>> ; Pratiyush
>>> Srivastava ; u-boot@lists.d
On 10/26/2016 03:47 AM, Sumit Garg wrote:
> Add NOR secure boot target. Also enable sec init.
>
> Signed-off-by: Vinitha Pillai
> Signed-off-by: Sumit Garg
> ---
>
> Changes in v2:
> Split patches logically from 2 to 3.
>
> board/freescale/ls1046aqds/MAINTAINERS | 4
> board/freescale/ls
On Mon, 14 Nov 2016 11:56:50 -0500
Tom Rini wrote:
> On Mon, Nov 14, 2016 at 04:47:26PM +, Andre Przywara wrote:
> > Hi,
> >
> > On 14/11/16 16:30, Jagan Teki wrote:
> > > On Thu, Nov 3, 2016 at 6:28 AM, Andre Przywara
> > > wrote:
> > >> Somehow an int returning function without a ret
On 11/06/2016 08:14 PM, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> A most basic PSCI implementation with only one psci_version is added for
> LS1043A, this can verify the generic PSCI framework, and more platform
> specific
> implementation will be added later.
>
> Signed-off-by: Hong
On Thu, 3 Nov 2016 00:58:12 +
Andre Przywara wrote:
> Somehow an int returning function without a return statement sneaked
> in. Fix it.
>
> Signed-off-by: Andre Przywara
> ---
> drivers/mtd/spi/sunxi_spi_spl.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/dr
Hi,
On Mon, Nov 14, 2016 at 10:25:27AM -0500, Tom Rini wrote:
> On Mon, Nov 14, 2016 at 04:20:49PM +0100, Maxime Ripard wrote:
> > On Fri, Nov 11, 2016 at 11:20:47AM -0500, Tom Rini wrote:
> > > On Tue, Nov 08, 2016 at 05:21:14PM +0100, Maxime Ripard wrote:
> > >
> > > > This program generates ra
On Mon, Nov 14, 2016 at 07:58:03PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Mon, Nov 14, 2016 at 10:25:27AM -0500, Tom Rini wrote:
> > On Mon, Nov 14, 2016 at 04:20:49PM +0100, Maxime Ripard wrote:
> > > On Fri, Nov 11, 2016 at 11:20:47AM -0500, Tom Rini wrote:
> > > > On Tue, Nov 08, 2016 at 05:2
On 11 November 2016 at 14:16, Andrew Duda wrote:
>
> Simon,
>
> padded_len could work. I decided to go with key_len to be more
> RSA-independent since I have been dealing with ECDSA primarily. More
> specifically, ECDSA has no notion of padding or padded_len, but it
> does have a notion of key_len
Hi Andrew,
On 11 November 2016 at 14:22, Andrew Duda wrote:
> Simon,
>
> So I looked into this more after you asked this, and it looks very
> platform dependent. I tested on two builds: sandbox and a version of
> x86-common. The before/after for sandbox image was
> 5486016-5486800(+784). The befo
Hello all,
To address a needed feature brought up by Andreas[0], we need a way to
disable SPL from loading non-FIT images.
The function spl_parse_image_header is common to all SPL loading paths
(common/spl/spl_(nand|net|nor|etc..)) so we add the check here, much
like the existing CONFIG_SPL_ABORT
On 14/11/16 18:32, Siarhei Siamashka wrote:
> On Thu, 3 Nov 2016 00:58:12 +
> Andre Przywara wrote:
>
>> Somehow an int returning function without a return statement sneaked
>> in. Fix it.
>>
>> Signed-off-by: Andre Przywara
>> ---
>> drivers/mtd/spi/sunxi_spi_spl.c | 3 ++-
>> 1 file chan
To help automate the loading of a TEE image during the boot we add a new
FIT section type 'tee', when we see this type while loading the loadable
sections we automatically call the platforms TEE processing function on
this image section.
Signed-off-by: Andrew F. Davis
---
Kconfig | 10 ++
Hello all,
Internally[0] we use the a hook in the FIT loadable section to install
our trusted execution environment solution (OPTEE) which is packaged
in the FIT image with the rest of the platform's images. I would like
to get some feedback if this will be an acceptable solution?
This patch is t
On Mon, Nov 14, 2016 at 07:43:40PM +, André Przywara wrote:
[snip]
> On a related matter, I ran buildman on HEAD for armv8 today and GCC 6.2
> found quite some issues (will send out the fixes ASAP).
> So is there some buildbot somewhere that runs buildman? If yes, with
> what compilers?
What
On Mon, Nov 14, 2016 at 10:14:57AM -0500, Tom Rini wrote:
> On Mon, Nov 14, 2016 at 02:42:59PM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > On Fri, Nov 11, 2016 at 11:16:39AM -0800, Moritz Fischer wrote:
> > > > +U_BOOT_DRIVER(ds2431) = {
> > > > + .name = "ds2431",
> > > > +
Hi Simon,
On Fri, Nov 11, 2016 at 09:17:28AM -0700, Simon Glass wrote:
> Hi Maxime,
>
> On 8 November 2016 at 03:19, Maxime Ripard
> wrote:
> > Some boards might need to some additional setup right before initialising
> > the video console.
> >
> > Add some hook to allow that.
>
> Instead of th
On 10/26/2016 03:47 AM, Sumit Garg wrote:
> Define bootscript and its header addresses for QSPI target. Also
> define PPA header address to enable PPA validation.
>
> Signed-off-by: Vinitha Pillai
> Signed-off-by: Sumit Garg
> ---
>
> Changes in v2:
> Split patches logically from 2 to 3.
>
> arc
Add serial platform data to board file.
Enable driver model for PXA serial driver.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2:
- Drop baudrate checks.
- Use panic instead of just hang() to more gracefully handle
failure case.
- Drop superfluous parenthesis around pla
Optional driver model handling integration.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Marek Vasut
---
Changes in v3:
- Drop spurious newline.
- Add Marek's reviewed-by.
Changes in v2: None
drivers/serial/serial_pxa.c | 183 +-
include/dm/platform_
With em humble DM and Kconfig migraters U-Boot binary size keeps
increasing. Drop a bunch of less needed stuff to save another precious
20+ KB.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2:
- Introduce new patch saving more precious space.
configs/colibri_pxa270_defcon
Migrate the PXA serial driver to be configured via Kconfig.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Marek Vasut
---
Changes in v3:
- Add Marek's reviewed-by.
Changes in v2: None
configs/colibri_pxa270_defconfig | 1 +
configs/h2200_defconfig | 1 +
configs/zipitz2_defconfig
This series integrates both Kconfig as well as optional driver model
support for the PXA serial driver. As I do not have any of the other
hardware available for testing for now I only transitioned the
Colibri PXA270 to actually make use of DM_SERIAL. As space on this
mostly NOR based hardware is r
Hi Stefan,
On 12 November 2016 at 12:13, Stefan Agner wrote:
> From: Stefan Agner
>
> Some devices (e.g. dra7xx) support loading to RAM using DFU without
> having direct boot from RAM support. Make sure the linker list
> does not contain BOOT_DEVICE_RAM if CONFIG_SPL_RAM_SUPPORT is not
> enabled
On 12 November 2016 at 12:13, Stefan Agner wrote:
> From: Stefan Agner
>
> The DFU Kconfig menu entries should be part of the SPL
> Kconfig file. Also avoid using the top level Makefile by
> moving the config dependent build artifacts to the driver/
> and driver/usb/gadget/ Makfiles.
>
> With tha
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