In data venerdì 29 aprile 2016 00:49:22, Marek Vasut ha scritto:
>
> Urgh, so you seem to have third revision of this stick. I have two
> sticks which are exactly the same and work in U-Boot on MX6 wandboard:
>
Hi Marek,
how big is the file you're trying to load?
For me it fails for files bigge
-- Forwarded message --
From: Tom Rini
Date: 2016-04-28 20:08 GMT+02:00
Subject: Re: [U-Boot] change the relocate address of u-boot
To: Marwa Hamza
Cc: u-boot@lists.denx.de
On Thu, Apr 28, 2016 at 02:47:21PM +0100, Marwa Hamza wrote:
> hey
> i 'm trying to start a whole system
Hello,
Could someone help point me in the right direction about chainloading
u-boot on an acer cb5 chromebook (nyan_big)? I'd like to be able to do a
nonverified uboot similar to what was done here:
https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-on-the-samsung-arm-chro
Hi All,
I was trying to enable the secured boot in u-boot for gumstix overo storm.
based on http://www.denx-cs.de/doku/?q=m28verifiedboot
After I prepared by SD cards, u-boot is not able to boot
and gives the below error message.
U-Boot SPL 2015.07 (Apr 28 2016 - 13:53:06)
SPL: Please implemen
Hi Marek,
On 28.04.2016 00:36, Marek Vasut wrote:
> The indirect write code is buggy pile of nastiness which fails horribly
> when the system runs fast enough to saturate the controller. The failure
> results in some pages (256B) not being written to the flash. This can be
> observed on systems wh
On 04/29/2016 11:35 AM, Stefan Roese wrote:
> Hi Marek,
>
> On 28.04.2016 00:36, Marek Vasut wrote:
>> The indirect write code is buggy pile of nastiness which fails horribly
>> when the system runs fast enough to saturate the controller. The failure
>> results in some pages (256B) not being writt
CONFIG_PREBOOT variable is breaking ./test/py framework.
Remove it.
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index c6a93de4bbd9..346318dcea4f 100644
--- a/
Add missing SPI flash options.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_ep_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/xilinx_zynqmp_ep_defconfig
b/configs/xilinx_zynqmp_ep_defconfig
index dbf490674dc5..903dc48d5423 100644
--- a/configs/xilinx_zynqmp_ep
Add the ability to read the phy-handle node of the
cpsw slave. Upon reading this handle the phy-id
can be stored based on the reg node in the DT.
The phy-handle also needs to be stored and passed
to the phy to access any phy data that is available.
Signed-off-by: Dan Murphy
---
v7 - Fixed chec
Add the ability to pass the phy-handle node offset
to the phy driver. This allows the phy driver
to access the DT subnode's data and parse accordingly.
Signed-off-by: Dan Murphy
Tested-by: Michal Simek
---
v7 - no changes from v6
drivers/net/zynq_gem.c | 15 ++-
1 file changed, 1
The code assumed that if the interface is not RGMII configured
then it must be SGMII configured. This device has the ability
to support most of the MII interfaces. Therefore add the
helper for SGMII and only configure the device if the interface is
configured for SGMII.
Signed-off-by: Dan Murphy
Add the device tree bindings and the accompanying documentation
for the TI DP83867 Giga bit ethernet phy driver.
The original document was from:
[commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
Signed-off-by: Dan Murphy
Reviewed-by: Mugunthan V N
---
v7 - no changes
Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.
This now aligns with the Linux kernel based on
commit e463d88c36d42211aa72ed76d32fb8bf37820ef1
Signed-off-by: Dan Murphy
Reviewed-by: Mugunthan V N
Reviewed-by: Michal Simek
---
v7 - no changes from v6
Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree. If the value is not set in the
devicetree then set the delay to the default.
If devicetree is not used then use the default defines within the
d
Add a helper to phy.h to identify whether the
phy is configured for SGMII all variables.
Signed-off-by: Dan Murphy
Reviewed-by: Mugunthan V N
Reviewed-by: Michal Simek
---
v7 - no changes from v6
include/phy.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/phy.h b/i
Hi Prafulla,
i've just received the new i.mx6 board from our hardware-development team
and i'm going to start board bringup.
One of the next things is to bring up ethernet.
I have a 88E6321 switch soldered down on the board, connected through
rgmii.
A quick look into u-boot's tree showed me th
From: Alex Porosanu
Some SOCs, specifically the ones in the C29x familiy can have
multiple security engines. This patch adds a system configuration
define which indicates the maximum number of SEC engines that
can be found on a SoC.
Signed-off-by: Alex Porosanu
---
arch/arm/include/asm/arch-fs
This series of patches add the neccesary support for allowing multi-SEC
SoCs, like the C292 & C293 to instantiate the respecting RNGs.
Alex Porosanu (3):
arch/arm: add SEC JR0 offset
arch/arm, arch/powerpc: add # of SEC engines on the SOC
crypto/fsl: add support for multiple SEC engines init
From: Alex Porosanu
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch
From: Alex Porosanu
For SoCs that contain multiple SEC engines, each of them needs
to be initialized (by means of initializing among others the
random number generator).
Signed-off-by: Alex Porosanu
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 ++
drivers/crypto/fsl/jr.c | 271 +++
Hi Stephen,
On 28 April 2016 at 09:55, Stephen Warren wrote:
> On 04/27/2016 10:50 PM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 26 April 2016 at 15:30, Stephen Warren wrote:
>> > It is possible for HW to contain multiple instances of the same device.
>> In
>> > this case, the name passed t
Hi Stephen,
On 28 April 2016 at 10:00, Stephen Warren wrote:
>
> On 04/27/2016 10:42 PM, Joe Hershberger wrote:
>>
>> On Tue, Apr 26, 2016 at 4:30 PM, Stephen Warren
>> wrote:
>>>
>>> From: Stephen Warren
>>>
>>> It is possible for HW to contain multiple instances of the same device. In
>>> th
Hi Stephen,
2016-04-21 19:43 GMT+02:00 Stephen Warren :
> On 04/18/2016 07:46 AM, Michal Simek wrote:
>
>> Hi Stephen and Simon,
>>
>> have you thought how to use test/py for testing OS boot?
>> I am not experienced with python to quickly hack it myself but in
>> general I think we should support
On 27 April 2016 at 13:51, Angelo Dureghello wrote:
> Boards can now use DM serial driver, or still legacy mcf uart
> driver version.
>
> Signed-off-by: Angelo Dureghello
> ---
> Changes for v2:
>- fixed commit message
>- added white lines in cmd/mmc.c
>- fixed help in cmd/mmc.c
> Cha
Hi Stephen,
On 27 April 2016 at 10:01, Stephen Warren wrote:
> On 04/27/2016 09:12 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 20 April 2016 at 17:28, Stephen Warren wrote:
>>>
>>> From: Stephen Warren
>>>
>>> Tegra186's GPIO controller register layout is significantly different
>>> from
On 27 April 2016 at 13:50, Angelo Dureghello wrote:
> To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used.
> So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and
> call to board_init_f_mem() is added for all cpu's.
>
> Signed-off-by: Angelo Dureghello
> ---
> Changes for v2:
>-
On 28 April 2016 at 16:04, Stephen Warren wrote:
> From: Stephen Warren
>
> Use the device's own DT offset, not the device's parent's.
>
> Fixes: 43c4d44e3330 ("fdt: implement dev_get_addr_name()")
> Signed-off-by: Stephen Warren
> ---
> drivers/core/device.c | 4 ++--
> 1 file changed, 2 inser
Hi Stephen,
On 27 April 2016 at 11:16, Stephen Warren wrote:
> On 04/27/2016 10:58 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 27 April 2016 at 10:24, Stephen Warren wrote:
>>>
>>> On 04/27/2016 09:12 AM, Simon Glass wrote:
Hi Stephen,
On 19 April 2016 at 14:59, St
Hi Stephen,
On 27 April 2016 at 10:13, Stephen Warren wrote:
> On 04/27/2016 08:50 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 25 April 2016 at 13:25, Stephen Warren wrote:
>>>
>>> On 04/23/2016 11:14 AM, Simon Glass wrote:
Hi Stephen,
On 19 April 2016 at 14:59, St
Does anyone with an OMAP3 board have any issues with this patch? I
will admit I haven't stayed on top of stuff due to moving, and other
issues at home, but I pulled down the master to reviews some on
related stuff, and found that master doesn't boot. I used git bisect
this morning and it narrowed
On Tue, Mar 15, 2016 at 10:10 PM, Masahiro Yamada
wrote:
> The function spl_parse_image_header() falls back to a raw image
> if the U-Boot header is missing and CONFIG_SPL_PANIC_ON_RAW_IMAGE
> is undefined. While, mmc_load_image_raw_sector() only accepts a
> U-Boot legacy image or an FIT image, p
On Wed, Apr 27, 2016 at 5:46 PM, Tom Rini wrote:
> While the OMAP3 has 64KiB of SRAM, per the TRM the download area is only
> from 0x4020 to 0x4020F000 and exceeding that will cause failure to
> boot. Further, we need to make sure that we don't run into
> SRAM_SCRATCH_SPACE_ADDR as once SPL i
On 29 April 2016 at 08:02, Simon Glass wrote:
> On 27 April 2016 at 13:50, Angelo Dureghello wrote:
>> To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used.
>> So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and
>> call to board_init_f_mem() is added for all cpu's.
>>
>> Signed-off-
On 29 April 2016 at 08:02, Simon Glass wrote:
> On 27 April 2016 at 13:51, Angelo Dureghello wrote:
>> Boards can now use DM serial driver, or still legacy mcf uart
>> driver version.
>>
>> Signed-off-by: Angelo Dureghello
>> ---
>> Changes for v2:
>>- fixed commit message
>>- added whit
On 04/29/2016 07:23 AM, Simon Glass wrote:
Hi Stephen,
On 28 April 2016 at 09:55, Stephen Warren wrote:
On 04/27/2016 10:50 PM, Simon Glass wrote:
Hi Stephen,
On 26 April 2016 at 15:30, Stephen Warren wrote:
> It is possible for HW to contain multiple instances of the same device.
In
>
On 04/29/2016 08:02 AM, Simon Glass wrote:
Hi Stephen,
On 27 April 2016 at 10:13, Stephen Warren wrote:
On 04/27/2016 08:50 AM, Simon Glass wrote:
Hi Stephen,
On 25 April 2016 at 13:25, Stephen Warren wrote:
On 04/23/2016 11:14 AM, Simon Glass wrote:
Hi Stephen,
On 19 April 2016 at 1
Hi Stephen,
On 29 April 2016 at 10:23, Stephen Warren wrote:
> On 04/29/2016 07:23 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 28 April 2016 at 09:55, Stephen Warren wrote:
>>>
>>> On 04/27/2016 10:50 PM, Simon Glass wrote:
Hi Stephen,
On 26 April 2016 at 15:30, St
On 04/29/2016 10:28 AM, Simon Glass wrote:
Hi Stephen,
On 29 April 2016 at 10:23, Stephen Warren wrote:
On 04/29/2016 07:23 AM, Simon Glass wrote:
Hi Stephen,
On 28 April 2016 at 09:55, Stephen Warren wrote:
On 04/27/2016 10:50 PM, Simon Glass wrote:
Hi Stephen,
On 26 April 2016 at 1
Hi Stephen,
On 29 April 2016 at 10:27, Stephen Warren wrote:
> On 04/29/2016 08:02 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 27 April 2016 at 10:13, Stephen Warren wrote:
>>>
>>> On 04/27/2016 08:50 AM, Simon Glass wrote:
Hi Stephen,
On 25 April 2016 at 13:25, St
Hi Stephen,
On 29 April 2016 at 10:30, Stephen Warren wrote:
> On 04/29/2016 10:28 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 29 April 2016 at 10:23, Stephen Warren wrote:
>>>
>>> On 04/29/2016 07:23 AM, Simon Glass wrote:
Hi Stephen,
On 28 April 2016 at 09:55, St
Hi Stephen,
On 29 April 2016 at 10:53, Simon Glass wrote:
> Hi Stephen,
>
> On 29 April 2016 at 10:27, Stephen Warren wrote:
>> On 04/29/2016 08:02 AM, Simon Glass wrote:
>>>
>>> Hi Stephen,
>>>
>>> On 27 April 2016 at 10:13, Stephen Warren wrote:
On 04/27/2016 08:50 AM, Simon Glass w
On Fri, Apr 29, 2016 at 09:59:00AM -0500, Adam Ford wrote:
> Does anyone with an OMAP3 board have any issues with this patch? I
> will admit I haven't stayed on top of stuff due to moving, and other
> issues at home, but I pulled down the master to reviews some on
> related stuff, and found that
On Fri, Apr 29, 2016 at 12:53 PM, Tom Rini wrote:
> On Fri, Apr 29, 2016 at 09:59:00AM -0500, Adam Ford wrote:
>
>> Does anyone with an OMAP3 board have any issues with this patch? I
>> will admit I haven't stayed on top of stuff due to moving, and other
>> issues at home, but I pulled down the m
On Fri, Apr 29, 2016 at 01:06:14PM -0500, Adam Ford wrote:
> On Fri, Apr 29, 2016 at 12:53 PM, Tom Rini wrote:
> > On Fri, Apr 29, 2016 at 09:59:00AM -0500, Adam Ford wrote:
> >
> >> Does anyone with an OMAP3 board have any issues with this patch? I
> >> will admit I haven't stayed on top of stuf
On 04/29/2016 11:42 AM, Simon Glass wrote:
Hi Stephen,
On 29 April 2016 at 10:53, Simon Glass wrote:
Hi Stephen,
On 29 April 2016 at 10:27, Stephen Warren wrote:
On 04/29/2016 08:02 AM, Simon Glass wrote:
Hi Stephen,
On 27 April 2016 at 10:13, Stephen Warren wrote:
On 04/27/2016 08:50
env library is broken as the config file pointer is only initialized
in main(). When running in the env library parse_config() fails:
Cannot parse config file '(null)': Bad address
Ensure that config file pointer is always initialized.
Signed-off-by: Anatolij Gustschin
Cc: Stefano Babic
---
i'm sure i'm just being an idiot here (pause for hysterical
laughter), but what is the precedence for overriding the partition
layout of flash using one of:
1) "mtdparts=" added to the kernel command line, or
2) using "fdt" command to hack DTB to change partition layout
the scenario is a per
Hi Teddy,
On 25 April 2016 at 10:25, Teddy Reed wrote:
> Hi all,
>
> I'm curious if anyone has a script (or if I've missed something within
> the verified-boot documentation) to compile a DTB given only public
> keying information, i.e., a x509 certificate.
>
> I have build/test bots that need to
From: Shaohui Xie
To use AQR105 PHY's interrupt, we need to invert the IRQ pin polarity by
setting relative bit in SCFG_INTPCR register, because AQR105 interrupt
is low active but GIC accepts high active.
Signed-off-by: Shaohui Xie
---
board/freescale/ls1043ardb/ls1043ardb.c | 4
include/
next step will
be pulling in the new core bindings that were never covered by ePAPR.
You can look at a draft copy of the document here:
https://github.com/kvekaria/devicetree-specification-released/blob/master/prerelease/DevicetreeSpecification-20160429-pre1.pdf
If you want to help out, the
On Fri, Apr 29, 2016 at 4:09 PM, Simon Glass wrote:
> Hi Teddy,
>
> On 25 April 2016 at 10:25, Teddy Reed wrote:
>> Hi all,
>>
>> I'm curious if anyone has a script (or if I've missed something within
>> the verified-boot documentation) to compile a DTB given only public
>> keying information, i.
- Move the command portion of arch/x86/cpu/qemu/fw_cfg.c into
cmd/qemu_fw_cfg.c
- Move arch/x86/include/asm/fw_cfg.h to include/qemu_fw_cfg.h
- Rename ACPI table portion to arch/x86/cpu/qemu/acpi_table.c
Signed-off-by: Tom Rini
---
The QEMU firmware interface is more generic feature than just x
was perusing the wiki page on "fdt":
http://www.denx.de/wiki/view/DULG/UBootCmdFDT
and it's fairly loaded with examples of commands that generate only
the error message:
libfdt fdt_path_offset() returned FDT_ERR_BADMAGIC
were those supposed to be eventually replaced by valid output?
rday
puzzled by this in cmd/fdt.c:
/* Temporary #ifdef - some archs don't have fdt_blob yet */
#ifdef CONFIG_OF_CONTROL
if (argc && !strcmp(*argv, "-c")) {
control = 1;
argc--;
argv++;
}
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