On Thu, Nov 12, 2015 at 07:36:02AM +0100, Ard Biesheuvel wrote:
> On 12 November 2015 at 06:43, Shawn Guo wrote:
> > Here are my questions:
> >
> > - Is this only because that ARM 64-bit toolchain doesn't show the real
> > value of the pointers, or there are some linking or run-time magics to
>
Hi Albert,
On Thu, Nov 12, 2015 at 08:20:18AM +0100, Albert ARIBAUD wrote:
> Can you provide the target name and commit ID that you are building,
> s well as the version of the toolchain that you are building with?
> Without being able to reproduce your issue, it's kind of hard to
> diagnose it.
Hi Albert,
On 2015年11月12日 15:17, Albert ARIBAUD wrote:
diff --git a/common/init/board_init.c b/common/init/board_init.c
index 8839a4a..703e6d8 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -46,6 +4
On Tue, Nov 10, 2015 at 2:24 AM, Lin Huang wrote:
> add rk3036 sdram driver so we can set up sdram in SPL
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1: None
> Changes in v2: None
> Changes in v3:
> - fix some code style error
> Changes in v4:
> - modify code advice by Simon Glass
> Changes
On Sunday 08 November 2015 07:01 PM, Tom Rini wrote:
> On Wed, Nov 04, 2015 at 01:46:17PM +0530, Mugunthan V N wrote:
>
>> Add qspi memory map and control module register maps to device tree.
>>
>> Signed-off-by: Mugunthan V N
>> Reviewed-by: Simon Glass
>> ---
>> arch/arm/dts/dra7.dtsi | 4 ++-
On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> Hi Mugunthan,
>
> On 4 November 2015 at 01:16, Mugunthan V N wrote:
>> Add compatible for spansion 32MiB spi flash s25fl256s1.
>>
>> Signed-off-by: Mugunthan V N
>> ---
>> drivers/mtd/spi/sf_probe.c | 1 +
>> 1 file changed, 1 insertion(
On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> Hi Mugunthan,
>
> On 4 November 2015 at 01:16, Mugunthan V N wrote:
>> > Since spl doesn't support DM currently, do not define DM_SPI and
>> > DM_SPI_FLASH for spl build.
> Do you mean 'Since OMAP's SPL doesn't support...'?
>
Right, for
On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> Hi Mugunthan,
>
> On 4 November 2015 at 01:16, Mugunthan V N wrote:
>> > Since spl doesn't support DM currently, do not define DM_SPI and
>> > DM_SPI_FLASH for spl build.
> Since spl doesn't support DM currently on OMAP?
>
> It is support
On Sunday 08 November 2015 07:02 PM, Tom Rini wrote:
> On Wed, Nov 04, 2015 at 01:46:23PM +0530, Mugunthan V N wrote:
>> Add qspi memory map address to device tree.
>>
>> Signed-off-by: Mugunthan V N
>> Reviewed-by: Simon Glass
>> ---
>> arch/arm/dts/am4372.dtsi | 4 +++-
>> 1 file changed, 3 in
On Friday 06 November 2015 09:11 PM, Stephen Warren wrote:
> On 11/06/2015 05:19 AM, Stefan Roese wrote:
>> +Stephan Warren & Thomas Chou
>>
>> On 06.11.2015 13:08, Simon Glass wrote:
>>> +Stefan
>>>
>>> Hi Mugunthan,
>>>
>>> On 4 November 2015 at 07:25, Mugunthan V N wrote:
Based on the OF_T
On Tuesday 10 November 2015 11:52 AM, Vignesh R wrote:
> Enable TI_EDMA3 and QUAD read support for ti_qspi on am43xx, this
> increases read performance to 4 MB/s.
>
> Signed-off-by: Vignesh R
> ---
Reviewed-by: Mugunthan V N
Regards
Mugunthan V N
___
On Tuesday 10 November 2015 11:52 AM, Vignesh R wrote:
> Add dummy readl after invalidating cmd field of QSPI_CMD_REG to ensure
> bus sync. Without this device's CS is not deactivated reliably leading
> to failure to enumerate flash or failure to set quad enable bit on
> Macronix flash present on a
Hello Thomas,
On Thu, 12 Nov 2015 16:28:38 +0800, Thomas Chou
wrote:
> Hi Albert,
>
> On 2015年11月12日 15:17, Albert ARIBAUD wrote:
> >>
> >> diff --git a/common/init/board_init.c b/common/init/board_init.c
> >> index 8839a4a
On Thu, Nov 12, 2015 at 02:33:48PM +0530, Mugunthan V N wrote:
> On Sunday 08 November 2015 07:01 PM, Tom Rini wrote:
> > On Wed, Nov 04, 2015 at 01:46:17PM +0530, Mugunthan V N wrote:
> >
> >> Add qspi memory map and control module register maps to device tree.
> >>
> >> Signed-off-by: Mugunthan
On Thu, Nov 12, 2015 at 02:42:41PM +0530, Mugunthan V N wrote:
> On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> > Hi Mugunthan,
> >
> > On 4 November 2015 at 01:16, Mugunthan V N wrote:
> >> Add compatible for spansion 32MiB spi flash s25fl256s1.
> >>
> >> Signed-off-by: Mugunthan V N
Hi Albert,
On Thu, Nov 12, 2015 at 4:57 AM, Albert ARIBAUD
wrote:
> I could whip up an RFC patch (with ARM support, to be extended to other
> platforms as my recent experience showed I'm not that good at NIOS2 for
> instance) if people are interested.
I would be glad to test such patch, thanks.
Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.
Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.
In board_init_f_mem() there was a deliber
Add some text to clarify the usage of full malloc (when
CONFIG_SYS_SPL_MALLOC_START is selected) and also that simple malloc()
can be used prior to DRAM initialization if CONFIG_SYS_MALLOC_F is defined.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Improve README and commit log (Simon)
R
Convert to use driver model keyboard on Intel Crown Bay.
Signed-off-by: Bin Meng
---
arch/x86/dts/crownbay.dts | 1 +
include/configs/crownbay.h | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 3e354c4..eb8421c 10
Currently keyboard's LED state is wrongly saved to config->leds in
process_modifier(). It should really be config->flags.
Signed-off-by: Bin Meng
---
drivers/input/input.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index bf1
We should request keyboard to turn on/off its LED when detecting
any changes on the LEDs.
Signed-off-by: Bin Meng
---
drivers/input/input.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 79edda5..0926de5 100644
--- a/drivers/inpu
When sending LED update command to an i8042 compatible keyboard,
bit1 is 'Num Lock' and bit2 is 'Caps Lock' in the data byte. But
input library defines bit1 as 'Caps Lock' and bit2 as 'Num Lock'.
This causes a wrong LED to be set on an i8042 compatible keyboard.
Change the LED state bits to be i804
Convert to use driver model keyboard on QEMU.
Signed-off-by: Bin Meng
---
arch/x86/dts/qemu-x86_i440fx.dts | 1 +
arch/x86/dts/qemu-x86_q35.dts| 1 +
include/configs/qemu-x86.h | 2 +-
3 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arc
When 'Num Lock' is not on, we should not send these digit numbers
(0-9 and dot) to the output buffer.
Signed-off-by: Bin Meng
---
drivers/input/input.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 5c3fad9..23afd06 100644
--- a/dri
Hi Simon,
On Thu, Nov 12, 2015 at 11:56 AM, Bin Meng wrote:
> Hi Simon,
>
> On Thu, Nov 12, 2015 at 5:56 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 11 November 2015 at 10:05, Simon Glass wrote:
>>> This series adds a new uclass for keyboards and converts some drivers
>>> over to use it.
>>>
>>>
On Thu, Nov 12, 2015 at 1:05 AM, Simon Glass wrote:
> Move all the '!release' code into one block so that it is clear that it only
> applies on key release.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/input/input.c | 27 ++---
Hello Fabio,
On Thu, 12 Nov 2015 11:10:11 -0200, Fabio Estevam
wrote:
> Add some text to clarify the usage of full malloc (when
> CONFIG_SYS_SPL_MALLOC_START is selected) and also that simple malloc()
> can be used prior to DRAM initialization if CONFIG_SYS_MALLOC_F is defined.
>
> Signed-off-by
Extend comments with register offset to help with debuggging.
Signed-off-by: Michal Simek
Acked-by: Joe Hershberger
---
Changes in v2: None
drivers/net/zynq_gem.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/driv
Previous loop was completely bogus. Iterration should go just over
statistic counters.
Signed-off-by: Michal Simek
Acked-by: Joe Hershberger
---
Changes in v2: None
drivers/net/zynq_gem.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drive
From: "Edgar E. Iglesias"
Zynq has no priority queues.
ZynqMP has one priority queue and this change is required
to get ethernet working.
This patch was not needed on ep108 for uknown reason even
it should be used.
Tested on Zynq and ZynqMP.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Micha
On Thu, Nov 12, 2015 at 1:05 AM, Simon Glass wrote:
> When caps lock is enabled we should convert lower case to upper case. Add
> this to the input key processing so that caps lock works correctly.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/inp
On Thu, Nov 12, 2015 at 1:05 AM, Simon Glass wrote:
> Add a function which returns a new keyboard LED value when the LEDs need
> updating.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/input/input.c | 9 +
> include/input.h | 14 +++
On Thu, Nov 12, 2015 at 1:05 AM, Simon Glass wrote:
> At present the i8042 driver has its own logic and keymaps. In an effort to
> unify the code, move it over to use the input library. This changes most of
> the keycode-processing logic since it is now in that library. The main
> responsibilities
On Thu, Nov 12, 2015 at 1:05 AM, Simon Glass wrote:
> Adjust this driver to support driver model. The only users are x86 boards
> so this should be safe.
>
> Signed-off-by: Simon Glass
> ---
>
Reviewed-by: Bin Meng
Tested-by: Bin Meng
> Changes in v3: None
> Changes in v2: None
>
> drivers/i
Hi,
On 11-11-15 19:15, Simon Glass wrote:
Hi Hans,
On 11 November 2015 at 10:02, Hans de Goede wrote:
Ok, I've ran a whole battery of tests on your u-boot-dm/usb-working branch.
Thanks!
There are 2 issues:
1) You need to add these change to the commit introducing usb-keyb dm
support
Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.
Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.
In board_init_f_mem() there was a deliber
On Thu, Nov 12, 2015 at 02:41:45PM +0100, Albert ARIBAUD wrote:
> Hello Fabio,
>
> On Thu, 12 Nov 2015 11:10:11 -0200, Fabio Estevam
> wrote:
> > Add some text to clarify the usage of full malloc (when
> > CONFIG_SYS_SPL_MALLOC_START is selected) and also that simple malloc()
> > can be used prio
On Wed, Nov 11, 2015 at 02:34:26PM +0800, Sonic Zhang wrote:
> Hi Tom,
>
> Please pull the following patches for Blackfin from u-boot-blackfin
> into your tree.
>
> Thanks
>
> Sonic Zhang
>
>
> The following changes since commit 83bf005710a1e01341de5e2f44a3ce082717e313:
>
> arm: at91: rewo
From: Stephen Warren
p2371-2180 is the engineering board name for the Jetson TX1 developer
kit. Update Kconfig description and help text to make this obvious to
everyone.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/tegra210/Kconfig | 10 +-
1 file changed, 5 insertions(+), 5
Hi Albert,
On 11 November 2015 at 23:57, Albert ARIBAUD wrote:
> Hello Simon,
>
> On Wed, 11 Nov 2015 14:49:05 -0700, Simon Glass
> wrote:
>> Hi Fabio,
>>
>> On 11 November 2015 at 14:24, Fabio Estevam
>> wrote:
>> > Hi Simon,
>> >
>> > On Wed, Nov 11, 2015 at 7:08 PM, Simon Glass
>> > wrote:
I'll add this to the PR I'm preparing.
> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Thursday, November 12, 2015 8:58 AM
> To: u-boot@lists.denx.de; Simon Glass ; Tom Warren
> ; Stephen Warren
> Subject: [PATCH] ARM: tegra: note that p2371-2180 is Jets
On 12 November 2015 at 08:58, Stephen Warren wrote:
> From: Stephen Warren
>
> p2371-2180 is the engineering board name for the Jetson TX1 developer
> kit. Update Kconfig description and help text to make this obvious to
> everyone.
>
> Signed-off-by: Stephen Warren
> ---
> arch/arm/mach-tegra/
Hi Stephen,
On 21 October 2015 at 14:46, Stephen Warren wrote:
> On 10/17/2015 11:50 AM, Simon Glass wrote:
>>
>> Adjust the Tegra PCI driver to support driver model and move all boards
>> over
>> at the same time. This can make use of some generic driver model code,
>> such
>> as the range decod
This series converts all Tegra boards to use driver model for PCI. The net
effect should be no change in functionality.
A few additional features are added to make this possible:
- Helper functions to support accessing 8- and 16-bit values within a 32-bit
word
- Fixing a build error for CONFIG_C
Move this option to Kconig and fix up all users.
Signed-off-by: Simon Glass
---
Changes in v2: None
configs/apalis_t30_defconfig | 1 +
configs/beaver_defconfig | 1 +
configs/cardhu_defconfig | 1 +
configs/jetson-tk1_defconfig | 1 +
configs/trimslice_defconfig | 1 +
drivers/p
This is not supported with driver model, so print a message instead of
generating a build error. Rescanning PCI is not yet implemented.
This function will be implemented later once some additional PCI driver
model improvements are merged. It was confirmed on the mailing list
that no one on the teg
SDRAM doesn't always start at 0. Adjust the region mapping so that it works
on platforms where SDRAM is somewhere else.
This needs testing on other platforms.
Signed-off-by: Simon Glass
---
Changes in v2:
- Rename 'addr' to 'size'
- Correct logic for use of gd->pci_ram_top
drivers/pci/pci-ucl
At present we add a new resource entry for every range entry. But some range
entries refer to configuration regions. To make this work, avoid adding two
regions of the same type. The later ranges will overwrite the earlier
(configuration) ones.
There does not seem to be a way to distinguish the co
Provide a few functions to support using 32-bit access to emulate 8- and
16-bit access.
Signed-off-by: Simon Glass
Reviewed-by: Stephen Warren
---
Changes in v2: None
drivers/pci/pci-uclass.c | 39 +++
include/pci.h| 31 +
Adjust the Tegra PCI driver to support driver model and move all boards over
at the same time. This can make use of some generic driver model code, such
as the range-decoding logic.
Signed-off-by: Simon Glass
---
Changes in v2:
- Leave pci_skip_dev() at the bottom of the file to reduce the diff
This function looks up the controller and returns a pointer to each region
type.
Signed-off-by: Simon Glass
Acked-by: Stephen Warren
---
Changes in v2: None
drivers/pci/pci-uclass.c | 30 ++
include/pci.h| 12
2 files changed, 42 insertions
A PCI bus may be a bridge device where the controller is the bridge's
parent. Add a function to return the controller device, given a PCI device.
Signed-off-by: Simon Glass
Acked-by: Stephen Warren
---
Changes in v2:
- Use the device_is_on_pci_bus() API
drivers/pci/pci-uclass.c | 8
+Graeme
On 10 November 2015 at 19:13, Bin Meng wrote:
>
> This updates git-mailrc to add me as a maintainer of x86.
>
> Signed-off-by: Bin Meng
> ---
>
> doc/git-mailrc | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Acked-by: Simon Glass
Maybe we should drop gruss at some point? G
Hello Simon,
On Thu, 12 Nov 2015 08:59:54 -0700, Simon Glass
wrote:
> Hi Albert,
>
> On 11 November 2015 at 23:57, Albert ARIBAUD
> wrote:
> > Hello Simon,
> >
> > On Wed, 11 Nov 2015 14:49:05 -0700, Simon Glass
> > wrote:
> >> Hi Fabio,
> >>
> >> On 11 November 2015 at 14:24, Fabio Estevam
Hi,
On 10 November 2015 at 08:34, Nishanth Menon wrote:
> On 11/10/2015 08:55 AM, Nishanth Menon wrote:
>> On 12:25-20151110, Masahiro Yamada wrote:
>>> 2015-11-10 5:24 GMT+09:00 Simon Glass :
>> I am unhappy because I was hoping
>> we could stop creating symbolic links during building
>>
Simon,
> -Original Message-
> From: Simon Glass [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: Thursday, November 12, 2015 9:07 AM
> To: U-Boot Mailing List
> Cc: Tom Warren ; Stephen Warren
> ; Stephen Warren ; Simon
> Glass ; Marek Vasut ; Pavel
> Herrmann
> Subject: [PATCH
On Thu, Nov 12, 2015 at 09:16:00AM -0700, Simon Glass wrote:
> Hi,
>
> On 10 November 2015 at 08:34, Nishanth Menon wrote:
> > On 11/10/2015 08:55 AM, Nishanth Menon wrote:
> >> On 12:25-20151110, Masahiro Yamada wrote:
> >>> 2015-11-10 5:24 GMT+09:00 Simon Glass :
> >> I am unhappy because I
On 29/10/2015 19:36, Otavio Salvador wrote:
> On Thu, Oct 29, 2015 at 4:27 PM, Karsten Merker wrote:
>> if the legacy environment gets removed anyway, I would like to propose
>> changing the console variable to "console=ttymxc0,115200" to bring it
>> in line with the other boards using distro_boot
On 27/10/2015 21:18, Vagrant Cascadian wrote:
> This allows for more flexible and standardized boot across multiple
> platforms.
>
> Remove redundant legacy boot environment.
>
> Cc: Otavio Salvador
> Signed-off-by: Vagrant Cascadian
> ---
Applied to u-boot-imx, thanks !
Best regards,
Stefano
On 11/11/2015 18:05, Stefano Babic wrote:
> On 11/11/2015 02:14, Peng Fan wrote:
>> Hi Stefano,
>>
>> On Tue, Nov 10, 2015 at 02:14:10PM +0100, Albert ARIBAUD wrote:
>>> Hello Peng,
>>>
>>> On Fri, 23 Oct 2015 10:13:03 +0800, Peng Fan
>>> wrote:
The code such as PSCI in section named secure i
On 10/11/2015 20:54, Marek Vasut wrote:
> The kernel_addr_r should be set to the same value as CONFIG_LOADADDR,
> get rid of the duplication.
>
> Signed-off-by: Marek Vasut
> Cc: Sean Cross
> Cc: Stefano Babic
> ---
> include/configs/novena.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletio
On 11/11/2015 10:28 PM, Scott Wood wrote:
> On Wed, 2015-11-11 at 19:34 -0800, York Sun wrote:
>>
>> On 11/11/2015 06:17 PM, Thomas Chou wrote:
>>> Hi York,
>>>
>>> On 2015年11月12日 06:50, York Sun wrote:
diff --git a/include/asm-generic/global_data.h b/include/asm
-generic/global_data.h
On 11/11/2015 11:35 PM, Joakim Tjernlund wrote:
> On Thu, 2015-11-05 at 12:47 -0800, York Sun wrote:
>>
>> On 11/05/2015 11:53 AM, Joakim Tjernlund wrote:
>>> On Thu, 2015-11-05 at 10:29 -0800, York Sun wrote:
On 11/05/2015 10:19 AM, Joakim Tjernlund wrote:
> On Thu, 2015-11-05 at 0
On 11/12/2015 10:22 AM, Tom Rini wrote:
> On Thu, Nov 12, 2015 at 09:16:00AM -0700, Simon Glass wrote:
>> Hi,
>>
>> On 10 November 2015 at 08:34, Nishanth Menon wrote:
>>> On 11/10/2015 08:55 AM, Nishanth Menon wrote:
On 12:25-20151110, Masahiro Yamada wrote:
> 2015-11-10 5:24 GMT+09:00 S
On 11/12/2015 09:16 AM, Tom Warren wrote:
Simon,
-Original Message-
From: Simon Glass [mailto:s...@google.com] On Behalf Of Simon Glass
Sent: Thursday, November 12, 2015 9:07 AM
To: U-Boot Mailing List
Cc: Tom Warren ; Stephen Warren
; Stephen Warren ; Simon
Glass ; Marek Vasut ; Pavel
Hi Tom,
On 12 November 2015 at 09:16, Tom Warren wrote:
> Simon,
>
>> -Original Message-
>> From: Simon Glass [mailto:s...@google.com] On Behalf Of Simon Glass
>> Sent: Thursday, November 12, 2015 9:07 AM
>> To: U-Boot Mailing List
>> Cc: Tom Warren ; Stephen Warren
>> ; Stephen Warren ;
Hi Nishanth,
On 12 November 2015 at 09:45, Nishanth Menon wrote:
> On 11/12/2015 10:22 AM, Tom Rini wrote:
>> On Thu, Nov 12, 2015 at 09:16:00AM -0700, Simon Glass wrote:
>>> Hi,
>>>
>>> On 10 November 2015 at 08:34, Nishanth Menon wrote:
On 11/10/2015 08:55 AM, Nishanth Menon wrote:
>
Stephen,
> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Thursday, November 12, 2015 9:42 AM
> To: Tom Warren
> Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Stephen Warren ; Marek Vasut
> ; Pavel Herrmann
> Subject: Re: [PATCH v2 8/8] dm:
Move this option to Kconig and fix up all users.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
configs/apalis_t30_defconfig | 1 +
configs/beaver_defconfig | 1 +
configs/cardhu_defconfig | 1 +
configs/jetson-tk1_defconfig | 1 +
configs/trimslice_defconfi
This is not supported with driver model, so print a message instead of
generating a build error. Rescanning PCI is not yet implemented.
This function will be implemented later once some additional PCI driver
model improvements are merged. It was confirmed on the mailing list
that no one on the teg
Provide a few functions to support using 32-bit access to emulate 8- and
16-bit access.
Signed-off-by: Simon Glass
Reviewed-by: Stephen Warren
---
Changes in v3: None
Changes in v2: None
drivers/pci/pci-uclass.c | 39 +++
include/pci.h| 31 +
This function looks up the controller and returns a pointer to each region
type.
Signed-off-by: Simon Glass
Acked-by: Stephen Warren
---
Changes in v3: None
Changes in v2: None
drivers/pci/pci-uclass.c | 30 ++
include/pci.h| 12
2 files ch
Adjust the Tegra PCI driver to support driver model and move all boards over
at the same time. This can make use of some generic driver model code, such
as the range-decoding logic.
Signed-off-by: Simon Glass
---
Changes in v3:
- Rebase onto tegra/master
- Enable DM_PCI for Tegra 210 family too
Simon,
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: Thursday, November 12, 2015 9:52 AM
> To: Tom Warren
> Cc: U-Boot Mailing List ; Stephen Warren
> ; Stephen Warren ; Marek
> Vasut ; Pavel Herrmann
>
> Subject: Re: [PATCH v2 8/8
A PCI bus may be a bridge device where the controller is the bridge's
parent. Add a function to return the controller device, given a PCI device.
Signed-off-by: Simon Glass
Acked-by: Stephen Warren
---
Changes in v3: None
Changes in v2:
- Use the device_is_on_pci_bus() API
drivers/pci/pci-ucl
SDRAM doesn't always start at 0. Adjust the region mapping so that it works
on platforms where SDRAM is somewhere else.
This needs testing on other platforms.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Rename 'addr' to 'size'
- Correct logic for use of gd->pci_ram_top
At present we add a new resource entry for every range entry. But some range
entries refer to configuration regions. To make this work, avoid adding two
regions of the same type. The later ranges will overwrite the earlier
(configuration) ones.
There does not seem to be a way to distinguish the co
Hi,
On 12 November 2015 at 09:58, Tom Warren wrote:
> Stephen,
>
>> -Original Message-
>> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
>> Sent: Thursday, November 12, 2015 9:42 AM
>> To: Tom Warren
>> Cc: Simon Glass ; U-Boot Mailing List > b...@lists.denx.de>; Stephen Warren ; Ma
This series converts all Tegra boards to use driver model for PCI. The net
effect should be no change in functionality.
A few additional features are added to make this possible:
- Helper functions to support accessing 8- and 16-bit values within a 32-bit
word
- Fixing a build error for CONFIG_C
On Thu, Nov 12, 2015 at 09:56:26AM -0700, Simon Glass wrote:
> Hi Nishanth,
>
> On 12 November 2015 at 09:45, Nishanth Menon wrote:
> > On 11/12/2015 10:22 AM, Tom Rini wrote:
> >> On Thu, Nov 12, 2015 at 09:16:00AM -0700, Simon Glass wrote:
> >>> Hi,
> >>>
> >>> On 10 November 2015 at 08:34, Nis
Hi Vagrant,
On 27/10/2015 21:18, Vagrant Cascadian wrote:
> This allows for more flexible and standardized boot across multiple
> platforms.
>
> Remove redundant legacy boot environment.
>
I have applied it. However, the patch generates a warning due to
CONFIG_BOOT_DELAY, that is defined twice.
On 2015-11-12, Stefano Babic wrote:
> On 27/10/2015 21:18, Vagrant Cascadian wrote:
>> This allows for more flexible and standardized boot across multiple
>> platforms.
>>
>> Remove redundant legacy boot environment.
>>
>
> I have applied it.
Thanks!
> However, the patch generates a warning du
The Cyclone V Hard Processor System Technical Reference Manual in the
chapter about the Reset Manager Module Address Map stats that the offset
of the tstscratch register ist 0x54 not 0x24.
Cyclone V Hard Processor System Technical Reference Manual cv_5v4 2015.11.02
page 3-17 Reset Manager Module A
On A83T, PB9,PB10 are UART0 pins.
On allwinner A83T Dev board(h8homlet), this uart0 serial connector
is exposed.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/board.c | 4
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/arch/ar
Allwinner A83T is octa-core cortex-a7 SOC.
This enables support for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 11 ++-
include/configs/sun8i.h | 2 ++
3 files changed, 14 insertions(+), 1 delet
AXP818 is rsb based PMIC and used on Allwinner A83T H8 Homlet dev board.
It's registers are different and calculating reg config is different than
that of earlier axp power ICs.
DCDC1, DCDC2, DCDC3 and DCDC5 is implemented at the moment.
all other voltages can be added subsequently.
AXP datasheet
This patch series adds basic support for Allwinner A83T SOC.
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores each,
similar to A80.
Only basic clocks are ena
When smp is enabled for A83T, intermittent hang is observed after booting
kernel.
for now do not enable the smp for CPU0. This has to be fixed.
Also, fixed the space at line start warning at these two lines.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/board.c | 4 ++--
1 file cha
Add basic clocks pll1, pll5, and some default values from allwinner u-boot.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/Makefile | 4 +
arch/arm/cpu/armv7/sunxi/clock_sun8i_a83t.c| 133 +
arch/arm/include/asm/arch-sunxi/clock.h| 4 +
Enabled support for AXP818 in SPL and u-boot.
DCDC1, DCDC2, DCDC3 and DCSC5 are enabled.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/pmic_bus.c | 15 +++
board/sunxi/board.c | 8
include/configs/sunx
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
This is not yet included in kernel.
Signed-off-by: Vishnu Patekar
---
arch/arm/dts/sun8i-a83t.dtsi | 247 +++
1 file changed, 247 insertio
Add dts and defconfig for h8homletv2 board.
H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
It has UART, ethernet, USB, HDMI, etc ports on it.
A83T patches are tested on this board.
For FEL mode it needs USB A-A(Male) cable. I used uart0 which
is multiplexed to microsd pins PF2 and PF4
Add support for A83T dram. Register are different from sun8i A33.
init code is similar to A33 dram init.
hope we'll shift duplicate code in dram_sun8i_*
to dram helper in future.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/Makefile | 2 +
arch/arm/cpu/armv7/sunxi
Currently, there no display support for A83T.
Signed-off-by: Vishnu Patekar
---
board/sunxi/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index ea69bf7..8dc3499 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -376,6 +376,7 @@
On Thursday, November 12, 2015 at 06:23:10 PM, Philipp Rosenberger wrote:
> The Cyclone V Hard Processor System Technical Reference Manual in the
> chapter about the Reset Manager Module Address Map stats that the offset
> of the tstscratch register ist 0x54 not 0x24.
>
> Cyclone V Hard Processor
On Tue, Nov 03, 2015 at 05:48:34PM +0200, Francois Retief wrote:
> This patch series is a backlog of preparation work for upcomming
> generic board changes.
>
> I first want to get these reviewed and submitted to mainline before
> sending out more patches.
Something seriously broke all of the wh
On Wed, Nov 04, 2015 at 07:25:29PM -0600, Adam Ford wrote:
> >From 3af52a1a6d71ac3d78e0dec56da2fd8eb07a91d1 Mon Sep 17 00:00:00 2001
> From: Adam Ford
> Date: Wed, 4 Nov 2015 17:13:15 -0600
> Subject: [PATCH] omap3_logic: Cleanup and remove redundant defines make bootz
> easier
>
> Some unnece
On Sat, Nov 07, 2015 at 06:19:28AM -0600, Adam Ford wrote:
> >From 83fc9aee5fa80a3f671966e0ca9569eeb372b160 Mon Sep 17 00:00:00 2001
> From: Adam Ford
> Date: Sat, 7 Nov 2015 05:52:10 -0600
> Subject: [PATCH 41/41] ARM: omap3_logic: Fix pin muxing
>
> Enhance pin muxing to enable more board feat
On 12 November 2015 at 06:33, Bin Meng wrote:
> We should request keyboard to turn on/off its LED when detecting
> any changes on the LEDs.
>
> Signed-off-by: Bin Meng
> ---
>
> drivers/input/input.c | 9 +
> 1 file changed, 9 insertions(+)
Acked-by: Simon Glass
___
On 12 November 2015 at 06:33, Bin Meng wrote:
> When 'Num Lock' is not on, we should not send these digit numbers
> (0-9 and dot) to the output buffer.
>
> Signed-off-by: Bin Meng
> ---
>
> drivers/input/input.c | 6 ++
> 1 file changed, 6 insertions(+)
Acked-by: Simon Glass
__
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