Hi,
With commit 7ae8350f67eea("ti: armv7: Move SPL SDRAM init to the right
place, drop unused CONFIG_SPL_STACK") QSPI XIP boot appears to be broken
on AM437x SK EVM.
Following UART initialization code (as indicated by TODO) causes the XIP
boot failure.
In arch/arm/cpu/armv7/am33xx/board.c:
@@ -
From: "Edgar E. Iglesias"
Code is taken from Linux kernel driver.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Michal Simek
---
Changes in v2:
- Add missing function declaration to phy.h
- Remove BIT macro and fix macro indentation
- Remove comment about moving code to generic location
- F
Enable TI phy for Xilinx ZynqMP platform.
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 36c11009fc3d..574f788500bf 100644
--- a/include/configs/xilinx_zy
since different rockchip soc need different spl file,
so rename board-spl.c.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/mach-rockchip/Makefile | 2 +-
arch/arm/mach-
some rockchips soc will not use uclass in SPL stage,
so define config to decide whether to build common.c
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/mach-rockchip/Makefile | 2 +
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in v3:
- fix some coding style
Changes in v4:
This series patch bring up rk3036 uboot, since rk3036 only 4K size
SRAM for SPL, so in SPL stage only support timer, uart, sdram driver,
and back to bootrom when finish ddr initial, and boot up second stage
from bootrom.You can boot to command line(mmc info etc) for now use
this patchset.
Jeffy Ch
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
Changes in v4: None
Changes in v5: None
configs/chromebook_jerry_defconfig | 2 ++
configs/firefly-rk32
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
Changes in v4: None
Changes in v5: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_rockchip.c
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Changes in v3: None
Changes in v4: None
Changes
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3: None
Changes in v4
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/i
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
Changes in v4: None
Changes in v5: None
drivers/pinctrl/Kconfig
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in v3: None
Changes in v4: None
Changes in v
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/mach-rockch
some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.
Signed-off-by: Lin Huang
---
drivers/mmc/dw_mmc.c | 81 +++-
include/dwmmc.h | 5
2 files changed, 72 insertions(+), 14 delet
add rk3036 sdram driver so we can set up sdram in SPL
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix some code style error
Changes in v4:
- modify code advice by Simon Glass
Changes in v5:
- Advice by Simon:
- move some global variables to local variable
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
Changes in v4: None
Changes in v5: None
arch/arm/include/asm/arch-rockchip/uart.h | 44 +++
rk3036 mmc do not have internal dma, so we use fifo mode when read
and write data, we get the fifo mode and fifo depth property from
dts, pass to dw_mmc driver.
Signed-off-by: Lin Huang
---
arch/arm/dts/rk3036.dtsi | 1 +
drivers/mmc/rockchip_dw_mmc.c | 28 ++--
2 f
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang
---
Changes in v1:
- cle
This add some basic files required to allow the board to dispaly
serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- get sdram info from evb_rk3036.c
Changes in v3:
- delete some config
Changes in v4: None
Ch
From: Jeffy Chen
Our chips may have different sram size limits and chip tag, so
we need to add configs for that.
Signed-off-by: Jeffy Chen
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5:
- Adviced by Simon:
- move CONFIG_ROCKCHIP_MAX_INIT_SIZE
show how to packet rk3036 uboot image and boot from SD
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4:
- fix some spell error
Changes in v5:
- Adviced by Simon:
- add evb rk3036 board to supported boards
doc/README.rockchip | 11 ++
From: Jeffy Chen
The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes
On 11/09/2015 09:03 PM, Tom Rini wrote:
> On Mon, Nov 09, 2015 at 10:45:07AM +0100, Michal Simek wrote:
>
>> CONFIG_OF_EMBED=y is the option which is here only for testing purpose
>> and shouldn't be enabled by default as is describe at:
>> "dts: Add a comment about CONFIG_OF_EMBED being for local
On 11/02/2015 10:15 PM, Joe Hershberger wrote:
> Hi Michal,
>
> On Tue, Oct 27, 2015 at 10:04 AM, Michal Simek
> wrote:
>> From: "Edgar E. Iglesias"
>>
>> Code is taken from Linux kernel driver.
>>
>> Signed-off-by: Edgar E. Iglesias
>> Signed-off-by: Michal Simek
>> ---
>>
>> drivers/net/ph
Please ignore this patch, I just saw some Freescale internal changes, the patch
is obsolete.
Best Regards,
Shaohui Xie
> -Original Message-
> From: shh@gmail.com [mailto:shh@gmail.com]
> Sent: Tuesday, November 10, 2015 7:12 PM
> To: u-boot@lists.denx.de; Sun York-R58495
> Cc: X
Hello Vignesh,
On Tue, 10 Nov 2015 14:29:54 +0530, Vignesh R wrote:
> Hi,
>
> With commit 7ae8350f67eea("ti: armv7: Move SPL SDRAM init to the right
> place, drop unused CONFIG_SPL_STACK") QSPI XIP boot appears to be broken
> on AM437x SK EVM.
>
> Following UART initialization code (as indicate
Hello York,
On Mon, 9 Nov 2015 15:54:39 -0800, York Sun
wrote:
> I didn't hear from you so I went ahead to implement the change. Please review
> the patches, coming soon.
Will do.
[BTW, I have no firm opinion on running U-Boot in secure or non-secure
mode -- I'm from the generation to whom a b
Add 3c120 and 10m50 devboards MAINTAINERS
Signed-off-by: Thomas Chou
---
board/altera/nios2/MAINTAINERS | 13 +
1 file changed, 13 insertions(+)
create mode 100644 board/altera/nios2/MAINTAINERS
diff --git a/board/altera/nios2/MAINTAINERS b/board/altera/nios2/MAINTAINERS
new file m
Rename board nios2-generic to 3c120_devboard. Since nios2 is
converted to driver model and device tree control of u-boot,
the nios2-generic board directory is removed. We can rename
the board back to a real board name. Now the boards maintained
in u-boot mainline are the same as Linux kernel, namel
This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49.
This commit causes cgtqmx6eval to not boot anymore:
U-Boot SPL 2015.10-00527-g8800bee (Nov 09 2015 - 21:23:54)
mxc_spi: SPI Slave not allocated !
Signed-off-by: Fabio Estevam
---
arch/arm/lib/crt0.S | 28
On Tue, Nov 10, 2015 at 11:02:56AM +0100, Michal Simek wrote:
> From: "Edgar E. Iglesias"
>
> Code is taken from Linux kernel driver.
Which kernel tag / git hash? Makes future re-syncs for bug fixes
easier.
--
Tom
signature.asc
Description: Digital signature
___
Hello,
An all-ARM buildman on current ARM or mainline ToT (commit
7bdf75ca) causes the following warnings:
WARNING: no status info for 'am335x_gp_evm'
WARNING: no maintainers for 'am335x_gp_evm'
WARNING: no status info for 'dra74_evm'
WARNING: no maintainers for 'dra74_evm'
WARNING: no status inf
From: "Edgar E. Iglesias"
Code is taken from Linux kernel driver (v4.2).
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Michal Simek
---
Changes in v3:
- Add kernel version tag to the commit message - reported by Tom
Changes in v2:
- Add missing function declaration to phy.h
- Remove BIT ma
On Fri, Oct 30, 2015 at 04:23:49PM +0800, Peng Fan wrote:
>Hi Albert,
>
>Are you fine with this patch?
>
>I'd like the patch go through i.MX tree, since the other two patches
>needs this patch to work.
Ping..
Thanks,
Peng.
>
>Thanks,
>Peng.
>
>On Fri, Oct 23, 2015 at 10:13:03AM +0800, Peng Fan w
Hi,
I want to ask you if there is a robust nommu-linux distribution for
sh7269. Thanks
Giuliano
-
Giuliano Tognon tel:+39-0444-440061
Software department fax:+39-04
From: Shaohui Xie
When creating phy-handle property, an unsigned int value is created by
fdt_create_phandle, and memcpy is used to get the value, since DTS is
big endian, the value cannot be used directly on little endian SoCs,
it should be converted by cpu_to_fdt32.
Signed-off-by: Shaohui Xie
From: Shaohui Xie
This needed to init dpmac.
Signed-off-by: Shaohui Xie
---
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
From: Shaohui Xie
The phy can share driver with other aquantia PHYs, so we only added PHY
ID.
Signed-off-by: Shaohui Xie
---
drivers/net/phy/aquantia.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index ef4da4e..f9
From: Aurelien Jacquiot
RapidIO is a high-performance packet-switched interconnect technology
(www.rapidio.org) that can be used for messaging or memory transfers
like Ethernet or PCIe.
This feature adds the RapidIO boot functionality for slave mode (i.e.
U-Boot does not fetch the images, images
From: Aurelien Jacquiot
This new memory command allows to wait a given value in memory.
It can be useful when U-Boot is used in a slave mode (another device
is pushing images to the local memory) such as RapidIO or any
RDMA kind of transport. We can then be notified that images have been
loaded t
From: Aurelien Jacquiot
RapidIO is a high-performance packet-switched interconnect technology
(www.rapidio.org) that can be used for messaging or memory transfers
like Ethernet or PCIe.
This commit adds the RapidIO boot functionality for slave mode (i.e.
U-Boot does not fetch the images, images
From: Aurelien Jacquiot
This commit adds the RapidIO boot functionality documentation.
Its explains what RapidIO boot feature does, how to use it and the
basic API that must be provided by a RapidIO hw controller driver.
Signed-off-by: Aurelien Jacquiot
---
doc/README.rapidio | 158 ++
On 11/10/2015 01:50 PM, Tom Rini wrote:
> On Tue, Nov 10, 2015 at 11:02:56AM +0100, Michal Simek wrote:
>
>> From: "Edgar E. Iglesias"
>>
>> Code is taken from Linux kernel driver.
>
> Which kernel tag / git hash? Makes future re-syncs for bug fixes
> easier.
>
Kernel v4.2. I will make it exp
From: Aurelien Jacquiot
This commit includes the KeyStone device driver for RapidIO
allowing to use the RapidIO boot functionality.
Today only K2HK devices have RapidIO support.
Signed-off-by: Aurelien Jacquiot
---
Makefile |1 +
configs/k2hk_evm_defconfig |2
Hello Peng,
On Fri, 23 Oct 2015 10:13:03 +0800, Peng Fan
wrote:
> The code such as PSCI in section named secure is bundled with
> u-boot image, and when bootm, the code will be copied to their
> runtime address same to compliation/linking address -
> CONFIG_ARMV7_SECURE_BASE.
>
> When compile th
CM-T3517 has several HW revisions.
Add board specific get_board_rev() callback to retrieve revision number.
Signed-off-by: Dmitry Lifshitz
---
Igor, Tom
I forgot to add a mailing list address in send-email.
Resending the patch.
v2: Make proper use of cl_eeprom_get_board_rev() parameter.
Thanks york,
So it seems I should moving the workaround out of DDR driver in "gen4" to SoC.
I think the workaround is not just only for ddr4.
And It should be as a workaround for the SOC.
From: York Sun
Sent: Tuesday, November 10, 2015 1:01
To: Yuan Yao-B
On Tuesday, November 10, 2015 at 01:37:36 PM, Thomas Chou wrote:
> Rename board nios2-generic to 3c120_devboard. Since nios2 is
> converted to driver model and device tree control of u-boot,
> the nios2-generic board directory is removed. We can rename
> the board back to a real board name. Now the
On Tue, Nov 10, 2015 at 02:00:29PM +0100, Michal Simek wrote:
> From: "Edgar E. Iglesias"
>
> Code is taken from Linux kernel driver (v4.2).
>
> Signed-off-by: Edgar E. Iglesias
> Signed-off-by: Michal Simek
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
_
Hello Vadzim,
On Mon, 19 Oct 2015 19:40:14 +0300, Vadzim Dambrouski wrote:
> If you enable CONFIG_SEMIHOSTING for STM32F429 target, you will get compile
> error looking like this:
>
> arch/arm/lib/semihosting.c: In function 'smh_read':
> {standard input}: Assembler messages:
> {standard input}:3
Hello Albert,
On Fri, 23 Oct 2015 18:06:38 +0200, Albert ARIBAUD
wrote:
> This series implements essential changes for thumb-1 support and
> activates thumb-1 build for openrd and tricorder as a proof of
> concept as well as a fix to bring the image sizes of openrd and
> tricorder targets back un
Hello Vadzim,
On Mon, 19 Oct 2015 19:40:15 +0300, Vadzim Dambrouski wrote:
> This patch fixes compile warnings like this:
>
> warning: format '%lu' expects argument of type 'long unsigned int',
> but argument 5 has type 'size_t'
>
> In C99 standard you can use %zu modifier to print siz
A few config files have been added without updating MAINTAINERS.
Reported-by: Albert ARIBAUD
Signed-off-by: Tom Rini
---
board/ti/am335x/MAINTAINERS |1 +
board/ti/am43xx/MAINTAINERS |2 ++
board/ti/dra7xx/MAINTAINERS |2 ++
3 files changed, 5 insertions(+)
diff --git a/board/ti/am
In 522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in
the mpc85xx linker scripts as this is not required and breaks newer
binutils. This commit cleans up the rest of the powerpc linker scripts.
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc512x/u-boot.lds |1 -
arch/
On Mon, Nov 9, 2015 at 10:05 PM, Fabio Estevam wrote:
> Hi Nikolay,
>
> On Thu, Aug 13, 2015 at 9:37 AM, Nikolay Dimitrov wrote:
>
>> Thanks for sharing this info, it seems it will solve a similar problem
>> of mine on the latest U-Boot code (SPI slave malloc not working during
>> SPL boot from S
Hi Fabio,
On 10 November 2015 at 04:40, Fabio Estevam wrote:
> This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49.
>
> This commit causes cgtqmx6eval to not boot anymore:
>
> U-Boot SPL 2015.10-00527-g8800bee (Nov 09 2015 - 21:23:54)
> mxc_spi: SPI Slave not allocated !
>
> Signed-off-b
Rename board nios2-generic to 3c120_devboard. Since nios2 is
converted to driver model and device tree control of u-boot,
the nios2-generic board directory is removed. We can rename
the board back to a real board name. Now the boards maintained
in u-boot mainline are the same as Linux kernel, namel
Add 3c120 and 10m50 devboards MAINTAINERS
Signed-off-by: Thomas Chou
---
board/altera/nios2/MAINTAINERS | 13 +
1 file changed, 13 insertions(+)
create mode 100644 board/altera/nios2/MAINTAINERS
diff --git a/board/altera/nios2/MAINTAINERS b/board/altera/nios2/MAINTAINERS
new file m
Hi Simon,
On Tue, Nov 10, 2015 at 12:41 PM, Simon Glass wrote:
> We're at the very start the release process, so I wonder if we can try
> to figure out what is wrong here?
>
> Is it because malloc() is not working, perhaps?
Yes, exactly. malloc() is not working.
Issue happens on Congatec board
On Tuesday, November 10, 2015 at 03:48:40 PM, Thomas Chou wrote:
> Rename board nios2-generic to 3c120_devboard. Since nios2 is
> converted to driver model and device tree control of u-boot,
> the nios2-generic board directory is removed. We can rename
> the board back to a real board name. Now the
On 12:25-20151110, Masahiro Yamada wrote:
> 2015-11-10 5:24 GMT+09:00 Simon Glass :
> >>> I am unhappy because I was hoping
> >>> we could stop creating symbolic links during building
> >>> in a long run.
> >
> > But how? I don't see that it
Hello Simon,
On Tue, 10 Nov 2015 06:41:25 -0800, Simon Glass
wrote:
> Hi Fabio,
>
> On 10 November 2015 at 04:40, Fabio Estevam
> wrote:
> > This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49.
> >
> > This commit causes cgtqmx6eval to not boot anymore:
> >
> > U-Boot SPL 2015.10-0052
Hi Fabio,
On 10 November 2015 at 06:50, Fabio Estevam wrote:
> Hi Simon,
>
> On Tue, Nov 10, 2015 at 12:41 PM, Simon Glass wrote:
>
>> We're at the very start the release process, so I wonder if we can try
>> to figure out what is wrong here?
>>
>> Is it because malloc() is not working, perhaps?
On 11/10/2015 08:55 AM, Nishanth Menon wrote:
> On 12:25-20151110, Masahiro Yamada wrote:
>> 2015-11-10 5:24 GMT+09:00 Simon Glass :
>>>>> I am unhappy because I was hoping
>>>>> we could stop creating symbolic links during building
>>>>>
On Tue, Nov 10, 2015 at 1:21 PM, Simon Glass wrote:
> Is this patch against mainline or does your tree have other changes?
This change is against a clean mainline tree.
>> /* DDR initialization */
>> spl_dram_init();
>>
>> It is the ame issue I reported back in August:
>> http://list
ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
in the MAINTAINERS file, so add them for completeness.
Reported-by: Albert Aribaud
Signed-off-by: Fabio Estevam
---
board/freescale/ls1043ardb/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/freescale/
Hello Fabio,
On Tue, 10 Nov 2015 13:41:03 -0200, Fabio Estevam
wrote:
> ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
> in the MAINTAINERS file, so add them for completeness.
>
> Reported-by: Albert Aribaud
> Signed-off-by: Fabio Estevam
> ---
> board/freescale/ls1043
Thanks, Tom.
> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Monday, November 09, 2015 4:36 PM
> To: Tom Warren
> Cc: Albert ARIBAUD ; swar...@wwwdotorg.org; u-
> b...@lists.denx.de; Simon Glass ; Stephen Warren
> ; Thierry Reding ; York Sun
> ; Michal Simek ;
>
On 11/10/2015 07:44 AM, Albert ARIBAUD wrote:
> Hello Fabio,
>
> On Tue, 10 Nov 2015 13:41:03 -0200, Fabio Estevam
> wrote:
>> ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
>> in the MAINTAINERS file, so add them for completeness.
>>
>> Reported-by: Albert Aribaud
>> S
On 11/10/2015 05:18 AM, Yuan Yao-B46683 wrote:
> Thanks york,
>
> So it seems I should moving the workaround out of DDR driver in "gen4" to SoC.
> I think the workaround is not just only for ddr4.
> And It should be as a workaround for the SOC.
Please make the patch if you are comfortable. Please
Hello York,
On Tue, 10 Nov 2015 08:36:17 -0800, York Sun
wrote:
>
>
> On 11/10/2015 07:44 AM, Albert ARIBAUD wrote:
> > Hello Fabio,
> >
> > On Tue, 10 Nov 2015 13:41:03 -0200, Fabio Estevam
> > wrote:
> >> ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
> >> in the MAI
Hello Tom,
Switching to these ASAP. :)
On Tue, 10 Nov 2015 15:54:58 +, Tom Warren
wrote:
> Thanks, Tom.
>
> > -Original Message-
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Monday, November 09, 2015 4:36 PM
> > To: Tom Warren
> > Cc: Albert ARIBAUD ; swar...@wwwdotorg.
On 11/10/15 15:17, Dmitry Lifshitz wrote:
> CM-T3517 has several HW revisions.
> Add board specific get_board_rev() callback to retrieve revision number.
>
> Signed-off-by: Dmitry Lifshitz
Reviewed-by: Igor Grinberg
> ---
>
> Igor, Tom
>
> I forgot to add a mailing list address in send-ema
Hello Tom,
The following changes since commit e490ad25eb3dc4f075ed33b4b00b1f97071fcf3d:
ARM64: zynqmp: Sync zynq_sdhci_init() declaration (2015-11-07 08:17:54 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-arm master
for you to fetch changes up to 5e68ff3949a3eebf6
board_init_f_mem() alters the C runtime environment's
stack it ls actually already using. This is not a valid
C runtime environment.
Split board_init_f_mem into C functions which do not
alter their own stack and therefore run in a valid C
runtime environment.
Signed-off-by: Albert ARIBAUD
---
Fo
On 11/09/2015 03:12 AM, Prabhakar Kushwaha wrote:
> LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
> personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
> So renaming existing LS2085A code base to reflect LS2080A (Prime personality)
>
> Signed-off-
DDR has been set as secure in MMU tables. Non-secure master such
as SDHC DMA cannot access data correctly. Mixing secure and non-
secure MMU entries requirs the MMU tables themselves in secure
memory. This patch moves MMU tables into a secure DDR area reserved
for TrustZone with size CONFIG_FSL_PPA
Primary Protected Application (PPA) is the base of TrustZone for
Freescale Layerscape SoCs. It needs to run in secure memory while
the rest of u-boot can run in non-secure memory. The secure memory
is reserved at the very end of DDR, before debug server and MC
reservations. The address varies depen
Hi,
On 9 November 2015 at 19:34, c...@rock-chips.com wrote:
>
> Hi Simon,
>
> Thank you so much for your response.
>
> If there is no new framework, I may first follow the following API which
> U-boot has defined
> in the file include/common.h, such as:
>
> /* $(CPU)/interrupts.c */
> in
On Tue, 2015-11-10 at 11:17 -0800, York Sun wrote:
> Primary Protected Application (PPA) is the base of TrustZone for
> Freescale Layerscape SoCs. It needs to run in secure memory while
> the rest of u-boot can run in non-secure memory. The secure memory
> is reserved at the very end of DDR, before
On 11/10/2015 11:31 AM, Scott Wood wrote:
> On Tue, 2015-11-10 at 11:17 -0800, York Sun wrote:
>> Primary Protected Application (PPA) is the base of TrustZone for
>> Freescale Layerscape SoCs. It needs to run in secure memory while
>> the rest of u-boot can run in non-secure memory. The secure me
Dear York,
In message <5642490c.9090...@freescale.com> you wrote:
>
> >> +- CONFIG_FSL_PPA_RESERVED_DRAM_SIZE
> >> + If defined, this is reserved in highest address as secure memory
> >
> > What is Freescale-specific about the concept of reserving memory for a
> > secure
> > monitor?
>
> The
On Tue, 2015-11-10 at 11:44 -0800, York Sun wrote:
>
> On 11/10/2015 11:31 AM, Scott Wood wrote:
> > On Tue, 2015-11-10 at 11:17 -0800, York Sun wrote:
> > > Primary Protected Application (PPA) is the base of TrustZone for
> > > Freescale Layerscape SoCs. It needs to run in secure memory while
> >
Remove this function as it's no longer used.
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc: Simon Glass
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 19 ---
include/common.h| 3 ---
2 files changed, 22 deletions(-)
diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c
inde
Pull out the code computing the EEPROM address into separate function
so that it's not duplicated.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 64 ++---
1 file changed, 26 insertions(+), 3
Pull out the code which computes the length of the transfer
into separate code and clean it up a little. This again trims
down the code duplication.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 66
Unify the code for doing read/write into single function, since the
code for both the read and write is almost identical. This again
trims down the code duplication.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 51 +--
From: Andreas Bießmann
This rewrite uses lately promoted eeprom_init(int) function to choose the
right I2C bus when writing data to the EEPROM.
Signed-off-by: Andreas Bießmann
Cc: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
board/corscience/tricorder/tricorder-eeprom.c
Pull out the code which does the I2C or SPI read/write, so that
the beefy ifdef around it is contained in a single function.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 50 +++---
1 file chang
This option only complicates the code unnecessarily, just use
CONFIG_SYS_DEF_EEPROM_ADDR as the default address if there are
only five arguments to eeprom {read/write} if this is defined.
If CONFIG_SYS_DEF_EEPROM_ADDR is not defined, we mandate all
six arguments.
Signed-off-by: Marek Vasut
Cc: Si
This macro is no longer used, so just reap it.
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc: Simon Glass
Cc: Heiko Schocher
---
README | 5 -
common/cmd_eeprom.c | 8
2 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/README b/README
index ef8d437..8fb81e9
Just move the code around so that the forward declarations are not
necessary. Also zap a few checkpatch issues where applicable and
zap the use of #ifdef CONFIG_CMD_EEPROM in the code, since this is
always true.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
co
Make this function weak and implement it's weak implementation
so that the boards can just reimplement it. This zaps the horrid
CONFIG_SYS_EEPROM_WREN macro.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 18 +-
1 file chan
Cosmetic fixes to the file, make it checkpatch clean.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c
index 13c
Just suck the ugly ifdef around eeprom_init() call into eeprom_init()
function itself. This puts all of the ifdef mess into one place.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
Now that the only user of CONFIG_SYS_EEPROM_X40430 was removed,
remove this unused code from cmd_eeprom.c
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc: Simon Glass
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 94 -
1 file changed, 94 deletions
Pull this macro to the beginning of the cmd_eeprom.c and remove
another nasty ifdef from the code. Note that this is legal, since
udelay(0) changes the behavior only such that it pings the WDT if
WDT is enabled and otherwise does not wait.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
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