Hi Saket,
On 15 August 2015 at 23:10, Saket Sinha wrote:
> This patch mainly adds ACPI support to QEMU.
> Verified by booting Linux kernel on QEMU i440FX and Q35.
>
> Signed-off-by: Saket Sinha
> ---
>
> arch/x86/cpu/qemu/Makefile | 1 +
> arch/x86/cpu/qemu/acpi.c | 161
> +
On 13 August 2015 at 01:29, Bin Meng wrote:
> Increase lib_sysinfo memrange entry number to 32 to sync with coreboot.
> This allows a complete E820 table to be reported to the kernel, as on
> some platforms (eg: Bayley Bay) having only 16 entires does not cover
> all the memory ranges.
>
> Signed-
On 13 August 2015 at 01:29, Bin Meng wrote:
> Now that we have generic routine to calculate relocation address,
> remove the x86 specific one which is now only used by coreboot.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/coreboot/sdram.c | 9 +--
> arch/x86/include/asm/init_he
On 13 August 2015 at 01:29, Bin Meng wrote:
> Instead of hiding each menu entries under "System tables" for EFI,
> hide the main menu completely.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/Kconfig | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
Acked-by: Simon Glass
Hi Bin,
On 13 August 2015 at 01:29, Bin Meng wrote:
> coreboot has some extensions (type 6 & 16) to the E820 types.
> When we detect this, mark it as E820_RESERVED.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/coreboot/sdram.c | 15 +--
> 1 file changed, 13 insertions(+), 2 de
On 13 August 2015 at 01:29, Bin Meng wrote:
> When booting as a coreboot payload, the framebuffer details are
> passed from coreboot via configuration tables. We save these
> information into vesa_mode_info structure for future use.
>
> Signed-off-by: Bin Meng
> ---
>
> drivers/pci/pci_rom.c
Hi Bin,
On 13 August 2015 at 01:29, Bin Meng wrote:
> When running U-Boot bare-metal, the cbfs command is useless.
>
> Signed-off-by: Bin Meng
> ---
>
> include/configs/x86-common.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/configs/x86-common.h b/include/configs/x86-com
On 13 August 2015 at 01:29, Bin Meng wrote:
> When booting as a coreboot payload, we don't need write any
> configuration tables as coreboot does that for us.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Simon Glass
__
On 13 August 2015 at 01:29, Bin Meng wrote:
> Currenlty we only set up video framebuffer when VIDEO_VESA driver is
> used. With coreboot, VIDEO_COREBOOT driver is used instead. Since we
> already saved VESA mode in the VIDEO_COREBOOT driver, now we can also
> set up video framebuffer for coreboot
On 13 August 2015 at 01:29, Bin Meng wrote:
> It looks that x86 chipset always contains a host bridge at pci
> b.d.f 0.0.0, so enable this for all boards.
>
> Signed-off-by: Bin Meng
> ---
>
> include/configs/bayleybay.h | 1 -
> include/configs/crownbay.h | 1 -
> include/configs/minnowmax.h
On 13 August 2015 at 01:29, Bin Meng wrote:
> Some platforms may have >=4GiB memory, so we need make U-Boot report
> such configuration correctly when booting as the coreboot payload.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/coreboot/sdram.c | 9 -
> 1 file changed, 4 insertion
On Sun, 2015-08-16 at 15:26 -0600, Simon Glass wrote:
> > Says who? I was only aware that common.h needs to go on top, the
> > local
> > stuff (e.g. in double quotes) on the bottom and the rest I assumed
> > can
> > go alphabetically ordered in between, not?
>
> I originally got it from here (and
i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr
Hi Simon,
On Mon, Aug 17, 2015 at 5:27 AM, Simon Glass wrote:
> Hi Bin,
>
> On 13 August 2015 at 01:29, Bin Meng wrote:
>> When running U-Boot bare-metal, the cbfs command is useless.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> include/configs/x86-common.h | 2 ++
>> 1 file changed, 2 insertion
Add more register entry for MMDC structure.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 65 -
1 file changed, 56 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b/arc
Hi Simon,
On Mon, Aug 17, 2015 at 5:27 AM, Simon Glass wrote:
> Hi Bin,
>
> On 13 August 2015 at 01:29, Bin Meng wrote:
>> coreboot has some extensions (type 6 & 16) to the E820 types.
>> When we detect this, mark it as E820_RESERVED.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/cpu/cor
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/ddr.c | 55 +
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletio
Hi,
I plan to send a patch to remove the DEV_FLAGS_SYSTEM and
DEV_EXT_VIDEO. They look useless to me. For example,
$ grep -nr DEV_FLAGS_SYSTEM *
arch/blackfin/cpu/jtag-console.c:186: dev.flags = DEV_FLAGS_OUTPUT |
DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
board/bf527-ezkit/video.c:442: videodev.flag
Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/includ
Hello Masahiro,
Am 16.08.2015 um 11:59 schrieb Masahiro Yamada:
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Heiko Schocher
---
arch/arm/mach-davinci/Kconfig|5 -
board/ait/ca
Add ddr_type entry for mx6_ddr_sysinfo. It will be used for
differenrate DDR3 and LPDDR2.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b/arch/arm
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use ddr_type to initialize
MMDC for LPDDR2.
Signed-off-by: Minkyu Kang
Cc: Nikita Kiryanov
---
include/configs/odroid_xu3.h.rej | 10 --
1 file changed, 10 deletions(-)
delete mode 100644 include/configs/odroid_xu3.h.rej
diff --git a/include/configs/odroid_xu3.h.rej b/include/configs/odroid_xu3.h.rej
deleted file mode 100644
i
Hi Tom,
On 14.08.2015 22:24, Tom Rini wrote:
On Thu, Aug 13, 2015 at 12:29:41PM +0200, Stefan Roese wrote:
Add CONFIG_SYS_GENERIC_BOARD to lwmon5.h and CONFIG_DISPLAY_BOARDINFO
to Kconfig file.
Signed-off-by: Stefan Roese
Cc: Masahiro Yamada
With this:
+(lcd4_lwmon5) arch/powerpc/cpu/ppc4
Dear Thomas Abraham,
On 03/08/15 21:27, Thomas Abraham wrote:
> In order to reuse existing ARMv7 based Exynos SoC support for ARMv8
> based Exynos platforms, move the existing sources from
> arch/arm/cpu/armv7/exynos to arch/arm/mach-exynos.
>
> This patch series has been tested on origen (Exynos
No need to configure indirect trigger address for every read/write.
Signed-off-by: Vikas Manocha
---
Changes in v3: added commit message & removed extra bracket.
Changes in v2: Rebased to master
drivers/spi/cadence_qspi_apb.c |9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
d
This patch is to separate the base trigger from the read/write transfer start
addresses.
Base trigger register address (0x1c register) corresponds to the address which
should be put on AHB bus to handle indirect transfer triggered before.
To handle indirect transfer we need to issue addresses fro
On 08/14/2015 12:47 PM, Tom Rini wrote:
> On Tue, Aug 11, 2015 at 08:55:41AM -0600, Stephen Warren wrote:
>> Turn on _FS_NORTC: This means we don't have to implement
>> get_fattime() which simplifies life for now.
>>
>> Automatically set _FS_READONLY based on CONFIG_FAT_WRITE. This
>> requires inc
dfu-util allows filtering on USB device vendor:product ID by using
the -d flag (-d 0451:d022).
Such option is very handy when many DFU devices are connected to a single
host PC. This commit allows testing when above situation emerges.
Signed-off-by: Lukasz Majewski
Reviewed-by: Simon Glass
Test
On Sat, Aug 15, 2015 at 10:57 AM, Stephen Warren wrote:
> On 08/14/2015 05:18 PM, Simon Glass wrote:
>> Hi,
>>
>> On 14 August 2015 at 16:51, Stephen Warren wrote:
>>> On 08/14/2015 04:40 PM, Bin Meng wrote:
On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
>
> Hi Stephen,
>
dfu-util allows filtering on USB device vendor:product ID by using
the -d flag (-d 0451:d022).
Such option is very handy when many DFU devices are connected to a single
host PC. This commit allows testing when above situation emerges.
Signed-off-by: Lukasz Majewski
Reviewed-by: Simon Glass
Test
The set_default_env() function from env_common.c expects either
a fully formatted error msg, e.g.: "## Resetting to default environment\n"
or an error msg prefixed with an !, in which case it will format it.
Fix the init_mmc_for_env() error messages to be prefixed with a !
this changes the bootup-
On Fri, Aug 14, 2015 at 09:40:48PM -0600, Stephen Warren wrote:
> On 08/14/2015 12:47 PM, Tom Rini wrote:
> > On Tue, Aug 11, 2015 at 08:55:41AM -0600, Stephen Warren wrote:
> >> Turn on _FS_NORTC: This means we don't have to implement
> >> get_fattime() which simplifies life for now.
> >>
> >> Au
Hi Stephen,
On 14 August 2015 at 21:32, Stephen Warren wrote:
> On 08/14/2015 01:20 PM, Simon Glass wrote:
>> Hi Stephen,
>>
>> On 10 August 2015 at 21:47, Stephen Warren wrote:
>>> On 08/07/2015 07:42 AM, Simon Glass wrote:
Enable device tree control so that we can use driver model fully a
Hi Sergei,
On 14 August 2015 at 19:45, Sergei Temerkhanov wrote:
> On Fri, Aug 14, 2015 at 9:56 PM, Simon Glass wrote:
>> Hi,
>>
>> On 13 August 2015 at 09:14, Sergey Temerkhanov
>> wrote:
>>> This commit adds functions issuing calls to firmware. This allows
>>> to use services such as PSCI pr
Hi Tom,
Just a small cosmetic patch. I'm not sure whom to send this to,
so I'm sending it directly to you.
Regards,
Hans
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Hi Bhupesh,
Am Freitag, 14. August 2015, 08:24:27 schrieb Sharma Bhupesh:
> Hi Wolfgang, Others
>
> I was going through the Software Package Data Exchange (SPDX) licensing terms
> for GNU General Public License v2.0 or later, as u-boot licensing uses the
> same on the header files (SPDX-License
Hi All,
As promised I've been working on cleaning up the sunxi nand spl driver,
as well as adding bad block handling in the same way as the BROM does,
as the SPL + u-boot must be placed in a BROM compatible nand partition.
This series is a bit of a patch bomb, but as you will see they are all
nic
ACPI(Advanced Configuration and Power Interface), is a Power Management and
configuration standard allowing the operating system to control the amount of
power each device is given (allowing it to put certain devices on standby or
power-off for example). It is also used to control and/or check the
Implement write_acpi_table() to create a minimal working ACPI table.
This includes writing FACS, XSDT, RSDP, FADT, MCFG, MADT, DSDT & SSDT
ACPI table entries.
Use a Kconfig option GENERATE_ACPI_TABLE to tell U-Boot whether we need
actually write the APCI table just like we did for PIRQ routing, MP
This patch mainly adds ACPI support to QEMU.
Verified by booting Linux kernel on QEMU i440FX and Q35.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 1 +
arch/x86/cpu/qemu/acpi.c | 161 +
2 files changed, 162 insertions(+)
create mod
On 16 August 2015 05:31:58 CEST, Marek Vasut wrote:
>On Sunday, August 16, 2015 at 04:16:32 AM, Marcel Ziswiler wrote:
>I would suggest that we drop this patch, but I would also suggest that
>we do
>the same thing kernel does and just enable CONFIG_USE_PRIVATE_LIBGCC
>globally
>for everyone to
The DSDT table contains a bytecode that is executed by a driver in the kernel.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 2 +-
arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 +++
arch/x86/cpu/qemu/acpi/dbug.asl| 26 +++
arch/x86/cpu/qemu/acpi/hpet.asl
BAR and spi_flash_cmd_wait_ready are updated to make more
module to add new status checks.
Jagan Teki (6):
spi: zynq_spi: Remove unneeded headers
sf: Return proper bank_sel, if flash->bank_curr == bank_sel
sf: Make BAR discovery, as spi_flash_read_bar
sf: Optimize BAR write code
sf: Mak
- Removed unneeded inclusion of header files
- Add "Xilinx" on license text
Signed-off-by: Jagan Teki
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
drivers/spi/zynq_spi.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_sp
The Radxa Rock pro board is rk3188 based and thus won't work with u-boot
build for RK3288. Change the documentation to refer to the intended
board, the Radxa Rock 2, which is an RK3288 based design very similar to
the firefly
Signed-off-by: Sjoerd Simons
---
doc/README.rockchip | 6 +++---
1 fi
u-boot can't use the sdio card so turn it of to prevent things getting
confused/struck when trying to use the card as storage.
Signed-off-by: Sjoerd Simons
---
arch/arm/dts/rk3288-firefly.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b
If computed bank_sel is same as flash->bank_curr which is
computed at probe time, then return the bank_sel instead of zero.
Signed-off-by: Jagan Teki
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
drivers/mtd/spi/sf_ops.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Heiko Schocher
---
arch/arm/mach-davinci/Kconfig|5 -
board/ait/cam_enc_4xx/Kconfig| 12 -
board/ait/cam_enc_4xx/MAINTAINERS
Hi Marcel,
On 16 August 2015 at 15:19, Marcel Ziswiler wrote:
> On Sun, 2015-08-16 at 15:11 -0600, Simon Glass wrote:
>
>> Thanks for tidying this up. But the ordering should be:
>>
>>
>>
>>
>>
>>
>> "local.h"
>
> Says who? I was only aware that common.h needs to go on top, the local
> stuff
On Sun, 2015-08-16 at 15:11 -0600, Simon Glass wrote:
> Thanks for tidying this up. But the ordering should be:
>
>
>
>
>
>
> "local.h"
Says who? I was only aware that common.h needs to go on top, the local
stuff (e.g. in double quotes) on the bottom and the rest I assumed can
go alphabetic
Hi, York
Alison help me find out a macro definition mistake, v2 just correct this
mistake.
I will resend it again and add change-log in.
Zhuoyu
> -Original Message-
> From: Sun York-R58495
> Sent: Saturday, August 15, 2015 12:07 AM
> To: Zhang Zhuoyu-B46552
> Cc: u-boot@lists.denx.de;
On Sun, 2015-08-16 at 19:26 +0200, Marek Vasut wrote:
>
Errr, right. What weird sort of battle tactics is this, are you
> trying to
> confuse the enemy with random unrelated patches right in the middle
> of a
> coherent series? :)
Yes, I agree. But I trusted it all into the hands of patman this
Add LPDDR2 support:
1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2.
2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to
mx6_ddr3_cfg, but still keep it a single one for easy to choose
parameters for LPDDR2.
3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to ini
This patch set is to support SPL for mx6slevk board.
But mx6slevk features one LPDDR2 chip. Then we need to first add
LPDDR2 SPL support. Also introduce one ddr_type entry to
differentiate DDR3 and LPDDR2. This patch set also correct tRFC and
tXS for DDR3 4Gb chip.
The LPDDR2 part is implemented r
Hello Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: 2015年8月16日 16:50
> To: u-boot@lists.denx.de; Hou Zhiqiang-B48286; Sun York-R58495
> Cc: Jagan Teki
> Subject: Re: [PATCH 0/6] sf: BAR/wait_ready logic updates
>
> Hi Zhiqiang,
>
> On 16 August 2015 a
Hi Sinan,
Thanks for your review.
Please see my comments.
Best Regards,
Yuan Yao
> -Original Message-
> From: Sinan Akman [mailto:si...@writeme.com]
> Sent: Saturday, August 15, 2015 12:28 AM
> To: Yuan Yao-B46683; Sun York-R58495; Wang Huan-B18965
> Cc: u-boot@lists.denx.de
> Subject: R
On 13 August 2015 at 01:29, Bin Meng wrote:
> With recent EFI support, the entry point address of coreboot payload
> was changed. Now we update the address to use _x86boot_start, which
> is the same one for EFI.
>
> Signed-off-by: Bin Meng
> ---
>
> doc/README.x86 | 6 +++---
> 1 file changed, 3
Hi Simon,
Please find my response inline -
On Mon, Aug 17, 2015 at 2:44 AM, Simon Glass wrote:
> Hi Saket,
>
> On 15 August 2015 at 23:10, Saket Sinha wrote:
>> This patch mainly adds ACPI support to QEMU.
>> Verified by booting Linux kernel on QEMU i440FX and Q35.
>>
>> Signed-off-by: Saket
On 17.08.2015 05:29, Peng Fan wrote:
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use
Add SPL boot support for mx6slevk board.
1. Introduce a configuration file mx6slevk_spl_defconfig.
2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE.
3. Include imx6_spl.h and related SPL macro in mx6slevk.h.
4. select SUPPORT_SPL for TARGET_MX6SLEVK.
5. Add SPL board code
This file was accidentally added by commit 181bd9dc61d2 ("kconfig:
add config option for shell prompt").
Signed-off-by: Masahiro Yamada
---
include/configs/odroid_xu3.h.rej | 10 --
1 file changed, 10 deletions(-)
delete mode 100644 include/configs/odroid_xu3.h.rej
diff --git a/includ
We use DMA for nand data transfers in the SPL, so make sure the DMA
controller is enabled.
Signed-off-by: Hans de Goede
---
board/sunxi/board.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index b76bb83..1ebd0a4 100644
--- a/board/sunxi/boar
On Wednesday 15 July 2015 15:13:05, Alison Wang wrote:
> This patch addresses a problem mentioned recently on this mailing list:
> [1].
>
> In that posting a LS1021 based system was locking up at about 5 minutes
> after boot, but the problem was mysteriously related to the toolchain
> used for bui
Hello Bin,
a couple more of last-minute comments below:
On 15 August 2015 at 04:44, Bin Meng wrote:
> +For building an EFI payload, run:
> make qemu-x86_defconfig
Since qemu-x86_defconfig was an example, maybe this could be written as:
make
change EFI settings according to what described
On Mon, Aug 17, 2015 at 08:54:25AM +0200, Stefan Roese wrote:
>On 17.08.2015 05:29, Peng Fan wrote:
>>To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
>>to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
>>The new reimplemented function mx6_dram_cfg onl
On Sun, Aug 16, 2015 at 5:39 PM, Hans de Goede wrote:
> Add CONFIG_MMC0_CD_PIN to various boards, this stoos the SPL from still
^
stops
> trying to access the sdcard when there is none (e.g. whe
On 17.08.2015 07:59, Peng Fan wrote:
On Mon, Aug 17, 2015 at 08:54:25AM +0200, Stefan Roese wrote:
On 17.08.2015 05:29, Peng Fan wrote:
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimp
On Sun, Aug 16, 2015 at 4:02 AM, Hans de Goede wrote:
> nand_spl_load_image() always gets called with either CONFIG_SYS_TEXT_BASE
> or spl_image.load_addr as destination, both of which are properly aligened,
> and have plenty of space for "overshooting" up to
> CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE
> >
> > Tom,
> >
> > Looks like an extra file was committed during the merge
> >
> > include/configs/odroid_xu3.h.rej
>
> Thanks, I'll push a delete with my next changes.
Tom,
Yes, I had already posted a patch to delete it
CCing you.
I have not seen it on Patchwork though.
I do not know why..
Hi Oliver,
Sorry for the late reply (I was in vacation for the last 2 weeks)
On Tue, 11 Aug 2015 14:16:52 +0200
Olliver Schinagl wrote:
> Hello everybody,
>
> We are working with Boris and Roy's patch series on getting the NAND
> flash chip working on Olimex OLinuXino Lime2 boards. Initially,
On Mon, Aug 17, 2015 at 09:20:15AM +0200, Stefan Roese wrote:
>On 17.08.2015 07:59, Peng Fan wrote:
>>On Mon, Aug 17, 2015 at 08:54:25AM +0200, Stefan Roese wrote:
>>>On 17.08.2015 05:29, Peng Fan wrote:
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg
On 17.08.2015 08:25, Peng Fan wrote:
On Mon, Aug 17, 2015 at 09:20:15AM +0200, Stefan Roese wrote:
On 17.08.2015 07:59, Peng Fan wrote:
On Mon, Aug 17, 2015 at 08:54:25AM +0200, Stefan Roese wrote:
On 17.08.2015 05:29, Peng Fan wrote:
To i.MX6, DDR3 and LPDDR2 is supported, so rename function
Hello Alison,
On Tuesday 04 August 2015 09:55:37, Alison Wang wrote:
> This patch addresses a problem mentioned recently on this mailing list:
> [1].
>
> In that posting a LS1021 based system was locking up at about 5 minutes
> after boot,but the problem was mysteriously related to the toolchain
On Fri, Aug 14, 2015 at 7:45 PM, Ian Lepore wrote:
> On Fri, 2015-08-14 at 09:27 -0500, Rob Herring wrote:
>> Ian:
>> > So if I want to write a FreeBSD i2c eeprom driver that uses DT data,
>> > what are my choices? I have exactly one: make my driver essentially a
>> > clone of the Linux driver,
Hi Oliver,
On Wed, 12 Aug 2015 15:31:15 +0200
Olliver Schinagl wrote:
> Hey Yassin,
>
> I'm affraid. The strange thing that seems very related here is that when
> writing a file onto the flash, it fails and succeeds alternating. It
> never fails or succeeds twice in a row! And this on any boa
Hi Igor,
On Mon, Aug 17, 2015 at 3:10 PM, Stoppa, Igor wrote:
> Hello Bin,
> a couple more of last-minute comments below:
>
> On 15 August 2015 at 04:44, Bin Meng wrote:
>
>
>> +For building an EFI payload, run:
>> make qemu-x86_defconfig
>
> Since qemu-x86_defconfig was an example, maybe th
Hello
On 17 August 2015 at 09:34, Boris Brezillon
wrote:
> Hi Oliver,
>
> Sorry for the late reply (I was in vacation for the last 2 weeks)
>
> On Tue, 11 Aug 2015 14:16:52 +0200
> Olliver Schinagl wrote:
>
>>
>> Now I know that the mtd stuff is all very new and all very untested,
>> what I am
This patch series enables DMA for QSPI on dra7xx and am43xx.
Resending this series after rebasing on current origin/master.
v2: https://www.mail-archive.com/u-boot@lists.denx.de/msg179404.html
changes in v2:
* Move edma related code to edma driver instead of handling it in
ti-qspi driver.
v1
From: Ravi Babu
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
common/env_sf
From: Ravi Babu
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
common/cmd_sf
From: Kishon Vijay Abraham I
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Vignesh R
Reviewed-by: Jagan Teki
---
arch/arm/cpu/armv7/am33xx/clock.c| 52 +++
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
* dropped #ifdefs in header file.
arch/arm/cpu/armv7/omap5/hw_data.c | 41
arch/arm/cp
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R
Reviewed-by: Jagan Teki
---
drivers/spi/ti_qspi.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/spi/ti_qspi.c b/drivers/
From: Tom Rini
When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.
Signed-off-by: Tom Rini
Signed-off-by: Vignesh R
Reviewed-by: Jagan Teki
---
drivers/mtd/spi/sf_ops.c | 8 +++-
i
Enable TI_EDMA3 and SPL_DMA support, so as to reduce boot time. With
DMA enabled there is almost 3x improvement in read performance. This
helps in reducing boot time in qspiboot mode
Also add EDMA3 base address for DRA7XX and AM57XX.
Signed-off-by: Vignesh R
Reviewed-by: Jagan Teki
---
arch/ar
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 36
1 file changed, 36 ins
Signed-off-by: Vignesh R
Reviewed-by: Jagan Teki
---
arch/arm/include/asm/ti-common/ti-edma3.h | 2 +
drivers/dma/ti-edma3.c| 78 +++
2 files changed, 80 insertions(+)
diff --git a/arch/arm/include/asm/ti-common/ti-edma3.h
b/arch/arm/include/asm
From: Kishon Vijay Abraham I
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Vignesh R
Reviewed-by: Jagan Teki
---
arch/arm/cpu/armv7/omap-common/clocks-common.c | 53 +
On 13 August 2015 at 17:23, Stefan Roese wrote:
> Jagan,
>
> On 13.08.2015 13:45, Jagan Teki wrote:
Please correct me if I'm wrong, but AFAIU this BAR thing
(CONFIG_SPI_FLASH_BAR) doesn't support to address e.g. a 64MiB SPI flash
contiguously. Only 16MiB areas. So for example i
On Sun, 2015-08-16 at 11:39 +0200, Hans de Goede wrote:
> Drop the no longer accurate part of the USB_MUSB_SUNXI Kconfig help
> text,
> since the musb-host code now supports the device-model, ehci and musb
> in
> host mode can both be enabled at the same time without issues.
>
> Signed-off-by: H
On Sun, 2015-08-16 at 11:39 +0200, Hans de Goede wrote:
> Add CONFIG_MMC0_CD_PIN to various boards, this stoos the SPL from still
stops
> trying to access the sdcard when there is none (e.g. when booting from
> nand).
>
> Signed-off-by: Hans de Go
On Sun, 2015-08-16 at 11:39 +0200, Hans de Goede wrote:
> With the unified / cleaned up default display output selection changes,
> which were done as part of adding composite video out support, our
> example LCD_MODE line in the A13-OLinuxIno defconfigs causes the display
> code to setup a LCD con
This patch set is to support SPL for mx6slevk board.
But mx6slevk features one LPDDR2 chip. Then we need to first add
LPDDR2 SPL support. Also introduce one ddr_type entry to
differentiate DDR3 and LPDDR2. This patch set also correct tRFC and
tXS for DDR3 4Gb chip.
The LPDDR2 part is implemented r
Add more register entry for MMDC structure.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 65 -
1 file changed, 56 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b/arc
Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/includ
Add ddr_type entry for mx6_ddr_sysinfo. It will be used for
differenrate DDR3 and LPDDR2.
Introduce an enum type for ddr_type.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/ar
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/ddr.c | 55 +
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletio
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