Hi,
On 02-08-15 20:57, Ian Campbell wrote:
On Sun, 2015-08-02 at 20:45 +0200, Hans de Goede wrote:
[...]
So for now to keep things working we need CONFIG_CONS_INDEX 1
even on the 1 board we have which does not have a serial port
(the uart1 pins which are routed to the outside on the A13
are
The MIB RAM and FIFO receive start register does not exist on
i.MX6UL. Accessing these register will cause enet not work well.
Signed-off-by: Peng Fan
Signed-off-by: Fugang Duan
Cc: Joe Hershberger
---
drivers/net/fec_mxc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/net/fe
Add CMD_MII Kconfig entry.
Signed-off-by: Peng Fan
Cc: Joe Hershberger
---
common/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/common/Kconfig b/common/Kconfig
index 40cd69e..2ae5080 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -433,6 +433,10 @@ config CMD_LINK_LOCAL
Add enet support for mx6ul_14x14_evk board:
1. add pinmux settings
2. implement board_eth_init
3. implement board_phy_config
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
---
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 116 ++
configs/mx6ul_14x14_evk_d
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Peng Fan
Cc: H
On Mon, Aug 3, 2015 at 7:06 AM, Peng Fan wrote:
> +int board_eth_init(bd_t *bis)
> +{
> + int ret;
> +
> + setup_iomux_fec(CONFIG_FEC_ENET_DEV);
> +
> + ret = fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV,
> + CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
> + if
On Mon, Aug 3, 2015 at 7:06 AM, Peng Fan wrote:
> - reg = readl(&anatop->pll_enet);
> - reg &= ~BM_ANADIG_PLL_ENET_DIV_SELECT;
> - reg |= freq;
> + if (0 == fec_id) {
Could you please use 'if (fec_id == 0)'.
Same applies below.
___
Enable networking for EP108 by default.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_ep_defconfig | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/configs/xilinx_zynqmp_ep_defconfig
b/configs/xilinx_zynqmp_ep_defconfig
index fda44eaee04c..f249f8ec0204 100644
Hi Peng,
(added Joe in CC as network custodian):
On 03/08/2015 12:06, Peng Fan wrote:
> To i.MX6SX/UL, two ethernet interfaces are supported.
> Add ENET2 clock support:
> 1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
>To value 1, only i.MX6SX/UL can pass the check.
>
Hi Simon,
> Hi Lukasz,
>
> On 25 July 2015 at 02:11, Lukasz Majewski
> wrote:
> > Documentation file for DFU extension. With this functionality it is
> > now possible to transfer FIT images with firmware updates via TFTP
> > and use DFU backend for storing them.
> >
> > Signed-off-by: Lukasz Maj
Currently we need to build one U-boot image for each of the udoo
variants: quad and dual-lite.
By switching to SPL we can support all two variants with a single binary.
Based on the SPL for wandboard.
Tested with OpenELEC (Open Embedded Linux Entertainment Center)
on both boards.
Signed-off-by:
Hi Stefano,
On Mon, Aug 03, 2015 at 01:59:29PM +0200, Stefano Babic wrote:
>Hi Peng,
>
>(added Joe in CC as network custodian):
>
>
>On 03/08/2015 12:06, Peng Fan wrote:
>> To i.MX6SX/UL, two ethernet interfaces are supported.
>> Add ENET2 clock support:
>> 1. Introduce a new input parameter "fec_
Hi Fabio,
On Mon, Aug 03, 2015 at 07:39:33AM -0300, Fabio Estevam wrote:
>On Mon, Aug 3, 2015 at 7:06 AM, Peng Fan wrote:
>
>> +int board_eth_init(bd_t *bis)
>> +{
>> + int ret;
>> +
>> + setup_iomux_fec(CONFIG_FEC_ENET_DEV);
>> +
>> + ret = fecmxc_initialize_multi(bis, CONFIG_FE
On 03/08/2015 13:32, Peng Fan wrote:
> Hi Fabio,
> On Mon, Aug 03, 2015 at 07:39:33AM -0300, Fabio Estevam wrote:
>> On Mon, Aug 3, 2015 at 7:06 AM, Peng Fan wrote:
>>
>>> +int board_eth_init(bd_t *bis)
>>> +{
>>> + int ret;
>>> +
>>> + setup_iomux_fec(CONFIG_FEC_ENET_DEV);
>>> +
>>> +
On Mon, Aug 03, 2015 at 02:50:23PM +0200, Stefano Babic wrote:
>On 03/08/2015 13:32, Peng Fan wrote:
>> Hi Fabio,
>> On Mon, Aug 03, 2015 at 07:39:33AM -0300, Fabio Estevam wrote:
>>> On Mon, Aug 3, 2015 at 7:06 AM, Peng Fan wrote:
>>>
+int board_eth_init(bd_t *bis)
+{
+ int r
In order to reuse existing ARMv7 based Exynos SoC support for ARMv8
based Exynos platforms, move the existing sources from
arch/arm/cpu/armv7/exynos to arch/arm/mach-exynos.
This patch series has been tested on origen (Exynos4210), smdk5250
and smdk5420 boards. And compile tested for the following
The do_lowlevel_init() function includes certian CA15 specific L2 cache
configuration which is only applicable on Exynos5420 and members of its
family. Fix the regression on Origen4210 by skipping the Exynos5420
specific portions of the code.
Cc: Minkyu Kang
Cc: Albert Aribaud
Signed-off-by: Tho
Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow
reuse of existing code for ARMv8 based Exynos platforms.
Cc: Minkyu Kang
Cc: Albert Aribaud
Cc: Masahiro Yamada
Signed-off-by: Thomas Abraham
---
arch/arm/Kconfig |2 +-
arch/arm/Makefile
Hi Peter,
On 03/08/2015 12:49, vpeter4 wrote:
> Currently we need to build one U-boot image for each of the udoo
> variants: quad and dual-lite.
>
> By switching to SPL we can support all two variants with a single binary.
>
> Based on the SPL for wandboard.
>
> Tested with OpenELEC (Open Embe
Hi Peter,
On Mon, Aug 3, 2015 at 7:49 AM, vpeter4 wrote:
> Currently we need to build one U-boot image for each of the udoo
> variants: quad and dual-lite.
>
> By switching to SPL we can support all two variants with a single binary.
>
> Based on the SPL for wandboard.
>
> Tested with OpenELEC (O
On 03/08/2015 15:19, Fabio Estevam wrote:
> Hi Peter,
>
> On Mon, Aug 3, 2015 at 7:49 AM, vpeter4 wrote:
>> Currently we need to build one U-boot image for each of the udoo
>> variants: quad and dual-lite.
>>
>> By switching to SPL we can support all two variants with a single binary.
>>
>> Based
Hi,
On 08/01/2015 09:39 AM, Masahiro Yamada wrote:
> One disadvantage of commit a26cd04920dc (arch: Make board selection
> choices optional) is that Kconfig could create such an insane
> .config file that no board is selected.
>
> Rip off the "optional" again in favor of Zedboard as the default
>
Hi Przemyslaw,
On 28 July 2015 at 00:19, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 07/28/2015 01:30 AM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 10 July 2015 at 05:53, Przemyslaw Marczak
>> wrote:
>>>
>>> Hello Simon,
>>>
>>> On 07/03/2015 02:16 AM, Simon Glass wrote:
>
Hi Bin,
On 28 July 2015 at 01:47, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
>> At present there are no PCI functions which allow access to PCI
>> configuration using a struct udevice. This is a sad situation for driver
>> model as it makes use of PCI har
Hi Przemyslaw,
On 30 July 2015 at 02:22, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 07/30/2015 04:05 AM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 10 July 2015 at 05:53, Przemyslaw Marczak
>> wrote:
>>>
>>>
>>> Hello Simon,
>>>
>>> On 07/03/2015 02:16 AM, Simon Glass wrote:
>>
On 1 August 2015 at 08:48, Tom Rini wrote:
> On Sat, Aug 01, 2015 at 10:14:35PM +0900, Masahiro Yamada wrote:
>
>> Signed-off-by: Masahiro Yamada
>
> Reviewed-by: Tom Rini
Reviewed-by: Simon Glass
___
U-Boot mailing list
U-Boot@lists.denx.de
http://l
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> If the target string matches "CONFIG_", move the pointer p
> forward. This saves several 7-chars adjustments.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
> scripts/basic/fixdep.c | 7 ---
> 1 file changed, 4 insertio
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> Just preparing for upcoming cleaning.
>
> The board-specific linker script board/vpac270/u-boot-spl.lds
> has been touched to avoid build error. It does not change the
> size of spl/u-boot-spl.bin for this board, so it should be OK.
>
> Signed-
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
> drivers/Makefile | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Simon Glass
___
U-Boot mailing list
U-Boot@li
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
> drivers/Makefile| 2 +-
> drivers/clk/Kconfig | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Simon Glass
_
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> The previous commit introduced a useful macro used in makefiles,
> in order to reference to different variables (CONFIG_... or
> CONFIG_SPL_...) depending on the build context.
>
> Per-image config option control is a PITA in C sources, too.
> He
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> Commit e02ee2548afe ("kconfig: switch to single .config
> configuration") made the configuration itself pretty simple,
> instead, we lost the way to systematically enable/disable config
> options for each image independently.
>
> Our current stra
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
> drivers/Makefile | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Simon Glass
___
U-Boot mailing list
U-Boot@li
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
> drivers/Makefile| 2 +-
> drivers/led/Kconfig | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Simon Glass
__
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
> drivers/Makefile | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
Reviewed-by: Simon Glass
___
U-Boot mailing list
U-Boot@
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> We do not want to compile the DM remove code for SPL. Currently,
> we undef it in include/config_uncmd_spl.h (for C files) and in
> scripts/Makefile.uncmd_spl (for Makefiles). This is really ugly.
>
> This commit demonstrates how we can depreca
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> There is no case where defined(SPL_DISABLE_OF_CONTROL) is true.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
> include/fdtdec.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass
___
On 1 August 2015 at 08:48, Tom Rini wrote:
> On Sat, Aug 01, 2015 at 10:14:38PM +0900, Masahiro Yamada wrote:
>
>> Signed-off-by: Masahiro Yamada
>
> Reviewed-by: Tom Rini
Reviewed-by: Simon Glass
___
U-Boot mailing list
U-Boot@lists.denx.de
http://l
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing
> devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
> away the ugly logic in include/fdtdec.h:
>
> #ifdef CONFIG_OF_CONTROL
> # if defined(CONFIG_SPL_BUILD) && !
Hi Masahiro,
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
> As we discussed a couple of times, negative CONFIG options make our
> life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ...
> and here is another one.
>
> Now, there are actually two boards enabling OF_CONTROL on SPL:
> -
Hi,
On 1 August 2015 at 07:14, Masahiro Yamada
wrote:
>
> Refer to Simon's question, too:
> http://lists.denx.de/pipermail/u-boot/2015-July/219598.html
>
> Since U-boot introduced SPL (not since Kconfig),
> enabling features for U-boot and SPL independently is always a PITA.
>
> - decide if each
>> Maybe Stefano could fix these two small issues while applying your patch.
>
>Yes, thanks for note this.
>
>I will fix them by applying, no need to repost.
Thank you very much.
Also thanks to Fabio for his instructions in last few days.
Best regards,
Peter
___
This series adds a number of fixes and improvements to driver model as
well as two new uclasses (video bridges and I2c muxes).
The series is aimed at adding support for spring (HP 11 Chromebook). Since
it is very similar to other ARM Chromebooks, some effory is made to use
common code rather than
Add support for all BUCK regulators, now that the correct register is
accessed for each.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add a comment about DVS in the driver
drivers/power/regulator/max77686.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --gi
Spring is the first ARM-based HP Chromebook 11. It is similar to snow
and it uses the same Samsung Exynos5250 chip. But has some unusual
features. Mainline support for it has lagged snow (both in kernel and
U-Boot). Now that the exynos5 code is common we can support spring just
by adding a device t
Now that exynos5420 boards can use the generic exynos5 code, switch over to
it and remove the old code.
Signed-off-by: Simon Glass
Acked-by: Przemyslaw Marczak
---
Changes in v2: None
board/samsung/smdk5420/Makefile | 4 -
board/samsung/smdk5420/smdk5420.c | 143 --
The Chrome OS EC supports tunnelling through to an I2C bus on the EC. This
currently uses a copy of the I2C command code and a special 'crosec'
sub-command.
With driver model we can define an I2C bus which tunnels through to the EC,
and use the normal 'i2c' command to access it. This simplifies th
Enable PMICs, regulators and the like so that new drivers will be made
available.
Signed-off-by: Simon Glass
---
Changes in v2: None
board/samsung/smdk5420/smdk5420.c | 2 +-
configs/arndale_defconfig | 2 ++
configs/odroid-xu3_defconfig| 6 ++
configs/peach-pi_defco
We always use device tree on exynos, so remove the unused code.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/include/asm/arch-exynos/dp_info.h | 2 --
drivers/video/exynos_dp.c | 22 --
2 files changed, 24 deletions(-)
diff --git a/arch/arm
We have a new one which uses driver model and device tree configuration.
Remove the old one.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/video/Makefile | 1 -
drivers/video/parade.c | 231
include/configs/peach-pi.h | 2
This has moved to driver model so we can drop the fdtdec support.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/fdtdec.h | 1 -
lib/fdtdec.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index b994f2c..cd4ec66 100644
--- a/include/fdt
Many options are duplicated on the exynos5 boards. Move these to the common
files. Also some options are not used so can be removed.
Tidy this up to make the files easier to maintain.
Signed-off-by: Simon Glass
Acked-by: Przemyslaw Marczak
---
Changes in v2:
- Rebase to dm/master
include/con
Remove the old drivers (both the normal one and the cros_ec one) now that
we have new drivers that use driver model.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/power/pmic/Makefile | 2 -
drivers/power/pmic/pmic_tps65090.c| 310 --
From: Dinh Nguyen
Add code which uses the new functions for obtaining FPGA ID from
the scan manager. This new code prints the FPGA model attached to
the SoCFPGA during boot and sets environment variable "fpgatype",
which can be used to determine the FPGA model in U-Boot scripts.
Signed-off-by: D
Introduce generic function for accessing the JTAG scan chains in the
SCC manager. Make use of this function throughout the SCC manager to
replace the ad-hoc writes to registers and make the code less cryptic.
Signed-off-by: Marek Vasut
---
arch/arm/mach-socfpga/scan_manager.c | 104 +
From: Dinh Nguyen
Add code to get the FPGA type for Altera's SoCFPGA family of FPGA. The code
uses the scan manager to send jtag pulses that will return the FPGA ID.
Signed-off-by: Dinh Nguyen
Signed-off-by: Marek Vasut
---
arch/arm/mach-socfpga/include/mach/scan_manager.h | 1 +
arch/arm/ma
Factor out the code which sends JTAG instruction followed by data
into separate function to tidy the code up a little.
Signed-off-by: Marek Vasut
---
arch/arm/mach-socfpga/scan_manager.c | 113 +--
1 file changed, 42 insertions(+), 71 deletions(-)
diff --git a/ar
Clean up the horrible macros present in the scan_manager.h . Firstly,
the function scan_mgr_io_scan_chain_prg() is static, yet all the macros
are used only within it, thus there is no point in having them in the
header file. Moreover, the macros are just making the code much less
readable, so remov
Add a new I2C_MUX uclass. Devices in this class can multiplex between
several I2C buses, selecting them one at a time for use by the system.
The multiplexing mechanism is left to the driver to decide - it may be
controlled by GPIOs, for example.
The uclass supports only two methods: select() and d
Rework this function so it's clear that it is only polling for certain
bits to be cleared. Add kerneldoc. Fix it's return value to be either
0 on success and -ETIMEDOUT on error and propagate this through the
scan manager code.
Signed-off-by: Marek Vasut
---
arch/arm/mach-socfpga/include/mach/sc
We haven't quite got pinctrl ready to apply to mainline. We don't want to
GPIO pull-up/down support to the driver model GPIO layer either. So work
around this for now.
We can address this when pinctrl is complete.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add a new patch to hold off the n
At present lower case is used for the regulator names in the device tree.
The kernel uses upper case and U-Boot will require this also since it will
move to a case-sensitive name check.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to correct LDO and BUCK naming
arch/arm/dts/ex
Add a driver to support the special LDO access used by spring. This is a
custom method in the cros_ec protocol - it does not use an I2C
pass-through.
There are two implementation choices:
1. Write a special LDO driver which can talk across the EC. Duplicate all
the logic from TPS65090 for retryin
This is not needed with driver mode. Remove it.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/misc/cros_ec.c | 268 +
include/cros_ec.h | 14 ---
2 files changed, 1 insertion(+), 281 deletions(-)
diff --git a/drivers/misc/cros
While the AP can access the main PMIC on snow, it must coordinate with the
EC which also wants access. Drop the old definition, which can in principle
generate collision errors. We will use the new arbitration driver instead.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/dts/exyn
While I2C supports multi-master buses this is difficult to get right.
The implementation on the master side in software is quite complex.
Clock-stretching and the arbitrary time that an I2C transaction can take
make it difficult to share the bus fairly in the face of high traffic.
When one or more
Some boards use device tree for almost all board-specific configuration.
They therefore do not need their own separate board code, but can all use
the same version. Add a common version of the board code. It uses the
PMIC, regulator and video bridge uclasses. This will support smdk5250,
smdk5420, s
Now that most exynos5250 boards can use the generic exynos5 code, switch
over to it and remove the old code.
Signed-off-by: Simon Glass
---
Changes in v2: None
board/samsung/smdk5250/Makefile | 4 -
board/samsung/smdk5250/exynos5-dt.c | 306
include/c
From: Marcel Ziswiler
The following commit enforces CONFIG_DM_ETH for USB Ethernet which
breaks any board using CONFIG_USB_HOST_ETHER without CONFIG_DM which
this patch fixes.
commit 69559093f6173dcfcb041df0995063bdbd07d49b
dm: usb: Avoid using USB ethernet with CONFIG_DM_USB and no DM_ETH
Test
Hello Peng,
I have few comments.
On 07/28/2015 04:48 PM, Peng Fan wrote:
1. Support driver model for pfuze100.
2. Introduce a new Kconfig entry DM_PMIC_PFUZE100 for pfuze100
3. This driver intends to support PF100, PF200 and PF3000, so add
the device id into the udevice_id array.
Signed-of
Hello,
On 08/03/2015 02:23 AM, Peng Fan wrote:
Hi Simon,
On Sun, Aug 02, 2015 at 04:31:06PM -0600, Simon Glass wrote:
Hi Peng,
On 28 July 2015 at 08:48, Peng Fan wrote:
If there is no property named 'regulator-name' for regulators,
choose node name instead, but not directly return failure v
On 08/02/2015 06:13 PM, Simon Glass wrote:
This reverts commit 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4.
This function has a few problems. It calls fdt_parent_offset() which as
mentioned in code review is very slow.
https://patchwork.ozlabs.org/patch/499482/
https://patchwork.ozlabs.org/patch/4
Hey all,
I've pushed v2015.10-rc1 out to the repository and tarballs should exist
soon.
The merge window is now closed. I've got the first rc out on schedule
and I'm going to try hard to stick to the every two weeks thing.
Speaking of the merge window, I think after pondering things for a bit,
t
On 07/27/2015 03:49 PM, Marek Vasut wrote:
> This series fixes the SPL support on SoCFPGA and cleans up the DDR
> init code such that it is becoming remotely mainlinable. After this
> series, the SPL is capable of booting from both SD/MMC and QSPI NOR.
>
> There is still work to be done, but I'd l
From: Marcel Ziswiler
If enabling CONFIG_DM_ETH currently compilation fails as follows:
drivers/usb/eth/usb_ether.c: In function 'usb_ether_register':
drivers/usb/eth/usb_ether.c:72:11: error: 'ENXIO' undeclared (first use
in this function)
return -ENXIO;
^
drivers/usb/eth/usb_eth
Hi Simon,
I am playing with SPL for U-Boot with DM serial driver for OF_CONTROL
and without. Can you please tell me what's the status on SPL in
connection to DM?
Definitely it is not just about enabling it via Kconfig.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w:
Hi Marcel,
On 3 August 2015 at 09:33, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> If enabling CONFIG_DM_ETH currently compilation fails as follows:
>
> drivers/usb/eth/usb_ether.c: In function 'usb_ether_register':
> drivers/usb/eth/usb_ether.c:72:11: error: 'ENXIO' undeclared (first use
Hi Simon,
On Mon, Aug 3, 2015 at 8:13 AM, Simon Glass wrote:
> This reverts commit 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4.
>
> This function has a few problems. It calls fdt_parent_offset() which as
> mentioned in code review is very slow.
>
> https://patchwork.ozlabs.org/patch/499482/
> https:
On Fri, Jul 31, 2015 at 11:31 PM, Simon Glass wrote:
> Add a serial driver which makes use of EFI's console in/out service.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Add a comment about special handling for backspace
> - Add a comment as to why debug_uart_init() is empty
> - Dro
Hi Simon,
On Fri, Jul 31, 2015 at 11:31 PM, Simon Glass wrote:
> From: Ben Stoltz
>
> Adjust the toolchain flags to build U-Boot as a relocatable shared library,
> as required by EFI.
>
> Signed-off-by: Ben Stoltz
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Add a comment as to wh
Hi Simon,
On Fri, Jul 31, 2015 at 11:31 PM, Simon Glass wrote:
> Add support for building U-Boot as an EFI application with a .efi suffix.
> This can be loaded by EFI provided that EFI has the same bit width (32-
> or 64-bit) as U-Boot. This unfortunate limitation is imposed by EFI.
>
> Signed-of
Hi there
Trying to update one of my patch sets of late made me notice that the
ASIX USB to Ethernet stuff if CONFIG_DM_ETH is enabled seems to be
rather broken. I already sent two patches to even get that far but even
with that reception still does not seem to work (see below). I tested
by enablin
Hi Stephen,
On 3 August 2015 at 09:12, Stephen Warren wrote:
> On 08/02/2015 06:13 PM, Simon Glass wrote:
>>
>> This reverts commit 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4.
>>
>> This function has a few problems. It calls fdt_parent_offset() which as
>> mentioned in code review is very slow.
>>
Sure. I have to rebase it anyway after this commit 5b34436.
York
On 08/02/2015 03:30 PM, Simon Glass wrote:
> Hi York,
>
> On 23 July 2015 at 16:12, York Sun wrote:
>> fdt_addr_t is a physical address. It can be either 64-bit or 32-bit,
>> depending on the architecture. It should be phys_addr_t
On 08/02/2015 05:10 PM, Simon Glass wrote:
> At present we have a simple assignment to gd. With some archs this is
> implemented as a register or through some other means; a simple assignment
> does not suit in all cases.
>
> Change this to a function and add documentation to describe how this a
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Introduce two wrapper functions, socfpga_get_seq_ac_init() and
> socfpga_get_seq_inst_init() to avoid direct inclusion of the
> sequencer_auto_ac_init.h and sequencer_auto_inst_init.h QTS
> generated files. This reduces namespace polution again.
>
s/po
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Move the files generated by QTS into the board directory, they should not
> be part of the driver files at all.
>
> Signed-off-by: Marek Vasut
> ---
> .../altera => board/altera/socfpga/qts}/sequencer_auto.h| 0
> .../altera/socfpga/qts}/sequence
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Zap non-existent functions and place function prototypes at the
> beginning of the header file.
>
> Signed-off-by: Marek Vasut
> ---
> arch/arm/mach-socfpga/include/mach/sdram.h | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
Acked-by:
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> These parameters are not used in the code, zap them and the
> macros which are used by them as well.
>
> Signed-off-by: Marek Vasut
> ---
> drivers/ddr/altera/sequencer.c | 49
> +-
> drivers/ddr/altera/sequenc
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Introduce structure socfpga_sdram_rw_mgr_config to wrap the RW manager
> configuration values in board file. Introduce a complementary function,
> socfpga_get_sdram_rwmgr_config(), which returns this the structure.
> This is another step toward wrapping
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> This is defined in the QTS-generated headers, so it must not be
> re-defined in sequencer.h .
>
> Signed-off-by: Marek Vasut
> ---
> drivers/ddr/altera/sequencer.h | 1 -
> 1 file changed, 1 deletion(-)
>
Acked-by: Dinh Nguyen
Thanks,
Dinh
__
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Introduce structure socfpga_sdram_io_config to wrap the IO configuration
> values in board file. Introduce socfpga_get_sdram_io_config() function,
> which returns this the structure. This is another step toward wrapping
> the nasty QTS generated macros i
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Actually convert the sequencer code to use socfpga_sdram_io_config
> instead of the IO_* macros. This is just an sed excercise here, no
> manual coding needed.
s/excersise/exercise
Acked-by: Dinh Nguyen
Thanks,
Dinh
__
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Actually convert the sequencer code to use socfpga_sdram_rw_mgr_config
> instead of the RW_MGR_* macros. This is just an sed excercise here, no
> manual coding needed.
>
s/excersise/exercise
Acked-by: Dinh Nguyen
Thanks,
Dinh
___
On Monday, July 27, 2015 at 10:47:29 PM, Marek Vasut wrote:
> Move all the files generated by Quartus into the qts/ subdir of the
> board/altera/socfpga dir to make them explicitly separate from the
> generic U-Boot code.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
> ---
> board/altera/soc
On Monday, July 27, 2015 at 10:33:17 PM, Marek Vasut wrote:
> The driver variable name is eth_sandbox, which is probably a copy-paste
> mistake. Fix it.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
> Cc: Joe Hershberger
Hi Joe, I can pick both of those through u-boot-socfpga if you don't m
On Monday, July 27, 2015 at 10:41:05 PM, Marek Vasut wrote:
> The SPI aliases are completely wrong. First, they point to non-existing
> /spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use
> ad-hoc string instead of a handle. Furthermore, they are copied multiple
> times in each
On Monday, July 27, 2015 at 10:34:54 PM, Marek Vasut wrote:
> In case the FPGA bitstream is aligned to 4 bytes, skip the
> part of the assembler which handles unaligned bitstream.
> Otherwise, that part will loop indefinitelly.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
Applied to u-boot-
On Monday, July 27, 2015 at 10:42:51 PM, Marek Vasut wrote:
> Add alias for the SD/MMC controller, so it can be located by U-Boot OF
> support.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
Applied to u-boot-socfpga/master .
Best regards,
Marek Vasut
On 08/02/2015 06:21 PM, Marek Vasut wrote:
> Introduce structure socfpga_sdram_misc_config to wrap the remainging
> misc configuration values in board file. Again, introduce a function,
> socfpga_get_sdram_misc_config(), which returns this the structure. This
> is almost the final step toward wrapp
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