This series adds full support for the LPC (Low Pin Count) bridge, the
PCH (Platform Controller Hub), PCI devices like USB and SATA and more
CPU init support (turbo mode, etc.)
With this series, chromebook_link can use SATA and USB at the command
line.
Changes in v3:
- Add new patch to add ivybrid
This is no-longer used, so drop it.
Signed-off-by: Simon Glass
---
Changes in v3:
- Split out CONFIG_INTEL_CORE_ARCH removal patch
Changes in v2: None
arch/x86/cpu/interrupts.c | 28
1 file changed, 28 deletions(-)
diff --git a/arch/x86/cpu/interrupts.c b/arch/x8
It is now required to add subdirectories in the x86 cpu Makefile. Add this
to fix a build breakage for chromebook_link.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to add ivybridge directory to Makefile
Changes in v2: None
arch/x86/cpu/Makefile | 2 ++
1 file changed, 2 inse
Hi,
On 24 November 2014 at 21:18, Simon Glass wrote:
> This series adds full support for the LPC (Low Pin Count) bridge, the
> PCH (Platform Controller Hub), PCI devices like USB and SATA and more
> CPU init support (turbo mode, etc.)
>
> With this series, chromebook_link can use SATA and USB at
Enable SPI so that the SPI flash can be used.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
include/configs/chromebook_link.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index 86429cf..6b
These are not available in U-Boot as yet, so drop them.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/msr.h | 11 ---
1 file changed, 11 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index df43983..1955a
Add code to set up the Local Advanced Peripheral Interrupt Controller.
Signed-off-by: Simon Glass
---
Changes in v3:
- Use exitsing disable_lapic() code instead of duplicating it
Changes in v2:
- Remove use of __PRE_RAM__ define
- Use existing lapic_setup() code instead of duplicating it
arch
Add the setup code for the CPU so that it can be used at full speed.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c | 6 +
arch/x86/cpu/ivybridge/model_206ax.c
Add init for the northbridge, another part of the platform controller hub.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c | 2 +
arch/x86/cpu/ivybridge/northbr
This new symbol may be defined by the compiler. If it is, avoid a compiler
warning when USE_STDINT is defined.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to fix SIZE_MAX compiler warning when using stdint.h
Changes in v2: None
include/linux/kernel.h | 2 ++
1 file changed,
On 11/24/2014 09:10 PM, Simon Glass wrote:
> Hi Stephen,
>
> On 24 November 2014 at 21:06, Stephen Warren wrote:
>> On 11/24/2014 06:08 PM, Simon Glass wrote:
>>> The current load address of 0 seems to cause problems when driver model
>>> is used. There doesn't seem to be any reason why the scrip
Hi Stephen,
On 24 November 2014 at 21:22, Stephen Warren wrote:
> On 11/24/2014 09:10 PM, Simon Glass wrote:
>> Hi Stephen,
>>
>> On 24 November 2014 at 21:06, Stephen Warren wrote:
>>> On 11/24/2014 06:08 PM, Simon Glass wrote:
The current load address of 0 seems to cause problems when dri
Hi Stephen,
On 24 November 2014 at 21:21, Stephen Warren wrote:
> On 11/24/2014 08:58 AM, Simon Glass wrote:
>> Hi Stephen,
>>
>> There was another thread where you reported a hang when booting
>> Raspberry Pi with driver model. It can be repeated by applying this
>> patch and trying to boot with
The private data size is missing from the driver, so we store it at 0,
which causes problems when something overwrites memory at 0.
Fix this.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to add missing private data size for serial_pl01x
Changes in v2: None
drivers/serial/ser
This series adds driver model support to the GPIO and serial drivers used
by Raspberry Pi, and moves Raspberry Pi over to driver model.
This requires adding driver model support to the pl01x serial driver, and
replacing the bcm2835 GPIO driver with a driver model version (since there
are no longer
Adjust the configuration to use the driver model version of the pl01x
serial driver. Add the required platform data.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Adjust header file include to dm/platform_data/...
board/raspberrypi/rpi/rpi.c | 12
include/con
On 11/24/2014 08:58 AM, Simon Glass wrote:
> Hi Stephen,
>
> There was another thread where you reported a hang when booting
> Raspberry Pi with driver model. It can be repeated by applying this
> patch and trying to boot with syslinux.
>
> http://patchwork.ozlabs.org/patch/392180/
>
> When it h
On Tue, Nov 25, 2014 at 12:18 PM, Simon Glass wrote:
> This is no-longer used, so drop it.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Split out CONFIG_INTEL_CORE_ARCH removal patch
>
> Changes in v2: None
>
> arch/x86/cpu/interrupts.c | 28
> 1 file
On Tue, Nov 25, 2014 at 12:18 PM, Simon Glass wrote:
> Add code to set up the Local Advanced Peripheral Interrupt Controller.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Use exitsing disable_lapic() code instead of duplicating it
>
> Changes in v2:
> - Remove use of __PRE_RAM__ de
On Mon, Nov 24, 2014 at 8:45 PM, Sjoerd Simons
wrote:
> Not all exynos 5420 based devices with an LCD also have a parade LVDS
> bridge. So make sure compilation doesn't break if CONFIG_LCD is enabled
> and CONFIG_VIDEO_PARADE is not.
>
> Signed-off-by: Sjoerd Simons
> ---
> board/samsung/smdk542
On Monday 24 November 2014 07:57 PM, Andy Pont wrote:
> Hello,
>
> I am working on porting U-Boot 2014.07 to a custom TI AM3354 based hardware
> platform and am confused trying to set the pin mux for the two Ethernet
> interfaces that are on the board.
>
> RGMII1_ pins are connected to an ATHER
Hi Simon,
Can you apply this as a single patch ASAP
to fix the build error, please?
Masahiro
On Mon, 24 Nov 2014 21:18:20 -0700
Simon Glass wrote:
> It is now required to add subdirectories in the x86 cpu Makefile. Add this
> to fix a build breakage for chromebook_link.
>
> Signed-off-by: S
201 - 222 of 222 matches
Mail list logo