Re: [U-Boot] [PATCH v4] at91: Add support for Bluewater Systems Snapper 9G45 module

2012-06-30 Thread Andreas Bießmann
Dear Simon Glass, are you still interested getting this in mainline? It does not apply cleanly on current u-boot-atmel HEAD, please rebase on top of current u-boot-atmel. And please fix the minor changes commented later on. On 07.11.11 01:34, Simon Glass wrote: > Snapper 9G45 is a ARM9-based CPU

[U-Boot] [PATCH v2 1/2] imx: Use a clear identification of an unidentified CPU type

2012-06-30 Thread Otavio Salvador
In case an unidentified CPU type is detected it now returns i.MX??, in a const char. Signed-off-by: Otavio Salvador Cc: Marek Vasut Cc: Stefano Babic Cc: Fabio Estevam --- Changes for v2: * use i.MX?? for unidentified CPU type arch/arm/cpu/armv7/imx-common/cpu.c |4 ++-- 1 file changed

[U-Boot] [PATCH v3 2/2] mxs: generalize code for print_cpuinfo()

2012-06-30 Thread Otavio Salvador
The information now is gathered from HW_DIGCTL_CHIPID register and includes the revision of the chip on the output. Signed-off-by: Otavio Salvador Cc: Marek Vasut Cc: Stefano Babic Cc: Fabio Estevam --- Changes for v3: * fix info order (first rev, then clock) Changes for v2: * use ?? for u

Re: [U-Boot] [PATCH v4 3/6] mcx: Disable DCACHE since USB EHCI is enabled

2012-06-30 Thread Ilya Yanok
Dear Marek, 28.06.2012 19:41, Marek Vasut wrote: Surely. (but that probably was an AM3517 with 64 byte cache line) m28 is imx28 with 32byte cacheline You are lucky then. But some systems have bigger cacheline, right? patch) and loading from ext2 and vfat (worked). This is just a coincedenc

Re: [U-Boot] [PATCH v4 3/6] mcx: Disable DCACHE since USB EHCI is enabled

2012-06-30 Thread Ilya Yanok
Dear Marek, 29.06.2012 04:54, Marek Vasut wrote: To clarify for everyone, the first part of this series fixes some alignment issues for things that were not starting address aligned. There still exist end-address alignment issues within ehci-hcd. The time I have for this problem right now boils

Re: [U-Boot] [PATCH v3 1/3] AM335x : Add USB support for AM335x in u-boot

2012-06-30 Thread Ilya Yanok
Hi, Harman Sohanpal ti.com> writes: > +/* Control Module Registers */ > +#define CM_REGISTERS CTRL_BASE > +#define USB_CTRL0_REG_OFFSET (0x628) > +#define USB_CTRL1_REG_OFFSET (0x680) USB_CTRL1 seems to be unused. Furthermore, both values seems to be incorrect: according to the R

Re: [U-Boot] [PATCH v4 3/6] mcx: Disable DCACHE since USB EHCI is enabled

2012-06-30 Thread Marek Vasut
Dear Ilya Yanok, > Dear Marek, > > 28.06.2012 19:41, Marek Vasut wrote: > >> Surely. (but that probably was an AM3517 with 64 byte cache line) > > > > m28 is imx28 with 32byte cacheline > > You are lucky then. But some systems have bigger cacheline, right? Yes, and I just got a perfect system

Re: [U-Boot] [PATCH v4 3/6] mcx: Disable DCACHE since USB EHCI is enabled

2012-06-30 Thread Marek Vasut
Dear Ilya Yanok, > Dear Marek, > > 29.06.2012 04:54, Marek Vasut wrote: > >> To clarify for everyone, the first part of this series fixes some > >> alignment issues for things that were not starting address aligned. > >> There still exist end-address alignment issues within ehci-hcd. The > >> ti

[U-Boot] [PATCH] powerpc/mpc83xx: increment malloc heap size

2012-06-30 Thread Kim Phillips
extention of commit 3b6b256 "powerpc/mpc83xx: increment malloc heap size for the MPC832x MDS boards" to all other mpc83xx based boards. It fixes "Unable to save the rest of sector" messages when trying to save the environment to flash. Signed-off-by: Kim Phillips --- include/configs/MPC8323ERDB