Dear Wolfgang,
Wolfgang Denk wrote:
> Texas Instruments (OMAP): Dirk Behme?
> Or are there any volunteers at TI?
I really like to see someone from TI here, instead.
Looking at some past discussions, I think somebody from TI would be
the best. E.g.:
- While dis
Oh ... I had a more recent patch, but looks like it didn't make it to the list.
It already fixes a large parts of your comments. Thanks for the review
> please use MCI0_BASE and MCI1_BASE so we can detect if the soc support
> multiple mci and please move it to soc header
> I'll send a patch to cle
fluke56512 wrote:
> mini2440 is not cheap for a student in my country.
> 2009-09-05
>
>
I just want to say sorry for this mistake
Cheers,
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On Sat, 05 Sep 2009 01:47 +0200, Jean-Christophe PLAGNIOL-VILLARD wrote :
> On 10:36 Thu 20 Aug , Albin Tonnerre wrote:
> > On Thu, Aug 20, 2009 at 02:00:45AM +0200, Jean-Christophe PLAGNIOL-VILLARD
> > wrote :
> > > On 10:49 Tue 18 Aug , Albin Tonnerre wrote:
> > > > On Tue, Aug 18, 2009
On 11:03 Sat 05 Sep , Albin Tonnerre wrote:
> Oh ... I had a more recent patch, but looks like it didn't make it to the
> list.
> It already fixes a large parts of your comments. Thanks for the review
>
> > please use MCI0_BASE and MCI1_BASE so we can detect if the soc support
> > multiple mc
On 22:14 Fri 04 Sep , Wolfgang Denk wrote:
> Dear Simon Kagstrom,
>
> In message <20090831113210.02299...@marrow.netinsight.se> you wrote:
> > On Mon, 24 Aug 2009 09:06:05 +0200
> > Simon Kagstrom wrote:
> >
> > > This update to the patch series just cleans up the commit messages to
> > > ha
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
include/asm-arm/arch-at91/at91cap9.h|4
include/asm-arm/arch-at91/at91sam9260.h |4
include/asm-arm/arch-at91/at91sam9261.h |3 +++
include/asm-arm/arch-at91/at91sam9263.h |4
include/asm-arm/arch-at91/at91sam9
This patch allows to use the atmel_mci SD/MMC driver on the at91 architecture.
It contains:
- initialization code for the MCI controller for all the supported AT91. It
allows the use of only one controller even if a SoC has two controllers
(anyway there's no support for it in atmel_mci as of
On 13:20 Sat 05 Sep , Albin Tonnerre wrote:
> On Sat, 05 Sep 2009 01:47 +0200, Jean-Christophe PLAGNIOL-VILLARD wrote :
> > On 10:36 Thu 20 Aug , Albin Tonnerre wrote:
> > > On Thu, Aug 20, 2009 at 02:00:45AM +0200, Jean-Christophe
> > > PLAGNIOL-VILLARD wrote :
> > > > On 10:49 Tue 18 Aug
On Fri, Sep 4, 2009 at 5:05 PM, Timur Tabi wrote:
> After programming a new LAW, we should read-back the LAWAR register so that
> we sync the writes. Otherwise, code that attempts to use the new LAW-mapped
> memory might fail.
This should say, "code that attempts to use the new LAW-mapped memory
On 07:37 Sat 05 Sep , Dirk Behme wrote:
> Dear Jean-Christophe,
>
> Jean-Christophe PLAGNIOL-VILLARD wrote:
> >Hi,
> >
> >Please pull
> >The following changes since commit 3aa8b68d80dbcb6829af60485c1e388b39af793d:
> > Wolfgang Denk (1):
> >Merge branch 'next' of ../next
> >
> >are ava
This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
too short.
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't
have any s3c2400 or s3c2410 boards but need this patch applying
I submitted patches in the last merge window to add support for the Embest
SBC2440-II Board but ran out of time to deal with all of the comments on
the
patches. Because it was a series of 7 patches comments on the early
patches in
the series meant I had to re-work all other patches.
I'd lik
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.
Signed-off-by: Eric Benard
---
MAINTAINERS|5 +
MAKEALL|2 +
On 16:33 Sat 05 Sep , kevin.morf...@fearnside-systems.co.uk wrote:
> This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
> s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
> too short.
>
> Tested on an Embest SBC2440-II Board with local u-boot p
On Sep 3, 2009, at 8:22 AM, Kumar Gala wrote:
> Allow us to search the TLB array based on an address. This is useful
> if we want to change an entry but dont know where it happens to be
> located.
>
> For example, the boot page mapping we use on MP or the flash TLB that
> we change the WIMGE set
On Sep 2, 2009, at 9:02 AM, Kumar Gala wrote:
> Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious
> cases
> we have like PCI, CPM2, QE. Also reworked it to use one line per file
> for everything and sorted in alphabetical order.
>
> Signed-off-by: Kumar Gala
> ---
> cpu/mpc85x
On Sep 2, 2009, at 4:40 PM, Kumar Gala wrote:
> Refactor the code into a simple bitmask lookup table that determines
> if
> a given PCI controller is enabled and if its in host/root-complex or
> agent/end-point mode.
>
> Each processor in the PQ3/MPC86xx family specified different encodings
> f
On Sep 3, 2009, at 8:58 AM, Kumar Gala wrote:
> Its possible that we try and copy the boot page code out of flash
> into a
> DDR location that doesn't have a TLB cover it. For example, if we
> have
> 3G of DDR we typically only map the first 2G. In the cases of 4G+
> this
> wasn't an issu
On Sep 4, 2009, at 5:05 PM, Timur Tabi wrote:
> After programming a new LAW, we should read-back the LAWAR register
> so that
> we sync the writes. Otherwise, code that attempts to use the new
> LAW-mapped
> memory might fail.
>
> Signed-off-by: Timur Tabi
> ---
> drivers/misc/fsl_law.c |
LOG/TQM8548_BE.ERR:common/libcommon.a(cmd_mtdparts.o): In function
`part_validate_eraseblock':
LOG/TQM8548_BE.ERR:/local/home/galak/git/u-boot-85xx/common/
cmd_mtdparts.c:316: undefined reference to `get_mtd_device_nm'
LOG/TQM8548_BE.ERR:common/libcommon.a(cmd_mtdparts.o): In function
`mtd_dev
On Sep 2, 2009, at 9:10 AM, Poonam Aggrwal wrote:
> Fixing the number of cores in the device tree based on the actual
> number of
> cores on the system.
> With this same device tree image can be used for dual core and
> single core
> members of otherwise exactly same SOC.
> For example P202
On Sep 2, 2009, at 3:05 AM, Poonam Aggrwal wrote:
> Incase the system is detected with Unknown SVR, let the system boot
> with a default value and a proper message.
> Now with dynamic detection of SOC properties from SVR, this is
> necessary
> to prevent a crash.
>
> Signed-off-by: Poonam Aggrw
On Sep 3, 2009, at 9:12 AM, Poonam Aggrwal wrote:
> While in probecpu() UART is still not initialized.
>
> Signed-off-by: Poonam Aggrwal
> Acked-by: Kumar Gala
> ---
> applies on git.am.freescale.net/mirrors/u-boot.git
> cpu/mpc85xx/cpu.c |4
> cpu/mpc86xx/cpu.c |6 ++
> cpu/mpc8
Gao Ya'nan wrote:
> And how to configure the kernel to minimize the code modification ?
>
> I am porting U-Boot and Linux to a new board with a MPC875 processor
> and two serial chips, and U-Boot runs well now. I hear that the FDT
> function can tell the kernel devices information more flexibly a
Hi, Jerry.
2009/9/6 Jerry Van Baren :
> Gao Ya'nan wrote:
>>
>> And how to configure the kernel to minimize the code modification ?
>>
>> I am porting U-Boot and Linux to a new board with a MPC875 processor
>> and two serial chips, and U-Boot runs well now. I hear that the FDT
>> function can tel
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