Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]> wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
Acked-by: Haavard Skinnemoen <[EMAIL PROTECTED]>
I'm a bit out of sync at the moment. Wolfgang, can you apply it
directly?
> diff --git a/lib_avr32/bootm.c b/lib_avr3
Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]> wrote:
> >This patch trades off the removal of most of the #ifdef ugly for
> > a lot of duplication. Which is the lesser of two evils?
> Only 4 archs share actually the same code avr32, i386, mips and sh
> which actually I've plan to modify
Stefan Roese <[EMAIL PROTECTED]> wrote:
> This patch defines all flash access functions as weak so that
> they can be overridden by board specific versions.
>
> This will be used by the upcoming VCTH board support where the NOR
> FLASH unfortunately can't be accessed memory-mapped. Special
> acces
Convert the bios_emulator subdir over to COBJS-y style to avoid pointless
compilation for the majority of boards.
Signed-off-by: Mike Frysinger <[EMAIL PROTECTED]>
---
drivers/bios_emulator/Makefile |6 +++---
drivers/bios_emulator/atibios.c |4
drivers/bios_emulator
The original implementation of delay function of ARM s3c44b0 doesnt' cooperate
with U-Boot kernel well, which will cause fake-time-out. What is important is
to keep timestamp in unit of millisecond.
diff -purN old/cpu/s3c44b0/interrupts.c new/cpu/s3c44b0/interrupts.c
--- old/cpu/s3c44b0/interru
If the virtual address for CCSRBAR is the same after relocation but
the physical address is changing we'd end up having two TLB entries with
the same VA. Instead we new us the new CCSRBAR virt address + 4k as a
temp virt address to access the old CCSRBAR to relocate it.
Signed-off-by: Kumar Gala
On 04:03 Thu 13 Nov , Mike Frysinger wrote:
> Convert the bios_emulator subdir over to COBJS-y style to avoid pointless
> compilation for the majority of boards.
>
> Signed-off-by: Mike Frysinger <[EMAIL PROTECTED]>
> ---
> drivers/bios_emulator/Makefile |6 +++---
> drivers/bios
This patch makes u-boot use SRAM instead of SDRAM as main memory.
This is done due to a bug in the current revsions of the
at32uc3a0xxx series microcontrollers, which makes it unreliable to
run code from SDRAM.
Signed-off-by: Gunnar Rangoy <[EMAIL PROTECTED]>
Signed-off-by: Paul Driveklepp <[EMAIL
This patch sets resonable boot parameters for the atevk1100.
(Load kernel via tftp/dhcp and use nfs rootfs.)
Signed-off-by: Gunnar Rangoy <[EMAIL PROTECTED]>
Signed-off-by: Paul Driveklepp <[EMAIL PROTECTED]>
Signed-off-by: Olav Morken <[EMAIL PROTECTED]>
---
include/configs/atevk1100.h |8 ++
There are some differences in the implementation of GPIO in the
at32uc chip compared to the ap700x series.
Signed-off-by: Gunnar Rangoy <[EMAIL PROTECTED]>
Signed-off-by: Paul Driveklepp <[EMAIL PROTECTED]>
Signed-off-by: Olav Morken <[EMAIL PROTECTED]>
---
cpu/at32uc/portmux-gpio.c
This patch enables writing (the environment) to the internal flash in
the microcontroller.
Signed-off-by: Gunnar Rangoy <[EMAIL PROTECTED]>
Signed-off-by: Paul Driveklepp <[EMAIL PROTECTED]>
Signed-off-by: Olav Morken <[EMAIL PROTECTED]>
---
cpu/at32uc/flashc.c | 69
This patch adds support for external SRAM connected to the EBI bus
on the at32uc3a0xxx.
Signed-off-by: Gunnar Rangoy <[EMAIL PROTECTED]>
Signed-off-by: Paul Driveklepp <[EMAIL PROTECTED]>
Signed-off-by: Olav Morken <[EMAIL PROTECTED]>
---
cpu/at32uc/Makefile |1 +
cpu/at32uc/smc.c
These patches makes it possible to load code into external SRAM on
the atevk1100.
Also included is a patch to use the internal flash. Before this can be
done, U-Boot must be relocated to SRAM.
The GPIO implementation is made cpu dependent due to differences between
at32uc and ap700x.
Gunnar Ra
Since we now have working SRAM, we can relocate the code to SRAM.
Signed-off-by: Gunnar Rangoy <[EMAIL PROTECTED]>
Signed-off-by: Paul Driveklepp <[EMAIL PROTECTED]>
Signed-off-by: Olav Morken <[EMAIL PROTECTED]>
---
board/atmel/atevk1100/u-boot.lds |2 --
cpu/at32uc/start.S |
On Thu, 2008-11-13 at 06:30 -0600, Kumar Gala wrote:
> If the virtual address for CCSRBAR is the same after relocation but
> the physical address is changing we'd end up having two TLB entries with
> the same VA. Instead we new us the new CCSRBAR virt address + 4k as a
> temp virt address to acces
On 05:11 Thu 13 Nov , Chaofu Chen wrote:
> The original implementation of delay function of ARM s3c44b0 doesnt'
> cooperate with U-Boot kernel well, which will cause fake-time-out. What is
> important is to keep timestamp in unit of millisecond.
>
SOB please
> diff -purN old/cpu/s3c44b0/in
On Nov 13, 2008, at 9:30 AM, Peter Tyser wrote:
> On Thu, 2008-11-13 at 06:30 -0600, Kumar Gala wrote:
>> If the virtual address for CCSRBAR is the same after relocation but
>> the physical address is changing we'd end up having two TLB entries
>> with
>> the same VA. Instead we new us the new
Hi Jean-Christophe PLAGNIOL-VILLARD,
sorry to answer late. I've been on the CELF Conference last week and
being busy this week delays so much.
Am Thu, 6 Nov 2008 21:53:29 +0100
schrieb Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>:
> On 12:48 Wed 05 Nov , Juergen Schoew wrote:
> > Hi
Dear Wolfgang,
Wolfgang Denk wrote:
> Dear [EMAIL PROTECTED],
>
> In message <[EMAIL PROTECTED]> you wrote:
>
>>Update ARM's if then else logic.
>>
>>---
>> examples/Makefile |6 +++---
>> 1 files changed, 3 insertions(+), 3 deletions(-)
>
>
> Hm... wouldn't it make sense to explicitely
On Thu, Nov 13, 2008 at 02:58:51AM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 09:56 Thu 13 Nov , Lance Zhang wrote:
> >
> > > With the Ralink chip it's not too much complicate to add wifi support.
> > > You need to upload the firmware and manage the wifi configuration via
> > the
> >
We need to update i_version inside cycle to find really latest version
inside jffs2_1pass_list_inodes(). With that fixed we can use isize inside
dump_inode() instead of calling expensive jffs2_1pass_read_inode().
Signed-off-by: Alexey Neyman <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PR
This patch adds sector_size field to part_info structure (used
by new JFFS2 code).
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
common/cmd_jffs2.c | 20 +---
include/jffs2/load_kernel.h |1 +
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/commo
Hello everybody,
here is a set of changes we made to improve U-Boot JFFS2 code
performance. We still can't reach Linux's performance but improvements
are significant.
Patches are againt current u-boot git tree.
Any comments are welcome.
Regards, Ilya.
_
Rewrites jffs2_1pass_build_lists() function in style of Linux's
jffs2_scan_medium() and jffs2_scan_eraseblock().
This includes:
- Caching flash acceses
- Smart dealing with free space
Signed-off-by: Alexey Neyman <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
fs/jffs2/jff
As we moved data_crc() invocation from jffs2_1pass_build_lists() to
jffs2_1pass_read_inode() data_crc is going to be calculated on each
inode access. This patch adds caching of data_crc() results. There
is no significant improvement in speed (because of flash access
caching added in previous patch
With this patch JFFS2 code allocates memory buffer of max_totlen size
(size of the largest node, calculated during scan time) and uses it to
store entire node. Speeds up loading. If malloc fails we use old ways
to do things.
Signed-off-by: Alexey Neyman <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yano
This patch adds support for reading fs information from summary
node instead of scanning full eraseblock.
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
fs/jffs2/jffs2_1pass.c | 187 +++-
fs/jffs2/summary.h | 163 +++
> > > diff --git a/include/configs/firetux.h b/include/configs/firetux.h
> > > new file mode 100644
> > > index 000..efa27af
> > > --- /dev/null
> > > +++ b/include/configs/firetux.h
> > > +/* we can have nand _or_ nor flash */
> > > +/* #define CONFIG_NANDFLASH 1 */
> > > +
> > >
since commit be0bd8234b9777ecd63c4c686f72af070d886517
tlb entry for socrates DDR SDRAM will be reconfigured
by setup_ddr_tlbs() from initdram() causing an
inconsistency with previously configured DDR SDRAM tlb
entry from tlb_table:
socrates>l2cam 7 9
IDX PID EPN SIZE V TS RPN U0-U
Heiko Schocher wrote:
> Hello Ben
>
> Ben Warren wrote:
>
>> Heiko Schocher wrote:
>>
>>
>>> Check the presence of the PIGGY on the keymile boards mgcoge,
>>> mgsuvd and kmeter1. If the PIGGY is not present, dont register
>>> this Ethernet device.
>>>
>>> Signed-off-by: Heiko Schocher <[
On 19:49 Thu 13 Nov , Ilya Yanok wrote:
> This patch adds sector_size field to part_info structure (used
> by new JFFS2 code).
>
> Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
> ---
> common/cmd_jffs2.c | 20 +---
> include/jffs2/load_kernel.h |1 +
> 2 files c
>
> /* start at the beginning of the partition */
> - while (offset < max) {
> - if ((oldoffset >> SPIN_BLKSIZE) != (offset >> SPIN_BLKSIZE)) {
> - printf("\b\b%c ", spinner[counter++ % sizeof(spinner)]);
> - oldoffset = offset;
> -
Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 19:49 Thu 13 Nov , Ilya Yanok wrote:
>
>> This patch adds sector_size field to part_info structure (used
>> by new JFFS2 code).
>>
>> Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
>> ---
>> common/cmd_jffs2.c | 20 +---
> Use raw accessors and make sure that explicit barriers are used where
> needed.
Is there somewhere that I can find information regarding when and where are the
appropriate places are to use barriers?
Ron
___
U-Boot mailing list
U-Boot@lists.denx.de
Ron Madrid wrote:
>> Use raw accessors and make sure that explicit barriers are used where
>> needed.
>
> Is there somewhere that I can find information regarding when and where are
> the appropriate places are to use barriers?
Basically, you need a barrier any time ordering matters. If access
On Wed, Nov 12, 2008 at 8:14 PM, Kumar Gala <[EMAIL PROTECTED]>wrote:
>
> On Nov 12, 2008, at 5:48 PM, eliad lubovsky wrote:
>
> I am trying to boot kernel 2.6.23 on an MPC8572DS board.
>> It hangs on a bootm command after decompressing the kernel and the rootfs.
>> I
>> added some printings to u
Le vendredi 07 novembre 2008 à 20:38 +0100, Jean-Christophe
PLAGNIOL-VILLARD a écrit :
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
> ---
> The idea is to reduce common code initialisation which is actually in board.
> as done on afeb9260 and Ronetix eval board for 9260 &
On 22:28 Thu 13 Nov , Stelian Pop wrote:
> Le vendredi 07 novembre 2008 à 20:38 +0100, Jean-Christophe
> PLAGNIOL-VILLARD a écrit :
>
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
> > ---
> > The idea is to reduce common code initialisation which is actually in board.
On 22:27 Thu 13 Nov , Salvatore Lionetti wrote:
> Hi,
>
> i've ported u-boot-1.1.6 and DHT walnut board to qemu-0.9.1 environment.
I've prepare the DHT Walnut for U-Boot mainline
(patch send to the U-Boot ML soon)
It will be good the test qemu with it
Best Regards,
J.
On Nov 13, 2008, at 1:36 PM, eliad lubovsky wrote:
>
>
> On Wed, Nov 12, 2008 at 8:14 PM, Kumar Gala
> <[EMAIL PROTECTED]> wrote:
>
> On Nov 12, 2008, at 5:48 PM, eliad lubovsky wrote:
>
> I am trying to boot kernel 2.6.23 on an MPC8572DS board.
> It hangs on a bootm command after decompressing
40 matches
Mail list logo