On 12/12/13 13:37, Tom Rini wrote:
> On 12/12/2013 03:34 AM, Stefan Roese wrote:
>> I just tested on dxr2 (AM3352 based board) with latest mainline
>> U-Boot. And the network performance is a bit better. But not as
>> good as yours. Here my numbers:
>
>> Without this patch: ~400 KiB/s With this
On 12.12.2013 14:49, Tom Rini wrote:
>>> Check your logs? Unless you've also got a patched tree you should see
>>> "WARNING: Caches disabled" or so, because, yeah, oops, am335x got in
>>> with caches disabled, and then I forgot about it.
>>
>> This is what I got currently (mainline):
>>
>> U-Boot
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On 12/12/2013 08:45 AM, Stefan Roese wrote:
> On 12.12.2013 14:39, Tom Rini wrote:
Good point - indeed I had I/D caches enabled for other reasons
already (md5/sha1 caclulations, ..)
>>>
>>> Hmmm. I expected that caches are enabled already. Si
On 12.12.2013 14:39, Tom Rini wrote:
>>> Good point - indeed I had I/D caches enabled for other reasons
>>> already (md5/sha1 caclulations, ..)
>>
>> Hmmm. I expected that caches are enabled already. Since I didn't
>> see any "D-Cache disabled message" in the startup log.
>>
>> If this is not that
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On 12/12/2013 08:24 AM, Stefan Roese wrote:
> On 12.12.2013 14:20, Vladimir Koutny wrote:
>>
>> On 12/12/13 13:37, Tom Rini wrote:
>>> On 12/12/2013 03:34 AM, Stefan Roese wrote:
I just tested on dxr2 (AM3352 based board) with latest
mainlin
On 12.12.2013 14:20, Vladimir Koutny wrote:
>
> On 12/12/13 13:37, Tom Rini wrote:
>> On 12/12/2013 03:34 AM, Stefan Roese wrote:
>>> I just tested on dxr2 (AM3352 based board) with latest mainline
>>> U-Boot. And the network performance is a bit better. But not as
>>> good as yours. Here my numbe
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On 12/12/2013 03:34 AM, Stefan Roese wrote:
> On 04.12.2013 23:05, Tom Rini wrote:
>> On Thu, Nov 28, 2013 at 10:38:40AM +0100, Vladimir Koutny wrote:
>>
>>> In 48ec5291, only TX path was optimized; this does the same
>>> also for RX path. This result
On 04.12.2013 23:05, Tom Rini wrote:
> On Thu, Nov 28, 2013 at 10:38:40AM +0100, Vladimir Koutny wrote:
>
>> In 48ec5291, only TX path was optimized; this does the same also for RX
>> path. This results in huge increase of TFTP throughput on custom am3352
>> board (from 312KiB/s to 1.8MiB/s) and e
On Thu, Nov 28, 2013 at 10:38:40AM +0100, Vladimir Koutny wrote:
> In 48ec5291, only TX path was optimized; this does the same also for RX
> path. This results in huge increase of TFTP throughput on custom am3352
> board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer
> timeouts.
>
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