On Wed, Feb 8, 2012 at 3:44 AM, Hatim Ali wrote:
> SMDK5250 development boards have different memory variants like
> DDR3, LPDDR2 and LPDDR3. This patch adds supports for DDR3.
> The DDR3 is configured for 667Mhz and is being enabled by default.
One other note: the SDRAM doesn't appear to be stab
Dear Chander,
Thanks for your review.
Please find inline my replies to your comments.
On Thu, Feb 9, 2012 at 6:44 PM, Chander Kashyap
wrote:
> Dear Hatim,
>
> On 8 February 2012 17:14, Hatim Ali wrote:
> > SMDK5250 development boards have different memory variants like
> > DDR3, LPDDR2 and LPDD
Hatim,
Overall comments:
* Random delays are evil. Please explain each sdelay() call. Be sure
to include information about why exactly 65,536 iterations through a
delay loop is necessary in each case.
* For functions that are nearly the same between dmc_init.c and
dmc_init_ddr3.c should be un
Dear Hatim,
On 8 February 2012 17:14, Hatim Ali wrote:
> SMDK5250 development boards have different memory variants like
> DDR3, LPDDR2 and LPDDR3. This patch adds supports for DDR3.
> The DDR3 is configured for 667Mhz and is being enabled by default.
>
> This patch is based on Chander Kashyap's
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